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Openrisc fixes for 4.10 

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Merge tag 'openrisc-for-linus' of git://github.com/openrisc/linux

Pull Openrisc updates from Stafford Horne:

 - changes to MAINTAINER for openrisc

 - probably biggest actual change is the move to memblock from bootmem

 - ... plus several bug and build fixes

* tag 'openrisc-for-linus' of git://github.com/openrisc/linux:
  openrisc: prevent VGA console, fix builds
  openrisc: include l.swa in check for write data pagefault
  openrisc: Updates after openrisc.net has been lost
  openrisc: Consolidate setup to use memblock instead of bootmem
  openrisc: remove the redundant of_platform_populate
  openrisc: add NR_CPUS Kconfig default value
  openrisc: Support both old (or32) and new (or1k) toolchain
  openrisc: Add thread-local storage (TLS) support
  openrisc: restore all regs on rt_sigreturn
  openrisc: fix PTRS_PER_PGD define
hifive-unleashed-5.1
Linus Torvalds 2016-12-12 08:51:37 -08:00
parent 709c12e3f5 7c7808ce10
commit 56e9461a49
13 changed files with 58 additions and 55 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
MAINTAINERS
View File

@ -8977,9 +8977,11 @@ F: drivers/of/resolver.c
OPENRISC ARCHITECTURE
M: Jonas Bonn <jonas@southpole.se>
W: http://openrisc.net
M: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
M: Stafford Horne <shorne@gmail.com>
L: openrisc@lists.librecores.org
W: http://openrisc.io
S: Maintained
T: git git://openrisc.net/~jonas/linux
F: arch/openrisc/
OPENVSWITCH

4
arch/openrisc/Kconfig
View File

@ -26,6 +26,7 @@ config OPENRISC
select HAVE_DEBUG_STACKOVERFLOW
select OR1K_PIC
select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
select NO_BOOTMEM
config MMU
def_bool y
@ -98,6 +99,9 @@ config OPENRISC_HAVE_INST_DIV
Select this if your implementation has a hardware divide instruction
endmenu
config NR_CPUS
int
default "1"
source kernel/Kconfig.hz
source kernel/Kconfig.preempt

8
arch/openrisc/README.openrisc
View File

@ -6,7 +6,7 @@ target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
For information about OpenRISC processors and ongoing development:
website http://openrisc.net
website http://openrisc.io
For more information about Linux on OpenRISC, please contact South Pole AB.
@ -24,17 +24,17 @@ In order to build and run Linux for OpenRISC, you'll need at least a basic
toolchain and, perhaps, the architectural simulator. Steps to get these bits
in place are outlined here.
1) The toolchain can be obtained from openrisc.net. Instructions for building
1) The toolchain can be obtained from openrisc.io. Instructions for building
a toolchain can be found at:
http://openrisc.net/toolchain-build.html
https://github.com/openrisc/tutorials
2) or1ksim (optional)
or1ksim is the architectural simulator which will allow you to actually run
your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.
git clone git://openrisc.net/jonas/or1ksim-svn
git clone https://github.com/openrisc/or1ksim.git
cd or1ksim
./configure --prefix=$OPENRISC_PREFIX

3
arch/openrisc/TODO.openrisc
View File

@ -5,9 +5,6 @@ that are due for investigation shortly, i.e. our TODO list:
-- Implement the rest of the DMA API... dma_map_sg, etc.
-- Consolidate usage of memblock and bootmem... move everything over to
memblock.
-- Finish the renaming cleanup... there are references to or32 in the code
which was an older name for the architecture. The name we've settled on is
or1k and this change is slowly trickling through the stack. For the time

1
arch/openrisc/include/asm/pgalloc.h
View File

@ -23,7 +23,6 @@
#include <linux/threads.h>
#include <linux/mm.h>
#include <linux/memblock.h>
#include <linux/bootmem.h>
extern int mem_init_done;

2
arch/openrisc/include/asm/pgtable.h
View File

@ -69,7 +69,7 @@ extern void paging_init(void);
*/
#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-2))
#define PTRS_PER_PGD (1UL << (PAGE_SHIFT-2))
#define PTRS_PER_PGD (1UL << (32-PGDIR_SHIFT))
/* calculate how many PGD entries a user-level program can use
* the first mappable virtual address is 0

12
arch/openrisc/kernel/entry.S
View File

@ -264,7 +264,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
l.srli r6,r6,26 // check opcode for write access
#endif
l.sfgeui r6,0x34 // check opcode for write access
l.sfgeui r6,0x33 // check opcode for write access
l.bnf 1f
l.sfleui r6,0x37
l.bnf 1f
@ -1101,8 +1101,16 @@ ENTRY(__sys_fork)
l.addi r3,r1,0
ENTRY(sys_rt_sigreturn)
l.j _sys_rt_sigreturn
l.jal _sys_rt_sigreturn
l.addi r3,r1,0
l.sfne r30,r0
l.bnf _no_syscall_trace
l.nop
l.jal do_syscall_trace_leave
l.addi r3,r1,0
_no_syscall_trace:
l.j _resume_userspace
l.nop
/* This is a catch-all syscall for atomic instructions for the OpenRISC 1000.
* The functions takes a variable number of parameters depending on which

13
arch/openrisc/kernel/process.c
View File

@ -173,6 +173,19 @@ copy_thread(unsigned long clone_flags, unsigned long usp,
if (usp)
userregs->sp = usp;
/*
* For CLONE_SETTLS set "tp" (r10) to the TLS pointer passed to sys_clone.
*
* The kernel entry is:
* int clone (long flags, void *child_stack, int *parent_tid,
* int *child_tid, struct void *tls)
*
* This makes the source r7 in the kernel registers.
*/
if (clone_flags & CLONE_SETTLS)
userregs->gpr[10] = userregs->gpr[7];
userregs->gpr[11] = 0; /* Result from fork() */
kregs->gpr[20] = 0; /* Userspace thread */

46
arch/openrisc/kernel/setup.c
View File

@ -38,7 +38,6 @@
#include <linux/of.h>
#include <linux/memblock.h>
#include <linux/device.h>
#include <linux/of_platform.h>
#include <asm/sections.h>
#include <asm/segment.h>
@ -51,18 +50,16 @@
#include "vmlinux.h"
static unsigned long __init setup_memory(void)
static void __init setup_memory(void)
{
unsigned long bootmap_size;
unsigned long ram_start_pfn;
unsigned long free_ram_start_pfn;
unsigned long ram_end_pfn;
phys_addr_t memory_start, memory_end;
struct memblock_region *region;
memory_end = memory_start = 0;
/* Find main memory where is the kernel */
/* Find main memory where is the kernel, we assume its the only one */
for_each_memblock(memory, region) {
memory_start = region->base;
memory_end = region->base + region->size;
@ -75,10 +72,11 @@ static unsigned long __init setup_memory(void)
}
ram_start_pfn = PFN_UP(memory_start);
/* free_ram_start_pfn is first page after kernel */
free_ram_start_pfn = PFN_UP(__pa(_end));
ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
/* setup bootmem globals (we use no_bootmem, but mm still depends on this) */
min_low_pfn = ram_start_pfn;
max_low_pfn = ram_end_pfn;
max_pfn = ram_end_pfn;
/*
@ -86,22 +84,13 @@ static unsigned long __init setup_memory(void)
*
* This makes the memory from the end of the kernel to the end of
* RAM usable.
* init_bootmem sets the global values min_low_pfn, max_low_pfn.
*/
bootmap_size = init_bootmem(free_ram_start_pfn,
ram_end_pfn - ram_start_pfn);
free_bootmem(PFN_PHYS(free_ram_start_pfn),
(ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
BOOTMEM_DEFAULT);
memblock_reserve(__pa(_stext), _end - _stext);
for_each_memblock(reserved, region) {
printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
(u32) region->base, (u32) region->size);
reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
}
early_init_fdt_reserve_self();
early_init_fdt_scan_reserved_mem();
return ram_end_pfn;
memblock_dump_all();
}
struct cpuinfo cpuinfo;
@ -219,15 +208,6 @@ void __init or32_early_setup(void *fdt)
early_init_devtree(fdt);
}
static int __init openrisc_device_probe(void)
{
of_platform_populate(NULL, NULL, NULL, NULL);
return 0;
}
device_initcall(openrisc_device_probe);
static inline unsigned long extract_value_bits(unsigned long reg,
short bit_nr, short width)
{
@ -282,8 +262,6 @@ void calibrate_delay(void)
void __init setup_arch(char **cmdline_p)
{
unsigned long max_low_pfn;
unflatten_and_copy_device_tree();
setup_cpuinfo();
@ -304,8 +282,8 @@ void __init setup_arch(char **cmdline_p)
initrd_below_start_ok = 1;
#endif
/* setup bootmem allocator */
max_low_pfn = setup_memory();
/* setup memblock allocator */
setup_memory();
/* paging_init() sets up the MMU and marks all pages as reserved */
paging_init();
@ -317,7 +295,7 @@ void __init setup_arch(char **cmdline_p)
*cmdline_p = boot_command_line;
printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n");
}
static int show_cpuinfo(struct seq_file *m, void *v)

8
arch/openrisc/kernel/vmlinux.lds.S
View File

@ -30,7 +30,13 @@
#include <asm/cache.h>
#include <asm-generic/vmlinux.lds.h>
OUTPUT_FORMAT("elf32-or32", "elf32-or32", "elf32-or32")
#ifdef __OR1K__
#define __OUTPUT_FORMAT "elf32-or1k"
#else
#define __OUTPUT_FORMAT "elf32-or32"
#endif
OUTPUT_FORMAT(__OUTPUT_FORMAT, __OUTPUT_FORMAT, __OUTPUT_FORMAT)
jiffies = jiffies_64 + 4;
SECTIONS

4
arch/openrisc/mm/init.c
View File

@ -106,11 +106,11 @@ static void __init map_ram(void)
}
/* Alloc one page for holding PTE's... */
pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
pte = (pte_t *) __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE));
set_pmd(pme, __pmd(_KERNPG_TABLE + __pa(pte)));
/* Fill the newly allocated page with PTE'S */
for (j = 0; p < e && j < PTRS_PER_PGD;
for (j = 0; p < e && j < PTRS_PER_PTE;
v += PAGE_SIZE, p += PAGE_SIZE, j++, pte++) {
if (v >= (u32) _e_kernel_ro ||
v < (u32) _s_kernel_ro)

4
arch/openrisc/mm/ioremap.c
View File

@ -124,11 +124,7 @@ pte_t __ref *pte_alloc_one_kernel(struct mm_struct *mm,
if (likely(mem_init_done)) {
pte = (pte_t *) __get_free_page(GFP_KERNEL);
} else {
pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
#if 0
/* FIXME: use memblock... */
pte = (pte_t *) __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE));
#endif
}
if (pte)

2
drivers/video/console/Kconfig
View File

@ -9,7 +9,7 @@ config VGA_CONSOLE
depends on !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && \
!SUPERH && !BLACKFIN && !AVR32 && !MN10300 && !CRIS && \
(!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER) && \
!ARM64 && !ARC && !MICROBLAZE
!ARM64 && !ARC && !MICROBLAZE && !OPENRISC
default y
help
Saying Y here will allow you to use Linux in text mode through a