powerpc/mpc85xx: refactor the PM operations
Freescale CoreNet-based and Non-CoreNet-based platforms require different PM operations. This patch extracted existing PM operations on Non-CoreNet-based platforms to a new file which can accommodate both platforms. In this way, PM operation codes are clearer structurally. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@feescale.com> Signed-off-by: Scott Wood <oss@buserror.net>
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# Makefile for the PowerPC 85xx linux kernel.
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#
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_FSL_PMC) += mpc85xx_pm_ops.o
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obj-y += common.o
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106
arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c
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106
arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c
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/*
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* MPC85xx PM operators
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*
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* Copyright 2015 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#define pr_fmt(fmt) "%s: " fmt, __func__
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/fsl/guts.h>
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#include <asm/io.h>
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#include <asm/fsl_pm.h>
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static struct ccsr_guts __iomem *guts;
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static void mpc85xx_irq_mask(int cpu)
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{
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}
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static void mpc85xx_irq_unmask(int cpu)
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{
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}
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static void mpc85xx_cpu_die(int cpu)
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{
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u32 tmp;
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tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP;
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mtspr(SPRN_HID0, tmp);
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/* Enter NAP mode. */
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tmp = mfmsr();
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tmp |= MSR_WE;
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asm volatile(
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"msync\n"
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"mtmsr %0\n"
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"isync\n"
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:
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: "r" (tmp));
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}
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static void mpc85xx_cpu_up_prepare(int cpu)
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{
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}
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static void mpc85xx_freeze_time_base(bool freeze)
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{
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uint32_t mask;
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mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1;
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if (freeze)
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setbits32(&guts->devdisr, mask);
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else
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clrbits32(&guts->devdisr, mask);
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in_be32(&guts->devdisr);
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}
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static const struct of_device_id mpc85xx_smp_guts_ids[] = {
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{ .compatible = "fsl,mpc8572-guts", },
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{ .compatible = "fsl,p1020-guts", },
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{ .compatible = "fsl,p1021-guts", },
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{ .compatible = "fsl,p1022-guts", },
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{ .compatible = "fsl,p1023-guts", },
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{ .compatible = "fsl,p2020-guts", },
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{ .compatible = "fsl,bsc9132-guts", },
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{},
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};
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static const struct fsl_pm_ops mpc85xx_pm_ops = {
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.freeze_time_base = mpc85xx_freeze_time_base,
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.irq_mask = mpc85xx_irq_mask,
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.irq_unmask = mpc85xx_irq_unmask,
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.cpu_die = mpc85xx_cpu_die,
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.cpu_up_prepare = mpc85xx_cpu_up_prepare,
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};
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int __init mpc85xx_setup_pmc(void)
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{
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struct device_node *np;
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np = of_find_matching_node(NULL, mpc85xx_smp_guts_ids);
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if (np) {
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guts = of_iomap(np, 0);
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of_node_put(np);
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if (!guts) {
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pr_err("Could not map guts node address\n");
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return -ENOMEM;
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}
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}
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qoriq_pm_ops = &mpc85xx_pm_ops;
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return 0;
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}
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@ -2,7 +2,7 @@
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* Author: Andy Fleming <afleming@freescale.com>
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* Kumar Gala <galak@kernel.crashing.org>
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*
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* Copyright 2006-2008, 2011-2012 Freescale Semiconductor Inc.
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* Copyright 2006-2008, 2011-2012, 2015 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/kexec.h>
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#include <linux/highmem.h>
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#include <linux/cpu.h>
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#include <asm/dbell.h>
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#include <asm/code-patching.h>
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#include <asm/cputhreads.h>
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#include <asm/fsl_pm.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/mpic.h>
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u32 pir;
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};
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static struct ccsr_guts __iomem *guts;
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#ifdef CONFIG_HOTPLUG_CPU
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static u64 timebase;
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static int tb_req;
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static int tb_valid;
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static void mpc85xx_timebase_freeze(int freeze)
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{
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uint32_t mask;
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mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1;
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if (freeze)
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setbits32(&guts->devdisr, mask);
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else
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clrbits32(&guts->devdisr, mask);
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in_be32(&guts->devdisr);
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}
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static void mpc85xx_give_timebase(void)
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{
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unsigned long flags;
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barrier();
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tb_req = 0;
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mpc85xx_timebase_freeze(1);
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qoriq_pm_ops->freeze_time_base(true);
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#ifdef CONFIG_PPC64
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/*
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* e5500/e6500 have a workaround for erratum A-006958 in place
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while (tb_valid)
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barrier();
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mpc85xx_timebase_freeze(0);
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qoriq_pm_ops->freeze_time_base(false);
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local_irq_restore(flags);
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}
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local_irq_restore(flags);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static void smp_85xx_mach_cpu_die(void)
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{
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unsigned int cpu = smp_processor_id();
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u32 tmp;
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local_irq_disable();
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hard_irq_disable();
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/* mask all irqs to prevent cpu wakeup */
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qoriq_pm_ops->irq_mask(cpu);
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idle_task_exit();
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generic_set_cpu_dead(cpu);
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mb();
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mtspr(SPRN_TCR, 0);
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mtspr(SPRN_TSR, mfspr(SPRN_TSR));
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generic_set_cpu_dead(cpu);
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cur_cpu_spec->cpu_down_flush();
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tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP;
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mtspr(SPRN_HID0, tmp);
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isync();
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/* Enter NAP mode. */
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tmp = mfmsr();
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tmp |= MSR_WE;
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mb();
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mtmsr(tmp);
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isync();
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qoriq_pm_ops->cpu_die(cpu);
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while (1)
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;
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smp_85xx_basic_setup(cpu_nr);
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}
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static const struct of_device_id mpc85xx_smp_guts_ids[] = {
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{ .compatible = "fsl,mpc8572-guts", },
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{ .compatible = "fsl,p1020-guts", },
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{ .compatible = "fsl,p1021-guts", },
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{ .compatible = "fsl,p1022-guts", },
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{ .compatible = "fsl,p1023-guts", },
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{ .compatible = "fsl,p2020-guts", },
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{},
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};
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void __init mpc85xx_smp_init(void)
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{
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struct device_node *np;
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smp_85xx_ops.probe = NULL;
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}
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np = of_find_matching_node(NULL, mpc85xx_smp_guts_ids);
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if (np) {
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guts = of_iomap(np, 0);
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of_node_put(np);
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if (!guts) {
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pr_err("%s: Could not map guts node address\n",
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__func__);
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return;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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#ifdef CONFIG_FSL_PMC
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mpc85xx_setup_pmc();
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#endif
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if (qoriq_pm_ops) {
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smp_85xx_ops.give_timebase = mpc85xx_give_timebase;
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smp_85xx_ops.take_timebase = mpc85xx_take_timebase;
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#ifdef CONFIG_HOTPLUG_CPU
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ppc_md.cpu_die = smp_85xx_mach_cpu_die;
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#endif
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}
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#endif
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smp_ops = &smp_85xx_ops;
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#ifdef CONFIG_KEXEC
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#ifdef CONFIG_SMP
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void __init mpc85xx_smp_init(void);
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int __init mpc85xx_setup_pmc(void);
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#else
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static inline void mpc85xx_smp_init(void)
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{
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