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Merge branch 'fixes' into next/cleanup 

* fixes: (28 commits)
  ARM: ux500: add an SMP enablement type and move cpu nodes
  ARM: dts: keystone: fix dt bindings to use post div register for mainpll
  ARM: nomadik: disable UART0 on Nomadik boards
  ARM: dts: i.MX35: Fix can support.
  ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
  ARM: dts: add CPU OPP and regulator supply property for exynos4210
  ARM: dts: Update video-phy node with syscon phandle for exynos3250
  ARM: keystone: dts: rename pcie nodes to help override status
  ARM: keystone: dts: fix dt bindings for PCIe
  ARM: pxa: fix dm9000 platform data regression
  ARM: DRA7: hwmod: fix gpmc hwmod
  ARM: dts: Correct audio input route & set mic bias for am335x-pepper
  ARM: OMAP2+: Add HAVE_ARM_SCU for AM43XX
  MAINTAINERS: digicolor: add dts files
  ARM: ux500: fix MMC/SD card regression
  ARM: ux500: define serial port aliases
  ARM: dts: OMAP5: Add #iommu-cells property to IOMMUs
  ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs
  ARM: dts: Fix frequency scaling on Gumstix Pepper
  ARM: dts: configure regulators for Gumstix Pepper
  ...
hifive-unleashed-5.1
Olof Johansson 2015-08-06 10:11:36 +02:00
parent ff20775d18 bf64dd262e
commit 58e00a6c92
50 changed files with 269 additions and 111 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/arm/cpus.txt
View File

@ -199,6 +199,7 @@ nodes to be present and contain the properties described below.
"qcom,kpss-acc-v1"
"qcom,kpss-acc-v2"
"rockchip,rk3066-smp"
"ste,dbx500-smp"
- cpu-release-addr
Usage: required for systems that have an "enable-method"

1
MAINTAINERS
View File

@ -1001,6 +1001,7 @@ ARM/CONEXANT DIGICOLOR MACHINE SUPPORT
M: Baruch Siach <baruch@tkos.co.il>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/boot/dts/cx92755*
N: digicolor
ARM/EBSA110 MACHINE SUPPORT

16
arch/arm/boot/dts/am335x-pepper.dts
View File

@ -74,6 +74,7 @@
audio_codec: tlv320aic3106@1b {
compatible = "ti,tlv320aic3106";
reg = <0x1b>;
ai3x-micbias-vg = <0x2>;
};
accel: lis331dlh@1d {
@ -153,7 +154,7 @@
ti,audio-routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In";
"MIC3L", "Mic3L Switch";
};
&mcasp0 {
@ -438,41 +439,50 @@
regulators {
dcdc1_reg: regulator@0 {
/* VDD_1V8 system supply */
regulator-always-on;
};
dcdc2_reg: regulator@1 {
/* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1325000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
/* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
regulator-max-microvolt = <1325000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
/* VRTC 1.8V always-on supply */
regulator-name = "vrtc,vdds";
regulator-always-on;
};
ldo2_reg: regulator@4 {
/* 3.3V rail */
regulator-name = "vdd_3v3aux";
regulator-always-on;
};
ldo3_reg: regulator@5 {
/* VDD_3V3A 3.3V rail */
regulator-name = "vdd_3v3a";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo4_reg: regulator@6 {
/* VDD_3V3B 3.3V rail */
regulator-name = "vdd_3v3b";
regulator-always-on;
};
};
};

4
arch/arm/boot/dts/cros-ec-keyboard.dtsi
View File

@ -22,6 +22,7 @@
MATRIX_KEY(0x00, 0x02, KEY_F1)
MATRIX_KEY(0x00, 0x03, KEY_B)
MATRIX_KEY(0x00, 0x04, KEY_F10)
MATRIX_KEY(0x00, 0x05, KEY_RO)
MATRIX_KEY(0x00, 0x06, KEY_N)
MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
@ -34,6 +35,7 @@
MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
MATRIX_KEY(0x01, 0x09, KEY_F9)
MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
MATRIX_KEY(0x01, 0x0c, KEY_HENKAN)
MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
MATRIX_KEY(0x02, 0x01, KEY_TAB)
@ -45,6 +47,7 @@
MATRIX_KEY(0x02, 0x07, KEY_102ND)
MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
MATRIX_KEY(0x02, 0x09, KEY_F8)
MATRIX_KEY(0x02, 0x0a, KEY_YEN)
MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
MATRIX_KEY(0x03, 0x02, KEY_F2)
@ -53,6 +56,7 @@
MATRIX_KEY(0x03, 0x06, KEY_6)
MATRIX_KEY(0x03, 0x08, KEY_MINUS)
MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
MATRIX_KEY(0x03, 0x0c, KEY_MUHENKAN)
MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
MATRIX_KEY(0x04, 0x01, KEY_A)

2
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -138,8 +138,8 @@
mipi_phy: video-phy@10020710 {
compatible = "samsung,s5pv210-mipi-video-phy";
reg = <0x10020710 8>;
#phy-cells = <1>;
syscon = <&pmu_system_controller>;
};
pd_cam: cam-power-domain@10023C00 {

4
arch/arm/boot/dts/exynos4210-origen.dts
View File

@ -127,6 +127,10 @@
};
};
&cpu0 {
cpu0-supply = <&buck1_reg>;
};
&fimd {
pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
pinctrl-names = "default";

4
arch/arm/boot/dts/exynos4210-trats.dts
View File

@ -188,6 +188,10 @@
};
};
&cpu0 {
cpu0-supply = <&varm_breg>;
};
&dsi_0 {
vddcore-supply = <&vusb_reg>;
vddio-supply = <&vmipi_reg>;

4
arch/arm/boot/dts/exynos4210-universal_c210.dts
View File

@ -548,6 +548,10 @@
};
};
&cpu0 {
cpu0-supply = <&vdd_arm_reg>;
};
&pinctrl_1 {
hdmi_hpd: hdmi-hpd {
samsung,pins = "gpx3-7";

12
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -40,6 +40,18 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x900>;
clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu";
clock-latency = <160000>;
operating-points = <
1200000 1250000
1000000 1150000
800000 1075000
500000 975000
400000 975000
200000 950000
>;
cooling-min-level = <4>;
cooling-max-level = <2>;
#cooling-cells = <2>; /* min followed by max */

1
arch/arm/boot/dts/imx23.dtsi
View File

@ -468,6 +468,7 @@
interrupts = <36 37 38 39 40 41 42 43 44>;
status = "disabled";
clocks = <&clks 26>;
#io-channel-cells = <1>;
};
spdif@80054000 {

12
arch/arm/boot/dts/imx27.dtsi
View File

@ -108,7 +108,7 @@
};
gpt1: timer@10003000 {
compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
reg = <0x10003000 0x1000>;
interrupts = <26>;
clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
@ -117,7 +117,7 @@
};
gpt2: timer@10004000 {
compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
reg = <0x10004000 0x1000>;
interrupts = <25>;
clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>,
@ -126,7 +126,7 @@
};
gpt3: timer@10005000 {
compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
reg = <0x10005000 0x1000>;
interrupts = <24>;
clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>,
@ -376,7 +376,7 @@
};
gpt4: timer@10019000 {
compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
reg = <0x10019000 0x1000>;
interrupts = <4>;
clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>,
@ -385,7 +385,7 @@
};
gpt5: timer@1001a000 {
compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
reg = <0x1001a000 0x1000>;
interrupts = <3>;
clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>,
@ -436,7 +436,7 @@
};
gpt6: timer@1001f000 {
compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
reg = <0x1001f000 0x1000>;
interrupts = <2>;
clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>,

8
arch/arm/boot/dts/imx35.dtsi
View File

@ -286,8 +286,8 @@
can1: can@53fe4000 {
compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
reg = <0x53fe4000 0x1000>;
clocks = <&clks 33>;
clock-names = "ipg";
clocks = <&clks 33>, <&clks 33>;
clock-names = "ipg", "per";
interrupts = <43>;
status = "disabled";
};
@ -295,8 +295,8 @@
can2: can@53fe8000 {
compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
reg = <0x53fe8000 0x1000>;
clocks = <&clks 34>;
clock-names = "ipg";
clocks = <&clks 34>, <&clks 34>;
clock-names = "ipg", "per";
interrupts = <44>;
status = "disabled";
};

5
arch/arm/boot/dts/imx53-qsb-common.dtsi
View File

@ -295,9 +295,10 @@
&tve {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vga_sync>;
ddc-i2c-bus = <&i2c2>;
fsl,tve-mode = "vga";
fsl,hsync-pin = <4>;
fsl,vsync-pin = <6>;
fsl,hsync-pin = <7>; /* IPU DI1 PIN7 via EIM_OE */
fsl,vsync-pin = <8>; /* IPU DI1 PIN8 via EIM_RW */
status = "okay";
};

5
arch/arm/boot/dts/k2e-clocks.dtsi
View File

@ -13,9 +13,8 @@ clocks {
#clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock";
clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>;
reg-names = "control", "multiplier";
fixed-postdiv = <2>;
reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
reg-names = "control", "multiplier", "post-divider";
};
papllclk: papllclk@2620358 {

3
arch/arm/boot/dts/k2e.dtsi
View File

@ -86,7 +86,7 @@
gpio,syscon-dev = <&devctrl 0x240>;
};
pcie@21020000 {
pcie1: pcie@21020000 {
compatible = "ti,keystone-pcie","snps,dw-pcie";
clocks = <&clkpcie1>;
clock-names = "pcie";
@ -96,6 +96,7 @@
ranges = <0x81000000 0 0 0x23260000 0x4000 0x4000
0x82000000 0 0x60000000 0x60000000 0 0x10000000>;
status = "disabled";
device_type = "pci";
num-lanes = <2>;

5
arch/arm/boot/dts/k2hk-clocks.dtsi
View File

@ -22,9 +22,8 @@ clocks {
#clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock";
clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>;
reg-names = "control", "multiplier";
fixed-postdiv = <2>;
reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
reg-names = "control", "multiplier", "post-divider";
};
papllclk: papllclk@2620358 {

5
arch/arm/boot/dts/k2l-clocks.dtsi
View File

@ -22,9 +22,8 @@ clocks {
#clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock";
clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>;
reg-names = "control", "multiplier";
fixed-postdiv = <2>;
reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
reg-names = "control", "multiplier", "post-divider";
};
papllclk: papllclk@2620358 {

3
arch/arm/boot/dts/keystone.dtsi
View File

@ -286,7 +286,7 @@
ti,syscon-dev = <&devctrl 0x2a0>;
};
pcie@21800000 {
pcie0: pcie@21800000 {
compatible = "ti,keystone-pcie", "snps,dw-pcie";
clocks = <&clkpcie>;
clock-names = "pcie";
@ -296,6 +296,7 @@
ranges = <0x81000000 0 0 0x23250000 0 0x4000
0x82000000 0 0x50000000 0x50000000 0 0x10000000>;
status = "disabled";
device_type = "pci";
num-lanes = <2>;

2
arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
View File

@ -120,7 +120,7 @@
lcd0: display@0 {
compatible = "lgphilips,lb035q02";
label = "lcd";
label = "lcd35";
reg = <1>; /* CS1 */
spi-max-frequency = <10000000>;

2
arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi
View File

@ -98,7 +98,7 @@
lcd0: display@0 {
compatible = "samsung,lte430wq-f0c", "panel-dpi";
label = "lcd";
label = "lcd43";
pinctrl-names = "default";
pinctrl-0 = <&lte430_pins>;

2
arch/arm/boot/dts/omap4.dtsi
View File

@ -551,6 +551,7 @@
reg = <0x4a066000 0x100>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmu_dsp";
#iommu-cells = <0>;
};
mmu_ipu: mmu@55082000 {
@ -558,6 +559,7 @@
reg = <0x55082000 0x100>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmu_ipu";
#iommu-cells = <0>;
ti,iommu-bus-err-back;
};

2
arch/arm/boot/dts/omap5.dtsi
View File

@ -612,6 +612,7 @@
reg = <0x4a066000 0x100>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmu_dsp";
#iommu-cells = <0>;
};
mmu_ipu: mmu@55082000 {
@ -619,6 +620,7 @@
reg = <0x55082000 0x100>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmu_ipu";
#iommu-cells = <0>;
ti,iommu-bus-err-back;
};

32
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
View File

@ -60,6 +60,22 @@
rxc-skew-ps = <2000>;
};
&gpio2 {
status = "okay";
};
&i2c1 {
status = "okay";
accel1: accelerometer@53 {
compatible = "adi,adxl345";
reg = <0x53>;
interrupt-parent = <&portc>;
interrupts = <3 2>;
};
};
&mmc0 {
vmmc-supply = <&regulator_3_3v>;
vqmmc-supply = <&regulator_3_3v>;
@ -68,19 +84,3 @@
&usb1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&i2c1{
status = "okay";
accel1: accel1@53{
compatible = "adxl34x";
reg = <0x53>;
interrupt-parent = < &portc >;
interrupts = <3 2>;
};
};

7
arch/arm/boot/dts/ste-ccu8540.dts
View File

@ -17,6 +17,13 @@
model = "ST-Ericsson U8540 platform with Device Tree";
compatible = "st-ericsson,ccu8540", "st-ericsson,u8540";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
memory@0 {
device_type = "memory";
reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>;

7
arch/arm/boot/dts/ste-ccu9540.dts
View File

@ -16,6 +16,13 @@
model = "ST-Ericsson CCU9540 platform with Device Tree";
compatible = "st-ericsson,ccu9540", "st-ericsson,u9540";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
memory {
reg = <0x00000000 0x20000000>;
};

59
arch/arm/boot/dts/ste-dbx5x0.dtsi
View File

@ -15,6 +15,33 @@
#include "skeleton.dtsi"
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "ste,dbx500-smp";
cpu-map {
cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
};
};
CPU0: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x300>;
};
CPU1: cpu@301 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x301>;
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
@ -22,32 +49,6 @@
interrupt-parent = <&intc>;
ranges;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
};
};
CPU0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
};
CPU1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
};
};
ptm@801ae000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x801ae000 0x1000>;
@ -971,7 +972,7 @@
power-domains = <&pm_domains DOMAIN_VAPE>;
};
uart@80120000 {
ux500_serial0: uart@80120000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80120000 0x1000>;
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
@ -986,7 +987,7 @@
status = "disabled";
};
uart@80121000 {
ux500_serial1: uart@80121000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80121000 0x1000>;
interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
@ -1001,7 +1002,7 @@
status = "disabled";
};
uart@80007000 {
ux500_serial2: uart@80007000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80007000 0x1000>;
interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/boot/dts/ste-href.dtsi
View File

@ -32,11 +32,11 @@
status = "okay";
};
/* This UART is unused and thus left disabled */
uart@80121000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_default_mode>;
pinctrl-1 = <&uart1_sleep_mode>;
status = "okay";
};
uart@80007000 {

7
arch/arm/boot/dts/ste-hrefprev60-stuib.dts
View File

@ -17,6 +17,13 @@
model = "ST-Ericsson HREF (pre-v60) and ST UIB";
compatible = "st-ericsson,mop500", "st-ericsson,u8500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
soc {
/* Reset line for the BU21013 touchscreen */
i2c@80110000 {

7
arch/arm/boot/dts/ste-hrefprev60-tvk.dts
View File

@ -16,4 +16,11 @@
/ {
model = "ST-Ericsson HREF (pre-v60) and TVK1281618 UIB";
compatible = "st-ericsson,mop500", "st-ericsson,u8500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
};

5
arch/arm/boot/dts/ste-hrefprev60.dtsi
View File

@ -23,6 +23,11 @@
};
soc {
/* Enable UART1 on this board */
uart@80121000 {
status = "okay";
};
i2c@80004000 {
tps61052@33 {
compatible = "tps61052";

7
arch/arm/boot/dts/ste-hrefv60plus-stuib.dts
View File

@ -19,6 +19,13 @@
model = "ST-Ericsson HREF (v60+) and ST UIB";
compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
soc {
/* Reset line for the BU21013 touchscreen */
i2c@80110000 {

7
arch/arm/boot/dts/ste-hrefv60plus-tvk.dts
View File

@ -18,4 +18,11 @@
/ {
model = "ST-Ericsson HREF (v60+) and TVK1281618 UIB";
compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
};

25
arch/arm/boot/dts/ste-hrefv60plus.dtsi
View File

@ -43,15 +43,26 @@
<&vaudio_hf_hrefv60_mode>,
<&gbf_hrefv60_mode>,
<&hdtv_hrefv60_mode>,
<&touch_hrefv60_mode>;
<&touch_hrefv60_mode>,
<&gpios_hrefv60_mode>;
sdi0 {
/* SD card detect GPIO pin, extend default state */
sdi0_default_mode: sdi0_default {
/* SD card detect GPIO pin, extend default state */
default_hrefv60_cfg1 {
pins = "GPIO95_E8";
ste,config = <&gpio_in_pu>;
};
/* VMMCI level-shifter enable */
default_hrefv60_cfg2 {
pins = "GPIO169_D22";
ste,config = <&gpio_out_lo>;
};
/* VMMCI level-shifter voltage select */
default_hrefv60_cfg3 {
pins = "GPIO5_AG6";
ste,config = <&gpio_out_hi>;
};
};
};
ipgpio {
@ -213,6 +224,16 @@
};
};
};
gpios {
/* Dangling GPIO pins */
gpios_hrefv60_mode: gpios_hrefv60 {
default_cfg1 {
/* Normally UART1 RXD, now dangling */
pins = "GPIO4_AH6";
ste,config = <&in_pu>;
};
};
};
};
};
};

1
arch/arm/boot/dts/ste-nomadik-nhk15.dts
View File

@ -17,6 +17,7 @@
};
aliases {
serial1 = &uart1;
stmpe-i2c0 = &stmpe0;
stmpe-i2c1 = &stmpe1;
};

4
arch/arm/boot/dts/ste-nomadik-s8815.dts
View File

@ -15,6 +15,10 @@
bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
};
aliases {
serial1 = &uart1;
};
src@101e0000 {
/* These chrystal drivers are not used on this board */
disable-sxtalo;

1
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
View File

@ -757,6 +757,7 @@
clock-names = "uartclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&uart0_default_mux>;
status = "disabled";
};
uart1: uart@101fb000 {

25
arch/arm/boot/dts/ste-snowball.dts
View File

@ -18,6 +18,13 @@
model = "Calao Systems Snowball platform with device tree";
compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
memory {
reg = <0x00000000 0x20000000>;
};
@ -223,11 +230,11 @@
status = "okay";
};
/* This UART is unused and thus left disabled */
uart@80121000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_default_mode>;
pinctrl-1 = <&uart1_sleep_mode>;
status = "okay";
};
uart@80007000 {
@ -452,7 +459,21 @@
pins = "GPIO21_AB3"; /* DAT31DIR */
ste,config = <&out_hi>;
};
/* SD card detect GPIO pin, extend default state */
snowball_cfg2 {
pins = "GPIO218_AH11";
ste,config = <&gpio_in_pu>;
};
/* VMMCI level-shifter enable */
snowball_cfg3 {
pins = "GPIO217_AH12";
ste,config = <&gpio_out_lo>;
};
/* VMMCI level-shifter voltage select */
snowball_cfg4 {
pins = "GPIO228_AJ6";
ste,config = <&gpio_out_hi>;
};
};
};
ssp0 {

27
arch/arm/mach-imx/gpc.c
View File

@ -291,8 +291,6 @@ void __init imx_gpc_check_dt(void)
}
}
#ifdef CONFIG_PM_GENERIC_DOMAINS
static void _imx6q_pm_pu_power_off(struct generic_pm_domain *genpd)
{
int iso, iso2sw;
@ -399,7 +397,6 @@ static struct genpd_onecell_data imx_gpc_onecell_data = {
static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg)
{
struct clk *clk;
bool is_off;
int i;
imx6q_pu_domain.reg = pu_reg;
@ -416,18 +413,13 @@ static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg)
}
imx6q_pu_domain.num_clks = i;
is_off = IS_ENABLED(CONFIG_PM);
if (is_off) {
_imx6q_pm_pu_power_off(&imx6q_pu_domain.base);
} else {
/*
* Enable power if compiled without CONFIG_PM in case the
* bootloader disabled it.
*/
imx6q_pm_pu_power_on(&imx6q_pu_domain.base);
}
/* Enable power always in case bootloader disabled it. */
imx6q_pm_pu_power_on(&imx6q_pu_domain.base);
pm_genpd_init(&imx6q_pu_domain.base, NULL, is_off);
if (!IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS))
return 0;
pm_genpd_init(&imx6q_pu_domain.base, NULL, false);
return of_genpd_add_provider_onecell(dev->of_node,
&imx_gpc_onecell_data);
@ -437,13 +429,6 @@ clk_err:
return -EINVAL;
}
#else
static inline int imx_gpc_genpd_init(struct device *dev, struct regulator *reg)
{
return 0;
}
#endif /* CONFIG_PM_GENERIC_DOMAINS */
static int imx_gpc_probe(struct platform_device *pdev)
{
struct regulator *pu_reg;

1
arch/arm/mach-omap2/Kconfig
View File

@ -60,6 +60,7 @@ config SOC_AM43XX
select ARM_GIC
select MACH_OMAP_GENERIC
select MIGHT_HAVE_CACHE_L2X0
select HAVE_ARM_SCU
config SOC_DRA7XX
bool "TI DRA7XX"

24
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -2373,6 +2373,9 @@ static int of_dev_hwmod_lookup(struct device_node *np,
* registers. This address is needed early so the OCP registers that
* are part of the device's address space can be ioremapped properly.
*
* If SYSC access is not needed, the registers will not be remapped
* and non-availability of MPU access is not treated as an error.
*
* Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
* -ENXIO on absent or invalid register target address space.
*/
@ -2387,6 +2390,11 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
_save_mpu_port_index(oh);
/* if we don't need sysc access we don't need to ioremap */
if (!oh->class->sysc)
return 0;
/* we can't continue without MPU PORT if we need sysc access */
if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
return -ENXIO;
@ -2396,8 +2404,10 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
oh->name);
/* Extract the IO space from device tree blob */
if (!np)
if (!np) {
pr_err("omap_hwmod: %s: no dt node\n", oh->name);
return -ENXIO;
}
va_start = of_iomap(np, index + oh->mpu_rt_idx);
} else {
@ -2456,13 +2466,11 @@ static int __init _init(struct omap_hwmod *oh, void *data)
oh->name, np->name);
}
if (oh->class->sysc) {
r = _init_mpu_rt_base(oh, NULL, index, np);
if (r < 0) {
WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
oh->name);
return 0;
}
r = _init_mpu_rt_base(oh, NULL, index, np);
if (r < 0) {
WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
oh->name);
return 0;
}
r = _init_clocks(oh, NULL);

5
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
View File

@ -827,8 +827,7 @@ static struct omap_hwmod_class_sysconfig dra7xx_gpmc_sysc = {
.syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1,
};
@ -844,7 +843,7 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
.class = &dra7xx_gpmc_hwmod_class,
.clkdm_name = "l3main1_clkdm",
/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
.flags = HWMOD_SWSUP_SIDLE | DEBUG_OMAP_GPMC_HWMOD_FLAGS,
.flags = DEBUG_OMAP_GPMC_HWMOD_FLAGS,
.main_clk = "l3_iclk_div",
.prcm = {
.omap4 = {

3
arch/arm/mach-pxa/capc7117.c
View File

@ -24,6 +24,7 @@
#include <linux/ata_platform.h>
#include <linux/serial_8250.h>
#include <linux/gpio.h>
#include <linux/regulator/machine.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -144,6 +145,8 @@ static void __init capc7117_init(void)
capc7117_uarts_init();
capc7117_ide_init();
regulator_has_full_constraints();
}
MACHINE_START(CAPC7117,

3
arch/arm/mach-pxa/cm-x2xx.c
View File

@ -13,6 +13,7 @@
#include <linux/syscore_ops.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/regulator/machine.h>
#include <linux/dm9000.h>
#include <linux/leds.h>
@ -466,6 +467,8 @@ static void __init cmx2xx_init(void)
cmx2xx_init_ac97();
cmx2xx_init_touchscreen();
cmx2xx_init_leds();
regulator_has_full_constraints();
}
static void __init cmx2xx_init_irq(void)

2
arch/arm/mach-pxa/cm-x300.c
View File

@ -835,6 +835,8 @@ static void __init cm_x300_init(void)
cm_x300_init_ac97();
cm_x300_init_wi2wi();
cm_x300_init_bl();
regulator_has_full_constraints();
}
static void __init cm_x300_fixup(struct tag *tags, char **cmdline)

3
arch/arm/mach-pxa/colibri-pxa270.c
View File

@ -18,6 +18,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/ucb1400.h>
#include <asm/mach/arch.h>
@ -294,6 +295,8 @@ static void __init colibri_pxa270_init(void)
printk(KERN_ERR "Illegal colibri_pxa270_baseboard type %d\n",
colibri_pxa270_baseboard);
}
regulator_has_full_constraints();
}
/* The "Income s.r.o. SH-Dmaster PXA270 SBC" board can be booted either

2
arch/arm/mach-pxa/em-x270.c
View File

@ -1306,6 +1306,8 @@ static void __init em_x270_init(void)
em_x270_init_i2c();
em_x270_init_camera();
em_x270_userspace_consumers_init();
regulator_has_full_constraints();
}
MACHINE_START(EM_X270, "Compulab EM-X270")

3
arch/arm/mach-pxa/icontrol.c
View File

@ -26,6 +26,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/can/platform/mcp251x.h>
#include <linux/regulator/machine.h>
#include "generic.h"
@ -185,6 +186,8 @@ static void __init icontrol_init(void)
mxm_8x10_mmc_init();
icontrol_can_init();
regulator_has_full_constraints();
}
MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")

3
arch/arm/mach-pxa/trizeps4.c
View File

@ -26,6 +26,7 @@
#include <linux/dm9000.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/pxa-i2c.h>
#include <asm/types.h>
@ -534,6 +535,8 @@ static void __init trizeps4_init(void)
BCR_writew(trizeps_conxs_bcr);
board_backlight_power(1);
regulator_has_full_constraints();
}
static void __init trizeps4_map_io(void)

3
arch/arm/mach-pxa/vpac270.c
View File

@ -24,6 +24,7 @@
#include <linux/dm9000.h>
#include <linux/ucb1400.h>
#include <linux/ata_platform.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/max1586.h>
#include <linux/i2c/pxa-i2c.h>
@ -711,6 +712,8 @@ static void __init vpac270_init(void)
vpac270_ts_init();
vpac270_rtc_init();
vpac270_ide_init();
regulator_has_full_constraints();
}
MACHINE_START(VPAC270, "Voipac PXA270")

2
arch/arm/mach-pxa/zeus.c
View File

@ -869,6 +869,8 @@ static void __init zeus_init(void)
i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
regulator_has_full_constraints();
}
static struct map_desc zeus_io_desc[] __initdata = {