drm/i915: dynamically set up bsd ring functions and params
The same treatment for the bsd ring. Again, this will be split up further by the irq rework. Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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59465b5f78
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@ -1265,22 +1265,6 @@ void intel_ring_advance(struct intel_ring_buffer *ring)
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ring->write_tail(ring, ring->tail);
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}
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/* ring buffer for bit-stream decoder */
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static const struct intel_ring_buffer bsd_ring = {
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.name = "bsd ring",
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.id = VCS,
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.mmio_base = BSD_RING_BASE,
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.init = init_ring_common,
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.write_tail = ring_write_tail,
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.flush = bsd_ring_flush,
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.add_request = ring_add_request,
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.get_seqno = ring_get_seqno,
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.irq_get = bsd_ring_get_irq,
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.irq_put = bsd_ring_put_irq,
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.dispatch_execbuffer = ring_dispatch_execbuffer,
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};
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static void gen6_bsd_ring_write_tail(struct intel_ring_buffer *ring,
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u32 value)
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@ -1343,27 +1327,6 @@ gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
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return 0;
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}
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/* ring buffer for Video Codec for Gen6+ */
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static const struct intel_ring_buffer gen6_bsd_ring = {
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.name = "gen6 bsd ring",
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.id = VCS,
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.mmio_base = GEN6_BSD_RING_BASE,
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.init = init_ring_common,
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.write_tail = gen6_bsd_ring_write_tail,
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.flush = gen6_ring_flush,
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.add_request = gen6_add_request,
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.get_seqno = gen6_ring_get_seqno,
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.irq_enable_mask = GEN6_BSD_USER_INTERRUPT,
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.irq_get = gen6_ring_get_irq,
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.irq_put = gen6_ring_put_irq,
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.dispatch_execbuffer = gen6_ring_dispatch_execbuffer,
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.sync_to = gen6_bsd_ring_sync_to,
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.semaphore_register = {MI_SEMAPHORE_SYNC_VR,
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MI_SEMAPHORE_SYNC_INVALID,
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MI_SEMAPHORE_SYNC_VB},
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.signal_mbox = {GEN6_RVSYNC, GEN6_BVSYNC},
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};
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/* Blitter support (SandyBridge+) */
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static int blt_ring_flush(struct intel_ring_buffer *ring,
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@ -1531,10 +1494,37 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct intel_ring_buffer *ring = &dev_priv->ring[VCS];
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if (IS_GEN6(dev) || IS_GEN7(dev))
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*ring = gen6_bsd_ring;
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else
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*ring = bsd_ring;
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ring->name = "bsd ring";
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ring->id = VCS;
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if (IS_GEN6(dev) || IS_GEN7(dev)) {
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ring->mmio_base = GEN6_BSD_RING_BASE;
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ring->write_tail = gen6_bsd_ring_write_tail;
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ring->flush = gen6_ring_flush;
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ring->add_request = gen6_add_request;
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ring->get_seqno = gen6_ring_get_seqno;
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ring->irq_enable_mask = GEN6_BSD_USER_INTERRUPT;
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ring->irq_get = gen6_ring_get_irq;
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ring->irq_put = gen6_ring_put_irq;
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ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
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ring->sync_to = gen6_bsd_ring_sync_to;
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ring->semaphore_register[0] = MI_SEMAPHORE_SYNC_VR;
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ring->semaphore_register[1] = MI_SEMAPHORE_SYNC_INVALID;
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ring->semaphore_register[2] = MI_SEMAPHORE_SYNC_VB;
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ring->signal_mbox[0] = GEN6_RVSYNC;
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ring->signal_mbox[1] = GEN6_BVSYNC;
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} else {
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ring->mmio_base = BSD_RING_BASE;
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ring->write_tail = ring_write_tail;
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ring->flush = bsd_ring_flush;
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ring->add_request = ring_add_request;
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ring->get_seqno = ring_get_seqno;
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ring->irq_get = bsd_ring_get_irq;
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ring->irq_put = bsd_ring_put_irq;
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ring->dispatch_execbuffer = ring_dispatch_execbuffer;
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}
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ring->init = init_ring_common;
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return intel_init_ring_buffer(dev, ring);
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}
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