powerpc/pnv/pci: Fix incorrect PE reservation attempt on some 64-bit BARs
The generic allocation code may sometimes decide to assign a prefetchable 64-bit BAR to the M32 window. In fact it may also decide to allocate a 64-bit non-prefetchable BAR to the M64 one ! So using the resource flags as a test to decide which window was used for PE allocation is just wrong and leads to insane PE numbers. Instead, compare the addresses to figure it out. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [mpe: Rename the function as agreed by Ben & Gavin] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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5958d19a14
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@ -111,10 +111,17 @@ static int __init iommu_setup(char *str)
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}
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}
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early_param("iommu", iommu_setup);
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early_param("iommu", iommu_setup);
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static inline bool pnv_pci_is_mem_pref_64(unsigned long flags)
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static inline bool pnv_pci_is_m64(struct pnv_phb *phb, struct resource *r)
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{
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{
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return ((flags & (IORESOURCE_MEM_64 | IORESOURCE_PREFETCH)) ==
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/*
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(IORESOURCE_MEM_64 | IORESOURCE_PREFETCH));
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* WARNING: We cannot rely on the resource flags. The Linux PCI
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* allocation code sometimes decides to put a 64-bit prefetchable
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* BAR in the 32-bit window, so we have to compare the addresses.
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*
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* For simplicity we only test resource start.
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*/
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return (r->start >= phb->ioda.m64_base &&
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r->start < (phb->ioda.m64_base + phb->ioda.m64_size));
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}
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}
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static struct pnv_ioda_pe *pnv_ioda_init_pe(struct pnv_phb *phb, int pe_no)
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static struct pnv_ioda_pe *pnv_ioda_init_pe(struct pnv_phb *phb, int pe_no)
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@ -229,7 +236,7 @@ static void pnv_ioda_reserve_dev_m64_pe(struct pci_dev *pdev,
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sgsz = phb->ioda.m64_segsize;
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sgsz = phb->ioda.m64_segsize;
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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r = &pdev->resource[i];
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r = &pdev->resource[i];
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if (!r->parent || !pnv_pci_is_mem_pref_64(r->flags))
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if (!r->parent || !pnv_pci_is_m64(phb, r))
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continue;
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continue;
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start = _ALIGN_DOWN(r->start - base, sgsz);
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start = _ALIGN_DOWN(r->start - base, sgsz);
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@ -2863,7 +2870,7 @@ static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)
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res = &pdev->resource[i + PCI_IOV_RESOURCES];
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res = &pdev->resource[i + PCI_IOV_RESOURCES];
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if (!res->flags || res->parent)
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if (!res->flags || res->parent)
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continue;
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continue;
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if (!pnv_pci_is_mem_pref_64(res->flags)) {
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if (!pnv_pci_is_m64(phb, res)) {
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dev_warn(&pdev->dev, "Don't support SR-IOV with"
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dev_warn(&pdev->dev, "Don't support SR-IOV with"
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" non M64 VF BAR%d: %pR. \n",
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" non M64 VF BAR%d: %pR. \n",
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i, res);
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i, res);
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@ -2958,7 +2965,7 @@ static void pnv_ioda_setup_pe_res(struct pnv_ioda_pe *pe,
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index++;
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index++;
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}
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}
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} else if ((res->flags & IORESOURCE_MEM) &&
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} else if ((res->flags & IORESOURCE_MEM) &&
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!pnv_pci_is_mem_pref_64(res->flags)) {
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!pnv_pci_is_m64(phb, res)) {
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region.start = res->start -
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region.start = res->start -
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phb->hose->mem_offset[0] -
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phb->hose->mem_offset[0] -
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phb->ioda.m32_pci_base;
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phb->ioda.m32_pci_base;
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@ -3083,9 +3090,12 @@ static resource_size_t pnv_pci_window_alignment(struct pci_bus *bus,
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bridge = bridge->bus->self;
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bridge = bridge->bus->self;
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}
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}
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/* We fail back to M32 if M64 isn't supported */
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/*
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if (phb->ioda.m64_segsize &&
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* We fall back to M32 if M64 isn't supported. We enforce the M64
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pnv_pci_is_mem_pref_64(type))
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* alignment for any 64-bit resource, PCIe doesn't care and
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* bridges only do 64-bit prefetchable anyway.
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*/
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if (phb->ioda.m64_segsize && (type & IORESOURCE_MEM_64))
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return phb->ioda.m64_segsize;
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return phb->ioda.m64_segsize;
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if (type & IORESOURCE_MEM)
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if (type & IORESOURCE_MEM)
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return phb->ioda.m32_segsize;
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return phb->ioda.m32_segsize;
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@ -3125,7 +3135,7 @@ static void pnv_pci_fixup_bridge_resources(struct pci_bus *bus,
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w = NULL;
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w = NULL;
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if (r->flags & type & IORESOURCE_IO)
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if (r->flags & type & IORESOURCE_IO)
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w = &hose->io_resource;
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w = &hose->io_resource;
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else if (pnv_pci_is_mem_pref_64(r->flags) &&
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else if (pnv_pci_is_m64(phb, r) &&
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(type & IORESOURCE_PREFETCH) &&
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(type & IORESOURCE_PREFETCH) &&
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phb->ioda.m64_segsize)
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phb->ioda.m64_segsize)
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w = &hose->mem_resources[1];
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w = &hose->mem_resources[1];
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