Merge branch 'stmmac-STM32F429'
Alexandre TORGUE says: ==================== Add Ethernet support on STM32F429 STM32F429 Chip embeds a Synopsys 3.50a MAC IP. This series enhance current stmmac driver to control it (code already available) and adds basic glue for STM32F429 chip. Changes since v5: -Fix typo in bindings documentation patch. -Change clocks names in stm32-dwmac glue driver / Documentation. -After rebase, stm32 ethernet node is now available. It has to be updated according to new clocks names. Changes since v4: -Fix dirty copy/past in bindings documentation patch. Changes since v3: -Fix "tx-clk" and "rx-clk" as required clocks. Driver and bindings are modified. Changes since v2: -Fix alphabetic order in Kconfig and Makefile. -Improve code according to Joachim review. -Binding: remove useless entry. Changes since v1: -Fix Kbuild issue in Kconfig. -Remove init/exit callbacks. Suspend/Resume and remove driver is no more driven in stmmac_pltfr but directly in dwmac-stm32 glue driver. -Take into account Joachim review. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>hifive-unleashed-5.1
David S. Miller
commit
5a25634719
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@ -0,0 +1,32 @@
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STMicroelectronics STM32 / MCU DWMAC glue layer controller
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This file documents platform glue layer for stmmac.
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Please see stmmac.txt for the other unchanged properties.
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The device node has following properties.
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Required properties:
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- compatible: Should be "st,stm32-dwmac" to select glue, and
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"snps,dwmac-3.50a" to select IP version.
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- clocks: Must contain a phandle for each entry in clock-names.
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- clock-names: Should be "stmmaceth" for the host clock.
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Should be "mac-clk-tx" for the MAC TX clock.
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Should be "mac-clk-rx" for the MAC RX clock.
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- st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
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encompases the glue register, and the offset of the control register.
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Example:
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ethernet@40028000 {
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compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
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status = "disabled";
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reg = <0x40028000 0x8000>;
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reg-names = "stmmaceth";
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interrupts = <0 61 0>, <0 62 0>;
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interrupt-names = "macirq", "eth_wake_irq";
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clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
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clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
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st,syscon = <&syscfg 0x4>;
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snps,pbl = <8>;
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snps,mixed-burst;
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dma-ranges;
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};
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@ -104,6 +104,18 @@ config DWMAC_STI
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device driver. This driver is used on for the STi series
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SOCs GMAC ethernet controller.
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config DWMAC_STM32
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tristate "STM32 DWMAC support"
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default ARCH_STM32
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depends on OF && HAS_IOMEM
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select MFD_SYSCON
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---help---
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Support for ethernet controller on STM32 SOCs.
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This selects STM32 SoC glue layer support for the stmmac
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device driver. This driver is used on for the STM32 series
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SOCs GMAC ethernet controller.
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config DWMAC_SUNXI
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tristate "Allwinner GMAC support"
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default ARCH_SUNXI
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@ -13,6 +13,7 @@ obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o
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obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o
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obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
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obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
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obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
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obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
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obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o
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stmmac-platform-objs:= stmmac_platform.o
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@ -0,0 +1,193 @@
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/*
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* dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
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*
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* Copyright (C) Alexandre Torgue 2015
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* Author: Alexandre Torgue <alexandre.torgue@gmail.com>
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* License terms: GNU General Public License (GPL), version 2
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*
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*/
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#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_net.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/stmmac.h>
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#include "stmmac_platform.h"
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#define MII_PHY_SEL_MASK BIT(23)
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struct stm32_dwmac {
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struct clk *clk_tx;
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struct clk *clk_rx;
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u32 mode_reg; /* MAC glue-logic mode register */
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struct regmap *regmap;
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u32 speed;
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};
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static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat)
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{
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struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
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u32 reg = dwmac->mode_reg;
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u32 val;
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int ret;
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val = (plat_dat->interface == PHY_INTERFACE_MODE_MII) ? 0 : 1;
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ret = regmap_update_bits(dwmac->regmap, reg, MII_PHY_SEL_MASK, val);
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if (ret)
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return ret;
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ret = clk_prepare_enable(dwmac->clk_tx);
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if (ret)
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return ret;
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ret = clk_prepare_enable(dwmac->clk_rx);
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if (ret)
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clk_disable_unprepare(dwmac->clk_tx);
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return ret;
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}
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static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac)
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{
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clk_disable_unprepare(dwmac->clk_tx);
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clk_disable_unprepare(dwmac->clk_rx);
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}
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static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
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struct device *dev)
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{
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struct device_node *np = dev->of_node;
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int err;
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/* Get TX/RX clocks */
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dwmac->clk_tx = devm_clk_get(dev, "mac-clk-tx");
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if (IS_ERR(dwmac->clk_tx)) {
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dev_err(dev, "No tx clock provided...\n");
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return PTR_ERR(dwmac->clk_tx);
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}
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dwmac->clk_rx = devm_clk_get(dev, "mac-clk-rx");
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if (IS_ERR(dwmac->clk_rx)) {
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dev_err(dev, "No rx clock provided...\n");
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return PTR_ERR(dwmac->clk_rx);
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}
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/* Get mode register */
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dwmac->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscon");
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if (IS_ERR(dwmac->regmap))
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return PTR_ERR(dwmac->regmap);
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err = of_property_read_u32_index(np, "st,syscon", 1, &dwmac->mode_reg);
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if (err)
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dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err);
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return err;
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}
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static int stm32_dwmac_probe(struct platform_device *pdev)
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{
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struct plat_stmmacenet_data *plat_dat;
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struct stmmac_resources stmmac_res;
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struct stm32_dwmac *dwmac;
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int ret;
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ret = stmmac_get_platform_resources(pdev, &stmmac_res);
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if (ret)
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return ret;
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plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
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if (IS_ERR(plat_dat))
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return PTR_ERR(plat_dat);
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dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
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if (!dwmac)
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return -ENOMEM;
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ret = stm32_dwmac_parse_data(dwmac, &pdev->dev);
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if (ret) {
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dev_err(&pdev->dev, "Unable to parse OF data\n");
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return ret;
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}
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plat_dat->bsp_priv = dwmac;
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ret = stm32_dwmac_init(plat_dat);
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if (ret)
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return ret;
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ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
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if (ret)
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stm32_dwmac_clk_disable(dwmac);
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return ret;
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}
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static int stm32_dwmac_remove(struct platform_device *pdev)
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{
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct stmmac_priv *priv = netdev_priv(ndev);
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int ret = stmmac_dvr_remove(&pdev->dev);
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stm32_dwmac_clk_disable(priv->plat->bsp_priv);
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return ret;
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}
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#ifdef CONFIG_PM_SLEEP
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static int stm32_dwmac_suspend(struct device *dev)
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{
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struct net_device *ndev = dev_get_drvdata(dev);
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struct stmmac_priv *priv = netdev_priv(ndev);
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int ret;
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ret = stmmac_suspend(dev);
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stm32_dwmac_clk_disable(priv->plat->bsp_priv);
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return ret;
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}
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static int stm32_dwmac_resume(struct device *dev)
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{
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struct net_device *ndev = dev_get_drvdata(dev);
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struct stmmac_priv *priv = netdev_priv(ndev);
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int ret;
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ret = stm32_dwmac_init(priv->plat);
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if (ret)
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return ret;
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ret = stmmac_resume(dev);
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return ret;
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}
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#endif /* CONFIG_PM_SLEEP */
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SIMPLE_DEV_PM_OPS(stm32_dwmac_pm_ops, stm32_dwmac_suspend, stm32_dwmac_resume);
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static const struct of_device_id stm32_dwmac_match[] = {
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{ .compatible = "st,stm32-dwmac"},
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{ }
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};
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MODULE_DEVICE_TABLE(of, stm32_dwmac_match);
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static struct platform_driver stm32_dwmac_driver = {
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.probe = stm32_dwmac_probe,
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.remove = stm32_dwmac_remove,
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.driver = {
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.name = "stm32-dwmac",
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.pm = &stm32_dwmac_pm_ops,
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.of_match_table = stm32_dwmac_match,
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},
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};
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module_platform_driver(stm32_dwmac_driver);
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MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@gmail.com>");
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MODULE_DESCRIPTION("STMicroelectronics MCU DWMAC Specific Glue layer");
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MODULE_LICENSE("GPL v2");
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@ -265,6 +265,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
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* once needed on other platforms.
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*/
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if (of_device_is_compatible(np, "st,spear600-gmac") ||
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of_device_is_compatible(np, "snps,dwmac-3.50a") ||
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of_device_is_compatible(np, "snps,dwmac-3.70a") ||
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of_device_is_compatible(np, "snps,dwmac")) {
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/* Note that the max-frame-size parameter as defined in the
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