drm/gma500: add support for atom e6xx lpc lvds i2c
add gpio bitbanging i2c adapter on LPC device of atom e6xx gpu chipset to access lvds EDID tested on SECO QuadMo747-E6xx-EXTREME Qseven platform Reviewed-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Jan Safrata <jan.nikitenko@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>hifive-unleashed-5.1
Jan Safrata
Dave Airlie
parent
e8115e79aa
commit
5a52b1f2f6
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@ -39,6 +39,7 @@ gma500_gfx-$(CONFIG_DRM_GMA3600) += cdv_device.o \
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gma500_gfx-$(CONFIG_DRM_GMA600) += oaktrail_device.o \
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oaktrail_crtc.o \
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oaktrail_lvds.o \
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oaktrail_lvds_i2c.o \
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oaktrail_hdmi.o \
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oaktrail_hdmi_i2c.o
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@ -359,22 +359,26 @@ void oaktrail_lvds_init(struct drm_device *dev,
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* if closed, act like it's not there for now
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*/
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edid = NULL;
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mutex_lock(&dev->mode_config.mutex);
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i2c_adap = i2c_get_adapter(dev_priv->ops->i2c_bus);
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if (i2c_adap == NULL)
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dev_err(dev->dev, "No ddc adapter available!\n");
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if (i2c_adap)
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edid = drm_get_edid(connector, i2c_adap);
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if (edid == NULL && dev_priv->lpc_gpio_base) {
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oaktrail_lvds_i2c_init(encoder);
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if (gma_encoder->ddc_bus != NULL) {
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i2c_adap = &gma_encoder->ddc_bus->adapter;
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edid = drm_get_edid(connector, i2c_adap);
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}
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}
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/*
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* Attempt to get the fixed panel mode from DDC. Assume that the
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* preferred mode is the right one.
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*/
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if (i2c_adap) {
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edid = drm_get_edid(connector, i2c_adap);
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if (edid) {
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drm_mode_connector_update_edid_property(connector,
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edid);
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drm_add_edid_modes(connector, edid);
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kfree(edid);
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}
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if (edid) {
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drm_mode_connector_update_edid_property(connector, edid);
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drm_add_edid_modes(connector, edid);
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kfree(edid);
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list_for_each_entry(scan, &connector->probed_modes, head) {
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if (scan->type & DRM_MODE_TYPE_PREFERRED) {
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@ -383,7 +387,8 @@ void oaktrail_lvds_init(struct drm_device *dev,
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goto out; /* FIXME: check for quirks */
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}
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}
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}
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} else
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dev_err(dev->dev, "No ddc adapter available!\n");
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/*
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* If we didn't get EDID, try geting panel timing
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* from configuration data
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@ -411,8 +416,10 @@ failed_find:
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mutex_unlock(&dev->mode_config.mutex);
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dev_dbg(dev->dev, "No LVDS modes found, disabling.\n");
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if (gma_encoder->ddc_bus)
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if (gma_encoder->ddc_bus) {
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psb_intel_i2c_destroy(gma_encoder->ddc_bus);
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gma_encoder->ddc_bus = NULL;
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}
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/* failed_ddc: */
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@ -0,0 +1,170 @@
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/*
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* Copyright (c) 2002-2010, Intel Corporation.
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* Copyright (c) 2014 ATRON electronic GmbH
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* Author: Jan Safrata <jan.nikitenko@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/types.h>
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <drm/drmP.h>
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#include "psb_drv.h"
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#include "psb_intel_reg.h"
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/*
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* LPC GPIO based I2C bus for LVDS of Atom E6xx
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*/
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/*-----------------------------------------------------------------------------
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* LPC Register Offsets. Used for LVDS GPIO Bit Bashing. Registers are part
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* Atom E6xx [D31:F0]
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----------------------------------------------------------------------------*/
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#define RGEN 0x20
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#define RGIO 0x24
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#define RGLVL 0x28
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#define RGTPE 0x2C
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#define RGTNE 0x30
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#define RGGPE 0x34
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#define RGSMI 0x38
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#define RGTS 0x3C
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/* The LVDS GPIO clock lines are GPIOSUS[3]
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* The LVDS GPIO data lines are GPIOSUS[4]
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*/
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#define GPIO_CLOCK 0x08
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#define GPIO_DATA 0x10
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#define LPC_READ_REG(chan, r) inl((chan)->reg + (r))
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#define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r))
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static int get_clock(void *data)
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{
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struct psb_intel_i2c_chan *chan = data;
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u32 val, tmp;
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val = LPC_READ_REG(chan, RGIO);
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val |= GPIO_CLOCK;
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LPC_WRITE_REG(chan, RGIO, val);
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tmp = LPC_READ_REG(chan, RGLVL);
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val = (LPC_READ_REG(chan, RGLVL) & GPIO_CLOCK) ? 1 : 0;
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return val;
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}
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static int get_data(void *data)
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{
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struct psb_intel_i2c_chan *chan = data;
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u32 val, tmp;
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val = LPC_READ_REG(chan, RGIO);
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val |= GPIO_DATA;
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LPC_WRITE_REG(chan, RGIO, val);
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tmp = LPC_READ_REG(chan, RGLVL);
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val = (LPC_READ_REG(chan, RGLVL) & GPIO_DATA) ? 1 : 0;
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return val;
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}
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static void set_clock(void *data, int state_high)
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{
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struct psb_intel_i2c_chan *chan = data;
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u32 val;
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if (state_high) {
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val = LPC_READ_REG(chan, RGIO);
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val |= GPIO_CLOCK;
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LPC_WRITE_REG(chan, RGIO, val);
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} else {
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val = LPC_READ_REG(chan, RGIO);
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val &= ~GPIO_CLOCK;
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LPC_WRITE_REG(chan, RGIO, val);
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val = LPC_READ_REG(chan, RGLVL);
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val &= ~GPIO_CLOCK;
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LPC_WRITE_REG(chan, RGLVL, val);
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}
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}
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static void set_data(void *data, int state_high)
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{
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struct psb_intel_i2c_chan *chan = data;
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u32 val;
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if (state_high) {
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val = LPC_READ_REG(chan, RGIO);
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val |= GPIO_DATA;
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LPC_WRITE_REG(chan, RGIO, val);
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} else {
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val = LPC_READ_REG(chan, RGIO);
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val &= ~GPIO_DATA;
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LPC_WRITE_REG(chan, RGIO, val);
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val = LPC_READ_REG(chan, RGLVL);
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val &= ~GPIO_DATA;
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LPC_WRITE_REG(chan, RGLVL, val);
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}
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}
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void oaktrail_lvds_i2c_init(struct drm_encoder *encoder)
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{
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struct drm_device *dev = encoder->dev;
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struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_i2c_chan *chan;
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chan = kzalloc(sizeof(struct psb_intel_i2c_chan), GFP_KERNEL);
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if (!chan)
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return;
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chan->drm_dev = dev;
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chan->reg = dev_priv->lpc_gpio_base;
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strncpy(chan->adapter.name, "gma500 LPC", I2C_NAME_SIZE - 1);
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chan->adapter.owner = THIS_MODULE;
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chan->adapter.algo_data = &chan->algo;
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chan->adapter.dev.parent = &dev->pdev->dev;
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chan->algo.setsda = set_data;
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chan->algo.setscl = set_clock;
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chan->algo.getsda = get_data;
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chan->algo.getscl = get_clock;
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chan->algo.udelay = 100;
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chan->algo.timeout = usecs_to_jiffies(2200);
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chan->algo.data = chan;
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i2c_set_adapdata(&chan->adapter, chan);
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set_data(chan, 1);
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set_clock(chan, 1);
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udelay(50);
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if (i2c_bit_add_bus(&chan->adapter)) {
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kfree(chan);
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return;
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}
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gma_encoder->ddc_bus = chan;
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}
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@ -212,6 +212,8 @@ static int psb_driver_unload(struct drm_device *dev)
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}
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if (dev_priv->aux_pdev)
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pci_dev_put(dev_priv->aux_pdev);
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if (dev_priv->lpc_pdev)
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pci_dev_put(dev_priv->lpc_pdev);
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/* Destroy VBT data */
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psb_intel_destroy_bios(dev);
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@ -280,6 +282,24 @@ static int psb_driver_load(struct drm_device *dev, unsigned long flags)
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DRM_DEBUG_KMS("Couldn't find aux pci device");
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}
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dev_priv->gmbus_reg = dev_priv->aux_reg;
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dev_priv->lpc_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(31, 0));
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if (dev_priv->lpc_pdev) {
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pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
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&dev_priv->lpc_gpio_base);
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pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
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(u32)dev_priv->lpc_gpio_base | (1L<<31));
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pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
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&dev_priv->lpc_gpio_base);
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dev_priv->lpc_gpio_base &= 0xffc0;
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if (dev_priv->lpc_gpio_base)
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DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
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dev_priv->lpc_gpio_base);
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else {
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pci_dev_put(dev_priv->lpc_pdev);
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dev_priv->lpc_pdev = NULL;
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}
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}
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} else {
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dev_priv->gmbus_reg = dev_priv->vdc_reg;
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}
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@ -83,6 +83,7 @@ enum {
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#define PSB_PGETBL_CTL 0x2020
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#define _PSB_PGETBL_ENABLED 0x00000001
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#define PSB_SGX_2D_SLAVE_PORT 0x4000
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#define PSB_LPC_GBA 0x44
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/* TODO: To get rid of */
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#define PSB_TT_PRIV0_LIMIT (256*1024*1024)
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@ -441,6 +442,7 @@ struct psb_ops;
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struct drm_psb_private {
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struct drm_device *dev;
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struct pci_dev *aux_pdev; /* Currently only used by mrst */
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struct pci_dev *lpc_pdev; /* Currently only used by mrst */
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const struct psb_ops *ops;
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const struct psb_offset *regmap;
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@ -470,6 +472,7 @@ struct drm_psb_private {
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uint8_t __iomem *sgx_reg;
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uint8_t __iomem *vdc_reg;
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uint8_t __iomem *aux_reg; /* Auxillary vdc pipe regs */
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uint16_t lpc_gpio_base;
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uint32_t gatt_free_offset;
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/* Fencing / irq */
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@ -223,6 +223,7 @@ extern void oaktrail_lvds_init(struct drm_device *dev,
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extern void oaktrail_wait_for_INTR_PKT_SENT(struct drm_device *dev);
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extern void oaktrail_dsi_init(struct drm_device *dev,
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struct psb_intel_mode_device *mode_dev);
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extern void oaktrail_lvds_i2c_init(struct drm_encoder *encoder);
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extern void mid_dsi_init(struct drm_device *dev,
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struct psb_intel_mode_device *mode_dev, int dsi_num);
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