drm/nv50/kms: directly use cursor image from userspace buffer
Preparation for transition to planes, which use framebuffers for the cursor image. We've always done copies from the userspace buffer up until now for legacy reasons, there's no good reason to do so on the chipsets this code covers. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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547ad07283
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5a56025238
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@ -569,9 +569,10 @@ nouveau_display_suspend(struct drm_device *dev, bool runtime)
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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nouveau_bo_unmap(nv_crtc->cursor.nvbo);
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nouveau_bo_unpin(nv_crtc->cursor.nvbo);
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if (nv_crtc->cursor.nvbo) {
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nouveau_bo_unmap(nv_crtc->cursor.nvbo);
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nouveau_bo_unpin(nv_crtc->cursor.nvbo);
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}
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}
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return 0;
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@ -599,6 +600,8 @@ nouveau_display_resume(struct drm_device *dev, bool runtime)
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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if (!nv_crtc->cursor.nvbo)
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continue;
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ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, true);
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if (!ret)
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@ -631,11 +634,10 @@ nouveau_display_resume(struct drm_device *dev, bool runtime)
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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u32 offset = nv_crtc->cursor.nvbo->bo.offset;
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if (!nv_crtc->cursor.set_offset)
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if (!nv_crtc->cursor.nvbo)
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continue;
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nv_crtc->cursor.set_offset(nv_crtc, offset);
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nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset);
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nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
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nv_crtc->cursor_saved_y);
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}
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@ -125,6 +125,7 @@ nv50_pioc_create(struct nvif_object *disp, const u32 *oclass, u8 head,
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struct nv50_curs {
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struct nv50_pioc base;
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struct nouveau_bo *image;
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};
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static int
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@ -900,23 +901,24 @@ static void
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nv50_crtc_cursor_show(struct nouveau_crtc *nv_crtc)
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{
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struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
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struct nv50_curs *curs = nv50_curs(&nv_crtc->base);
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u32 *push = evo_wait(mast, 16);
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if (push) {
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if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 2);
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evo_data(push, 0x85000000);
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evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8);
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evo_data(push, curs->image->bo.offset >> 8);
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} else
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if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 2);
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evo_data(push, 0x85000000);
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evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8);
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evo_data(push, curs->image->bo.offset >> 8);
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evo_mthd(push, 0x089c + (nv_crtc->index * 0x400), 1);
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evo_data(push, mast->base.vram.handle);
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} else {
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evo_mthd(push, 0x0480 + (nv_crtc->index * 0x300), 2);
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evo_data(push, 0x85000000);
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evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8);
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evo_data(push, curs->image->bo.offset >> 8);
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evo_mthd(push, 0x048c + (nv_crtc->index * 0x300), 1);
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evo_data(push, mast->base.vram.handle);
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}
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@ -953,8 +955,9 @@ static void
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nv50_crtc_cursor_show_hide(struct nouveau_crtc *nv_crtc, bool show, bool update)
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{
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struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
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struct nv50_curs *curs = nv50_curs(&nv_crtc->base);
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if (show)
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if (show && curs->image)
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nv50_crtc_cursor_show(nv_crtc);
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else
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nv50_crtc_cursor_hide(nv_crtc);
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@ -1054,7 +1057,7 @@ nv50_crtc_commit(struct drm_crtc *crtc)
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evo_kick(push, mast);
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}
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nv50_crtc_cursor_show_hide(nv_crtc, nv_crtc->cursor.visible, true);
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nv50_crtc_cursor_show_hide(nv_crtc, true, true);
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nv50_display_flip_next(crtc, crtc->primary->fb, NULL, 1);
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}
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@ -1249,13 +1252,13 @@ nv50_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
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uint32_t handle, uint32_t width, uint32_t height)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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struct nv50_curs *curs = nv50_curs(crtc);
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struct drm_device *dev = crtc->dev;
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struct drm_gem_object *gem;
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struct nouveau_bo *nvbo;
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bool visible = (handle != 0);
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int i, ret = 0;
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struct drm_gem_object *gem = NULL;
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struct nouveau_bo *nvbo = NULL;
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int ret = 0;
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if (visible) {
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if (handle) {
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if (width != 64 || height != 64)
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return -EINVAL;
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@ -1264,23 +1267,17 @@ nv50_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
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return -ENOENT;
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nvbo = nouveau_gem_object(gem);
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ret = nouveau_bo_map(nvbo);
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if (ret == 0) {
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for (i = 0; i < 64 * 64; i++) {
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u32 v = nouveau_bo_rd32(nvbo, i);
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nouveau_bo_wr32(nv_crtc->cursor.nvbo, i, v);
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}
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nouveau_bo_unmap(nvbo);
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}
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drm_gem_object_unreference_unlocked(gem);
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ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM, true);
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}
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if (visible != nv_crtc->cursor.visible) {
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nv50_crtc_cursor_show_hide(nv_crtc, visible, true);
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nv_crtc->cursor.visible = visible;
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if (ret == 0) {
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if (curs->image)
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nouveau_bo_unpin(curs->image);
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nouveau_bo_ref(nvbo, &curs->image);
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}
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drm_gem_object_unreference_unlocked(gem);
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nv50_crtc_cursor_show_hide(nv_crtc, true, true);
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return ret;
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}
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@ -1335,10 +1332,10 @@ nv50_crtc_destroy(struct drm_crtc *crtc)
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nouveau_bo_unpin(head->image);
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nouveau_bo_ref(NULL, &head->image);
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nouveau_bo_unmap(nv_crtc->cursor.nvbo);
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if (nv_crtc->cursor.nvbo)
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nouveau_bo_unpin(nv_crtc->cursor.nvbo);
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nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
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/*XXX: ditto */
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if (head->curs.image)
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nouveau_bo_unpin(head->curs.image);
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nouveau_bo_ref(NULL, &head->curs.image);
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nouveau_bo_unmap(nv_crtc->lut.nvbo);
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if (nv_crtc->lut.nvbo)
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@ -1419,22 +1416,6 @@ nv50_crtc_create(struct drm_device *dev, int index)
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/* allocate cursor resources */
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ret = nv50_curs_create(disp->disp, index, &head->curs);
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if (ret)
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goto out;
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ret = nouveau_bo_new(dev, 64 * 64 * 4, 0x100, TTM_PL_FLAG_VRAM,
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0, 0x0000, NULL, NULL, &head->base.cursor.nvbo);
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if (!ret) {
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ret = nouveau_bo_pin(head->base.cursor.nvbo, TTM_PL_FLAG_VRAM, true);
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if (!ret) {
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ret = nouveau_bo_map(head->base.cursor.nvbo);
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if (ret)
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nouveau_bo_unpin(head->base.lut.nvbo);
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}
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if (ret)
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nouveau_bo_ref(NULL, &head->base.cursor.nvbo);
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}
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if (ret)
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goto out;
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