Fixes for omaps for issues discovered during the merge window and
enabling of a few features that had to wait for the driver dependencies to clear. The fixes included are: - Fix am43xx hard reset flags - Fix SoC detection for DRA722 - Fix CPU OPP table for omap5 - Fix legacy mux parser bug if requested muxname is a prefix of multiple mux entries - Fix qspi interrupt binding that relies on the irq crossbar that has not yet been enabled - Add missing phy_sel for am43x-epos-evm - Drop unused gic_init_irq() that is no longer needed And the enabling of features that had driver dependencies are: - Change dra7 to use Audio Tracking Logic clock instead of a fixed clock now that the clock driver for it has been merged - Enable off idle configuration for selected omaps as all the kernel dependencies for device tree based booting are finally merged as this is needed to get the automated PM tests working finally with device tree based booting - Add hwmod entry for ocp2scp3 for omap5 to get sata working as all the driver dependencies are now in the kernel and this patch fell through the cracks during the merge window -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTn/+wAAoJEBvUPslcq6Vzr1AP/1/HCOmp5B4tP3WhRPDK7nSr hNjoa3uFhhpc6LoO1PMsbHcusBwrD9/Dr1BM53vltRXGGMFiADRw02N0BMSiDB4y cWKo6C7d1PEsX7SvH6ehzQV6pB8v8zAhShuuA2sPQRcGsKPfUTCI3rjjvCNvcnmr fIyLOwZ8MkFkAxrSCNUHULRK4U8Tivxa0k9eTEoPo+y5rkolTwtU9C5ybpUk4Jju K1yjZOo+hbNENFLS4FqM6Y4IjlJlz49baDoaZXkIhP+UhvdKSLAhNta76vRtnnDE wX0STSCYbPL/Tj+bfCk3VJa1dpgkHYY9y8H7FOsf0osqbP5j0H49i/+y3+lTu3A3 NzVYZRlu32llCp5pvVVy6ibjme9jRwz/HPtKEXDtbtFG41pvDaHnSF72OOVz6DoN Yu9tN6vojMaeQeE69mFzy7RI6SWpOVxjHyPG1b2rGoJayY+P2oR43iPAeWF6q7lp Nz/LWDqNwIj4H1T4KWIhK+mv/+YJDzWnIDczToK0ROZ8JOR3A0MRWwBvYpvHPRnY rxE2vtRpHUqOPiPtj1sKzUti74xJahCL9oXLRuFbG4z5Le1jelM9dYdjf4wpAoWs H+1RP20GRos1dNIzoPZieOP+X4jp0m6A1wtcy49Dbivw6Gx7oJecH7zkMvobgy8C gJ8G86a9R4EXKNJmjqvc =2HDE -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Merge OMAP fixes from Tony Lindgren: Fixes for omaps for issues discovered during the merge window and enabling of a few features that had to wait for the driver dependencies to clear. The fixes included are: - Fix am43xx hard reset flags - Fix SoC detection for DRA722 - Fix CPU OPP table for omap5 - Fix legacy mux parser bug if requested muxname is a prefix of multiple mux entries - Fix qspi interrupt binding that relies on the irq crossbar that has not yet been enabled - Add missing phy_sel for am43x-epos-evm - Drop unused gic_init_irq() that is no longer needed And the enabling of features that had driver dependencies are: - Change dra7 to use Audio Tracking Logic clock instead of a fixed clock now that the clock driver for it has been merged - Enable off idle configuration for selected omaps as all the kernel dependencies for device tree based booting are finally merged as this is needed to get the automated PM tests working finally with device tree based booting - Add hwmod entry for ocp2scp3 for omap5 to get sata working as all the driver dependencies are now in the kernel and this patch fell through the cracks during the merge window * tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: dra7-evm: remove interrupt binding ARM: OMAP2+: Fix parser-bug in platform muxing code ARM: DTS: dra7/dra7xx-clocks: ATL related changes ARM: OMAP2+: drop unused function ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm ARM: dts: omap5: Update CPU OPP table as per final production Manual ARM: DRA722: add detection of SoC information ARM: dts: Enable twl4030 off-idle configuration for selected omaps ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XXhifive-unleashed-5.1
Olof Johansson
commit
5acd78c59a
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@ -319,6 +319,10 @@
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phy-mode = "rmii";
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};
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&phy_sel {
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rmii-clock-ext;
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};
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&i2c0 {
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status = "okay";
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pinctrl-names = "default";
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@ -773,7 +773,6 @@
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clocks = <&qspi_gfclk_div>;
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clock-names = "fck";
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num-cs = <4>;
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interrupts = <0 343 0x4>;
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status = "disabled";
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};
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@ -984,6 +983,17 @@
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#size-cells = <1>;
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status = "disabled";
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};
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atl: atl@4843c000 {
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compatible = "ti,dra7-atl";
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reg = <0x4843c000 0x3ff>;
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ti,hwmods = "atl";
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ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
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<&atl_clkin2_ck>, <&atl_clkin3_ck>;
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clocks = <&atl_gfclk_mux>;
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clock-names = "fck";
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status = "disabled";
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};
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};
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};
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@ -10,26 +10,26 @@
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&cm_core_aon_clocks {
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atl_clkin0_ck: atl_clkin0_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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compatible = "ti,dra7-atl-clock";
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clocks = <&atl_gfclk_mux>;
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};
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atl_clkin1_ck: atl_clkin1_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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compatible = "ti,dra7-atl-clock";
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clocks = <&atl_gfclk_mux>;
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};
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atl_clkin2_ck: atl_clkin2_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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compatible = "ti,dra7-atl-clock";
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clocks = <&atl_gfclk_mux>;
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};
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atl_clkin3_ck: atl_clkin3_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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compatible = "ti,dra7-atl-clock";
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clocks = <&atl_gfclk_mux>;
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};
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hdmi_clkin_ck: hdmi_clkin_ck {
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@ -251,6 +251,11 @@
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codec {
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};
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};
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twl_power: power {
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compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
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ti,use_poweroff;
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};
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};
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};
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@ -301,6 +306,7 @@
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};
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&uart3 {
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interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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};
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@ -50,6 +50,13 @@
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gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
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};
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&twl {
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twl_power: power {
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compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
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ti,use_poweroff;
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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};
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@ -351,6 +351,11 @@
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compatible = "ti,twl4030-audio";
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ti,enable-vibra = <1>;
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};
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twl_power: power {
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compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
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ti,use_poweroff;
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};
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};
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&twl_keypad {
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@ -45,7 +45,6 @@
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operating-points = <
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/* kHz uV */
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500000 880000
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1000000 1060000
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1500000 1250000
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>;
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@ -110,14 +110,16 @@ obj-y += prm_common.o cm_common.o
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obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
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obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
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obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
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obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o
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omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
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prcm_mpu44xx.o prminst44xx.o \
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vc44xx_data.o vp44xx_data.o
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obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
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obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
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obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common)
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obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common)
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am33xx-43xx-prcm-common += prm33xx.o cm33xx.o
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obj-$(CONFIG_SOC_AM33XX) += $(am33xx-43xx-prcm-common)
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obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) \
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$(am33xx-43xx-prcm-common)
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# OMAP voltage domains
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voltagedomain-common := voltage.o vc.o vp.o
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@ -380,7 +380,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
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void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
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void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
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#ifdef CONFIG_SOC_AM33XX
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#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
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extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
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u16 clkctrl_offs);
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extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
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@ -248,7 +248,6 @@ static inline void __iomem *omap4_get_scu_base(void)
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}
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#endif
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extern void __init gic_init_irq(void);
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extern void gic_dist_disable(void);
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extern void gic_dist_enable(void);
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extern bool gic_dist_disabled(void);
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@ -649,6 +649,18 @@ void __init dra7xxx_check_revision(void)
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}
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break;
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case 0xb9bc:
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switch (rev) {
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case 0:
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omap_revision = DRA722_REV_ES1_0;
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break;
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default:
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/* If we have no new revisions */
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omap_revision = DRA722_REV_ES1_0;
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break;
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}
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break;
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default:
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/* Unknown default to latest silicon rev as default*/
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pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",
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@ -183,8 +183,10 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
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m0_entry = mux->muxnames[0];
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/* First check for full name in mode0.muxmode format */
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if (mode0_len && strncmp(muxname, m0_entry, mode0_len))
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continue;
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if (mode0_len)
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if (strncmp(muxname, m0_entry, mode0_len) ||
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(strlen(m0_entry) != mode0_len))
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continue;
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/* Then check for muxmode only */
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for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
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@ -102,26 +102,6 @@ void __init omap_barriers_init(void)
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{}
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#endif
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void __init gic_init_irq(void)
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{
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void __iomem *omap_irq_base;
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/* Static mapping, never released */
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gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
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BUG_ON(!gic_dist_base_addr);
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twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_4K);
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BUG_ON(!twd_base);
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/* Static mapping, never released */
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omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
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BUG_ON(!omap_irq_base);
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omap_wakeupgen_init();
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gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
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}
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void gic_dist_disable(void)
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{
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if (gic_dist_base_addr)
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@ -4251,9 +4251,9 @@ void __init omap_hwmod_init(void)
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soc_ops.enable_module = _omap4_enable_module;
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soc_ops.disable_module = _omap4_disable_module;
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soc_ops.wait_target_ready = _omap4_wait_target_ready;
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soc_ops.assert_hardreset = _omap4_assert_hardreset;
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soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
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soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
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soc_ops.assert_hardreset = _am33xx_assert_hardreset;
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soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
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soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
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soc_ops.init_clkdm = _init_clkdm;
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} else if (soc_is_am33xx()) {
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soc_ops.enable_module = _am33xx_enable_module;
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|
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|
@ -2020,6 +2020,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
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|||
},
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};
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/*
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* 'ocp2scp' class
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* bridge to transform ocp interface protocol to scp (serial control port)
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||||
* protocol
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||||
*/
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/* ocp2scp3 */
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static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
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/* l4_cfg -> ocp2scp3 */
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||||
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
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.master = &omap54xx_l4_cfg_hwmod,
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.slave = &omap54xx_ocp2scp3_hwmod,
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||||
.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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||||
};
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||||
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||||
static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
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.name = "ocp2scp3",
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.class = &omap54xx_ocp2scp_hwmod_class,
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||||
.clkdm_name = "l3init_clkdm",
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||||
.prcm = {
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||||
.omap4 = {
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||||
.clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
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||||
.modulemode = MODULEMODE_HWCTRL,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'sata' class
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||||
* sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
|
||||
.sysc_offs = 0x0000,
|
||||
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
|
||||
MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
|
||||
.name = "sata",
|
||||
.sysc = &omap54xx_sata_sysc,
|
||||
};
|
||||
|
||||
/* sata */
|
||||
static struct omap_hwmod omap54xx_sata_hwmod = {
|
||||
.name = "sata",
|
||||
.class = &omap54xx_sata_hwmod_class,
|
||||
.clkdm_name = "l3init_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
|
||||
.main_clk = "func_48m_fclk",
|
||||
.mpu_rt_idx = 1,
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/* l4_cfg -> sata */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
|
||||
.master = &omap54xx_l4_cfg_hwmod,
|
||||
.slave = &omap54xx_sata_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/*
|
||||
* Interfaces
|
||||
|
|
@ -2765,6 +2836,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
|
|||
&omap54xx_l4_cfg__usb_tll_hs,
|
||||
&omap54xx_l4_cfg__usb_otg_ss,
|
||||
&omap54xx_l4_wkup__wd_timer2,
|
||||
&omap54xx_l4_cfg__ocp2scp3,
|
||||
&omap54xx_l4_cfg__sata,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -462,6 +462,7 @@ IS_OMAP_TYPE(3430, 0x3430)
|
|||
#define DRA7XX_CLASS 0x07000000
|
||||
#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
|
||||
#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
|
||||
#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
|
||||
|
||||
void omap2xxx_check_revision(void);
|
||||
void omap3xxx_check_revision(void);
|
||||
|
|
|
|||
Loading…
Reference in New Issue