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Davinci: eliminate pinmux offset verbosity 

Pinmux registers are sequential, and do not need to be enumerated out as they
currently are.  This reduces code volume and keeps things simple.

If some future SoC comes up with a discontiguous register map, PINMUX() can
then be expanded with local token pasting.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
hifive-unleashed-5.1
Cyril Chemparathy 2010-05-01 18:38:27 -04:00 committed by Kevin Hilman
parent b27b6d03f2
commit 5b3a05ca91
8 changed files with 4 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/mach-davinci/dm355.c
View File

@ -450,11 +450,6 @@ void __init dm355_init_spi0(unsigned chipselect_mask,
/*----------------------------------------------------------------------*/
#define PINMUX0 0x00
#define PINMUX1 0x04
#define PINMUX2 0x08
#define PINMUX3 0x0c
#define PINMUX4 0x10
#define INTMUX 0x18
#define EVTMUX 0x1c

5
arch/arm/mach-davinci/dm365.c
View File

@ -467,11 +467,6 @@ static struct clk_lookup dm365_clks[] = {
/*----------------------------------------------------------------------*/
#define PINMUX0 0x00
#define PINMUX1 0x04
#define PINMUX2 0x08
#define PINMUX3 0x0c
#define PINMUX4 0x10
#define INTMUX 0x18
#define EVTMUX 0x1c

3
arch/arm/mach-davinci/dm644x.c
View File

@ -350,9 +350,6 @@ static struct platform_device dm644x_emac_device = {
.resource = dm644x_emac_resources,
};
#define PINMUX0 0x00
#define PINMUX1 0x04
/*
* Device specific mux setup
*

3
arch/arm/mach-davinci/dm646x.c
View File

@ -401,9 +401,6 @@ static struct platform_device dm646x_emac_device = {
.resource = dm646x_emac_resources,
};
#define PINMUX0 0x00
#define PINMUX1 0x04
/*
* Device specific mux setup
*

6
arch/arm/mach-davinci/gpio.c
View File

@ -71,11 +71,7 @@ static int __init davinci_gpio_irq_setup(void);
/*--------------------------------------------------------------------------*/
/*
* board setup code *MUST* set PINMUX0 and PINMUX1 as
* needed, and enable the GPIO clock.
*/
/* board setup code *MUST* setup pinmux and enable the GPIO clock. */
static inline int __davinci_direction(struct gpio_chip *chip,
unsigned offset, bool out, int value)
{

21
arch/arm/mach-davinci/include/mach/da8xx.h
View File

@ -64,27 +64,6 @@ extern void __iomem *da8xx_syscfg1_base;
#define DA8XX_DDR2_CTL_BASE 0xb0000000
#define DA8XX_ARM_RAM_BASE 0xffff0000
#define PINMUX0 0x00
#define PINMUX1 0x04
#define PINMUX2 0x08
#define PINMUX3 0x0c
#define PINMUX4 0x10
#define PINMUX5 0x14
#define PINMUX6 0x18
#define PINMUX7 0x1c
#define PINMUX8 0x20
#define PINMUX9 0x24
#define PINMUX10 0x28
#define PINMUX11 0x2c
#define PINMUX12 0x30
#define PINMUX13 0x34
#define PINMUX14 0x38
#define PINMUX15 0x3c
#define PINMUX16 0x40
#define PINMUX17 0x44
#define PINMUX18 0x48
#define PINMUX19 0x4c
void __init da830_init(void);
void __init da850_init(void);

2
arch/arm/mach-davinci/include/mach/mux.h
View File

@ -1174,6 +1174,8 @@ enum davinci_tnetv107x_index {
TNETV107X_TDM0_RX,
};
#define PINMUX(x) (4 * (x))
#ifdef CONFIG_DAVINCI_MUX
/* setup pin muxing */
extern int davinci_cfg_reg(unsigned long reg_cfg);

2
arch/arm/mach-davinci/mux.h
View File

@ -20,7 +20,7 @@
.name = #desc, \
.debug = dbg, \
.mux_reg_name = "PINMUX"#muxreg, \
.mux_reg = PINMUX##muxreg, \
.mux_reg = PINMUX(muxreg), \
.mask_offset = mode_offset, \
.mask = mode_mask, \
.mode = mux_mode, \