x86: usb debug port early console, v4
based on work from Eric, and add some timeout so don't dead loop when debug
device is not installed
v2: fix checkpatch warning
v3: move ehci struct def to linux/usrb/ehci_def.h from host/ehci.h
also add CONFIG_EARLY_PRINTK_DBGP to disable it by default
v4: address comments from Ingo, seperate ehci reg def moving to another patch
also add auto detect port that connect to debug device for Nvidia
southbridge
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: "Arjan van de Ven" <arjan@infradead.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: "Greg KH" <greg@kroah.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
hifive-unleashed-5.1
Yinghai Lu
Ingo Molnar
parent
0af36739af
commit
5c05917e7f
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@ -657,11 +657,12 @@ and is between 256 and 4096 characters. It is defined in the file
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earlyprintk= [X86-32,X86-64,SH,BLACKFIN]
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earlyprintk=vga
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earlyprintk=serial[,ttySn[,baudrate]]
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earlyprintk=dbgp
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Append ",keep" to not disable it when the real console
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takes over.
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Only vga or serial at a time, not both.
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Only vga or serial or usb debug port at a time.
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Currently only ttyS0 and ttyS1 are supported.
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@ -43,6 +43,19 @@ config EARLY_PRINTK
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with klogd/syslogd or the X server. You should normally N here,
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unless you want to debug such a crash.
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config EARLY_PRINTK_DBGP
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bool "Early printk via EHCI debug port"
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default n
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depends on EARLY_PRINTK
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help
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Write kernel log output directly into the EHCI debug port.
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This is useful for kernel debugging when your machine crashes very
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early before the console code is initialized. For normal operation
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it is not recommended because it looks ugly and doesn't cooperate
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with klogd/syslogd or the X server. You should normally N here,
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unless you want to debug such a crash. You need usb debug device.
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config DEBUG_STACKOVERFLOW
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bool "Check for stack overflows"
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depends on DEBUG_KERNEL
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@ -3,11 +3,19 @@
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/screen_info.h>
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#include <linux/usb/ch9.h>
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#include <linux/pci_regs.h>
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#include <linux/pci_ids.h>
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#include <linux/errno.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/fcntl.h>
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#include <asm/setup.h>
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#include <xen/hvc-console.h>
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#include <asm/pci-direct.h>
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#include <asm/pgtable.h>
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#include <asm/fixmap.h>
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#include <linux/usb/ehci_def.h>
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/* Simple VGA output */
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#define VGABASE (__ISA_IO_base + 0xb8000)
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@ -78,6 +86,7 @@ static int early_serial_base = 0x3f8; /* ttyS0 */
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static int early_serial_putc(unsigned char ch)
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{
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unsigned timeout = 0xffff;
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while ((inb(early_serial_base + LSR) & XMTRDY) == 0 && --timeout)
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cpu_relax();
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outb(ch, early_serial_base + TXR);
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@ -151,6 +160,721 @@ static struct console early_serial_console = {
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.index = -1,
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};
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#ifdef CONFIG_EARLY_PRINTK_DBGP
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static struct ehci_caps __iomem *ehci_caps;
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static struct ehci_regs __iomem *ehci_regs;
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static struct ehci_dbg_port __iomem *ehci_debug;
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static unsigned int dbgp_endpoint_out;
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struct ehci_dev {
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u32 bus;
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u32 slot;
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u32 func;
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};
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static struct ehci_dev ehci_dev;
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#define USB_DEBUG_DEVNUM 127
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#define DBGP_DATA_TOGGLE 0x8800
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static inline u32 dbgp_pid_update(u32 x, u32 tok)
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{
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return ((x ^ DBGP_DATA_TOGGLE) & 0xffff00) | (tok & 0xff);
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}
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static inline u32 dbgp_len_update(u32 x, u32 len)
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{
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return (x & ~0x0f) | (len & 0x0f);
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}
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/*
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* USB Packet IDs (PIDs)
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*/
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/* token */
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#define USB_PID_OUT 0xe1
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#define USB_PID_IN 0x69
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#define USB_PID_SOF 0xa5
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#define USB_PID_SETUP 0x2d
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/* handshake */
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#define USB_PID_ACK 0xd2
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#define USB_PID_NAK 0x5a
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#define USB_PID_STALL 0x1e
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#define USB_PID_NYET 0x96
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/* data */
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#define USB_PID_DATA0 0xc3
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#define USB_PID_DATA1 0x4b
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#define USB_PID_DATA2 0x87
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#define USB_PID_MDATA 0x0f
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/* Special */
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#define USB_PID_PREAMBLE 0x3c
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#define USB_PID_ERR 0x3c
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#define USB_PID_SPLIT 0x78
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#define USB_PID_PING 0xb4
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#define USB_PID_UNDEF_0 0xf0
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#define USB_PID_DATA_TOGGLE 0x88
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#define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
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#define PCI_CAP_ID_EHCI_DEBUG 0xa
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#define HUB_ROOT_RESET_TIME 50 /* times are in msec */
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#define HUB_SHORT_RESET_TIME 10
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#define HUB_LONG_RESET_TIME 200
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#define HUB_RESET_TIMEOUT 500
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#define DBGP_MAX_PACKET 8
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static int dbgp_wait_until_complete(void)
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{
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u32 ctrl;
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int loop = 0x100000;
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do {
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ctrl = readl(&ehci_debug->control);
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/* Stop when the transaction is finished */
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if (ctrl & DBGP_DONE)
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break;
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} while (--loop > 0);
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if (!loop)
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return -1;
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/*
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* Now that we have observed the completed transaction,
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* clear the done bit.
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*/
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writel(ctrl | DBGP_DONE, &ehci_debug->control);
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return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
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}
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static void dbgp_mdelay(int ms)
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{
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int i;
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while (ms--) {
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for (i = 0; i < 1000; i++)
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outb(0x1, 0x80);
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}
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}
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static void dbgp_breath(void)
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{
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/* Sleep to give the debug port a chance to breathe */
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}
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static int dbgp_wait_until_done(unsigned ctrl)
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{
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u32 pids, lpid;
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int ret;
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int loop = 3;
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retry:
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writel(ctrl | DBGP_GO, &ehci_debug->control);
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ret = dbgp_wait_until_complete();
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pids = readl(&ehci_debug->pids);
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lpid = DBGP_PID_GET(pids);
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if (ret < 0)
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return ret;
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/*
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* If the port is getting full or it has dropped data
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* start pacing ourselves, not necessary but it's friendly.
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*/
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if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
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dbgp_breath();
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/* If I get a NACK reissue the transmission */
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if (lpid == USB_PID_NAK) {
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if (--loop > 0)
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goto retry;
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}
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return ret;
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}
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static void dbgp_set_data(const void *buf, int size)
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{
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const unsigned char *bytes = buf;
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u32 lo, hi;
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int i;
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lo = hi = 0;
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for (i = 0; i < 4 && i < size; i++)
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lo |= bytes[i] << (8*i);
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for (; i < 8 && i < size; i++)
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hi |= bytes[i] << (8*(i - 4));
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writel(lo, &ehci_debug->data03);
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writel(hi, &ehci_debug->data47);
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}
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static void dbgp_get_data(void *buf, int size)
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{
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unsigned char *bytes = buf;
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u32 lo, hi;
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int i;
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lo = readl(&ehci_debug->data03);
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hi = readl(&ehci_debug->data47);
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for (i = 0; i < 4 && i < size; i++)
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bytes[i] = (lo >> (8*i)) & 0xff;
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for (; i < 8 && i < size; i++)
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bytes[i] = (hi >> (8*(i - 4))) & 0xff;
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}
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static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
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const char *bytes, int size)
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{
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u32 pids, addr, ctrl;
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int ret;
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if (size > DBGP_MAX_PACKET)
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return -1;
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addr = DBGP_EPADDR(devnum, endpoint);
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pids = readl(&ehci_debug->pids);
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pids = dbgp_pid_update(pids, USB_PID_OUT);
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ctrl = readl(&ehci_debug->control);
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ctrl = dbgp_len_update(ctrl, size);
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ctrl |= DBGP_OUT;
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ctrl |= DBGP_GO;
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dbgp_set_data(bytes, size);
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writel(addr, &ehci_debug->address);
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writel(pids, &ehci_debug->pids);
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ret = dbgp_wait_until_done(ctrl);
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if (ret < 0)
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return ret;
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return ret;
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}
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static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
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int size)
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{
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u32 pids, addr, ctrl;
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int ret;
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if (size > DBGP_MAX_PACKET)
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return -1;
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addr = DBGP_EPADDR(devnum, endpoint);
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pids = readl(&ehci_debug->pids);
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pids = dbgp_pid_update(pids, USB_PID_IN);
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ctrl = readl(&ehci_debug->control);
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ctrl = dbgp_len_update(ctrl, size);
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ctrl &= ~DBGP_OUT;
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ctrl |= DBGP_GO;
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writel(addr, &ehci_debug->address);
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writel(pids, &ehci_debug->pids);
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ret = dbgp_wait_until_done(ctrl);
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if (ret < 0)
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return ret;
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if (size > ret)
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size = ret;
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dbgp_get_data(data, size);
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return ret;
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}
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static int dbgp_control_msg(unsigned devnum, int requesttype, int request,
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int value, int index, void *data, int size)
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{
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u32 pids, addr, ctrl;
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struct usb_ctrlrequest req;
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int read;
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int ret;
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read = (requesttype & USB_DIR_IN) != 0;
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if (size > (read ? DBGP_MAX_PACKET:0))
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return -1;
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/* Compute the control message */
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req.bRequestType = requesttype;
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req.bRequest = request;
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req.wValue = value;
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req.wIndex = index;
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req.wLength = size;
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pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
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addr = DBGP_EPADDR(devnum, 0);
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ctrl = readl(&ehci_debug->control);
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ctrl = dbgp_len_update(ctrl, sizeof(req));
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ctrl |= DBGP_OUT;
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ctrl |= DBGP_GO;
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/* Send the setup message */
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dbgp_set_data(&req, sizeof(req));
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writel(addr, &ehci_debug->address);
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writel(pids, &ehci_debug->pids);
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ret = dbgp_wait_until_done(ctrl);
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if (ret < 0)
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return ret;
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/* Read the result */
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return dbgp_bulk_read(devnum, 0, data, size);
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}
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/* Find a PCI capability */
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static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
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{
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u8 pos;
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int bytes;
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if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
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PCI_STATUS_CAP_LIST))
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return 0;
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pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
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for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
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u8 id;
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pos &= ~3;
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id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
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if (id == 0xff)
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break;
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if (id == cap)
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return pos;
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pos = read_pci_config_byte(num, slot, func,
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pos+PCI_CAP_LIST_NEXT);
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}
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return 0;
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}
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static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
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{
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u32 class;
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class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
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if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
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return 0;
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return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
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}
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static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
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{
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u32 bus, slot, func;
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for (bus = 0; bus < 256; bus++) {
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for (slot = 0; slot < 32; slot++) {
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for (func = 0; func < 8; func++) {
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unsigned cap;
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cap = __find_dbgp(bus, slot, func);
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if (!cap)
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continue;
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if (ehci_num-- != 0)
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continue;
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*rbus = bus;
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*rslot = slot;
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*rfunc = func;
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return cap;
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}
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}
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}
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return 0;
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}
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static int ehci_reset_port(int port)
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{
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u32 portsc;
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u32 delay_time, delay;
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int loop;
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/* Reset the usb debug port */
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portsc = readl(&ehci_regs->port_status[port - 1]);
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portsc &= ~PORT_PE;
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portsc |= PORT_RESET;
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writel(portsc, &ehci_regs->port_status[port - 1]);
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delay = HUB_ROOT_RESET_TIME;
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for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
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delay_time += delay) {
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dbgp_mdelay(delay);
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portsc = readl(&ehci_regs->port_status[port - 1]);
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if (portsc & PORT_RESET) {
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/* force reset to complete */
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loop = 2;
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writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
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&ehci_regs->port_status[port - 1]);
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do {
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portsc = readl(&ehci_regs->port_status[port-1]);
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} while ((portsc & PORT_RESET) && (--loop > 0));
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}
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/* Device went away? */
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if (!(portsc & PORT_CONNECT))
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return -ENOTCONN;
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/* bomb out completely if something weird happend */
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if ((portsc & PORT_CSC))
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return -EINVAL;
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/* If we've finished resetting, then break out of the loop */
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if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
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return 0;
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}
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return -EBUSY;
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}
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static int ehci_wait_for_port(int port)
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{
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u32 status;
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int ret, reps;
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for (reps = 0; reps < 3; reps++) {
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dbgp_mdelay(100);
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status = readl(&ehci_regs->status);
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if (status & STS_PCD) {
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ret = ehci_reset_port(port);
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if (ret == 0)
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return 0;
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}
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}
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return -ENOTCONN;
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}
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#ifdef DBGP_DEBUG
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# define dbgp_printk early_printk
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#else
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static inline void dbgp_printk(const char *fmt, ...) { }
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#endif
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typedef void (*set_debug_port_t)(int port);
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static void default_set_debug_port(int port)
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{
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}
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static set_debug_port_t set_debug_port = default_set_debug_port;
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static void nvidia_set_debug_port(int port)
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{
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u32 dword;
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dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
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0x74);
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dword &= ~(0x0f<<12);
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dword |= ((port & 0x0f)<<12);
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write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
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dword);
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dbgp_printk("set debug port to %d\n", port);
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}
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static void __init detect_set_debug_port(void)
|
||||
{
|
||||
u32 vendorid;
|
||||
|
||||
vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
|
||||
0x00);
|
||||
|
||||
if ((vendorid & 0xffff) == 0x10de) {
|
||||
dbgp_printk("using nvidia set_debug_port\n");
|
||||
set_debug_port = nvidia_set_debug_port;
|
||||
}
|
||||
}
|
||||
|
||||
static int __init ehci_setup(void)
|
||||
{
|
||||
struct usb_debug_descriptor dbgp_desc;
|
||||
u32 cmd, ctrl, status, portsc, hcs_params;
|
||||
u32 debug_port, new_debug_port = 0, n_ports;
|
||||
u32 devnum;
|
||||
int ret, i;
|
||||
int loop;
|
||||
int port_map_tried;
|
||||
int playtimes = 3;
|
||||
|
||||
try_next_time:
|
||||
port_map_tried = 0;
|
||||
|
||||
try_next_port:
|
||||
|
||||
hcs_params = readl(&ehci_caps->hcs_params);
|
||||
debug_port = HCS_DEBUG_PORT(hcs_params);
|
||||
n_ports = HCS_N_PORTS(hcs_params);
|
||||
|
||||
dbgp_printk("debug_port: %d\n", debug_port);
|
||||
dbgp_printk("n_ports: %d\n", n_ports);
|
||||
|
||||
for (i = 1; i <= n_ports; i++) {
|
||||
portsc = readl(&ehci_regs->port_status[i-1]);
|
||||
dbgp_printk("portstatus%d: %08x\n", i, portsc);
|
||||
}
|
||||
|
||||
if (port_map_tried && (new_debug_port != debug_port)) {
|
||||
if (--playtimes) {
|
||||
set_debug_port(new_debug_port);
|
||||
goto try_next_time;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
loop = 10;
|
||||
/* Reset the EHCI controller */
|
||||
cmd = readl(&ehci_regs->command);
|
||||
cmd |= CMD_RESET;
|
||||
writel(cmd, &ehci_regs->command);
|
||||
do {
|
||||
cmd = readl(&ehci_regs->command);
|
||||
} while ((cmd & CMD_RESET) && (--loop > 0));
|
||||
|
||||
if (!loop) {
|
||||
dbgp_printk("can not reset ehci\n");
|
||||
return -1;
|
||||
}
|
||||
dbgp_printk("ehci reset done\n");
|
||||
|
||||
/* Claim ownership, but do not enable yet */
|
||||
ctrl = readl(&ehci_debug->control);
|
||||
ctrl |= DBGP_OWNER;
|
||||
ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
|
||||
writel(ctrl, &ehci_debug->control);
|
||||
|
||||
/* Start the ehci running */
|
||||
cmd = readl(&ehci_regs->command);
|
||||
cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
|
||||
cmd |= CMD_RUN;
|
||||
writel(cmd, &ehci_regs->command);
|
||||
|
||||
/* Ensure everything is routed to the EHCI */
|
||||
writel(FLAG_CF, &ehci_regs->configured_flag);
|
||||
|
||||
/* Wait until the controller is no longer halted */
|
||||
loop = 10;
|
||||
do {
|
||||
status = readl(&ehci_regs->status);
|
||||
} while ((status & STS_HALT) && (--loop > 0));
|
||||
|
||||
if (!loop) {
|
||||
dbgp_printk("ehci can be started\n");
|
||||
return -1;
|
||||
}
|
||||
dbgp_printk("ehci started\n");
|
||||
|
||||
/* Wait for a device to show up in the debug port */
|
||||
ret = ehci_wait_for_port(debug_port);
|
||||
if (ret < 0) {
|
||||
dbgp_printk("No device found in debug port\n");
|
||||
goto next_debug_port;
|
||||
}
|
||||
dbgp_printk("ehci wait for port done\n");
|
||||
|
||||
/* Enable the debug port */
|
||||
ctrl = readl(&ehci_debug->control);
|
||||
ctrl |= DBGP_CLAIM;
|
||||
writel(ctrl, &ehci_debug->control);
|
||||
ctrl = readl(&ehci_debug->control);
|
||||
if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
|
||||
dbgp_printk("No device in debug port\n");
|
||||
writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
|
||||
goto err;
|
||||
}
|
||||
dbgp_printk("debug ported enabled\n");
|
||||
|
||||
/* Completely transfer the debug device to the debug controller */
|
||||
portsc = readl(&ehci_regs->port_status[debug_port - 1]);
|
||||
portsc &= ~PORT_PE;
|
||||
writel(portsc, &ehci_regs->port_status[debug_port - 1]);
|
||||
|
||||
dbgp_mdelay(100);
|
||||
|
||||
/* Find the debug device and make it device number 127 */
|
||||
for (devnum = 0; devnum <= 127; devnum++) {
|
||||
ret = dbgp_control_msg(devnum,
|
||||
USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
|
||||
USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
|
||||
&dbgp_desc, sizeof(dbgp_desc));
|
||||
if (ret > 0)
|
||||
break;
|
||||
}
|
||||
if (devnum > 127) {
|
||||
dbgp_printk("Could not find attached debug device\n");
|
||||
goto err;
|
||||
}
|
||||
if (ret < 0) {
|
||||
dbgp_printk("Attached device is not a debug device\n");
|
||||
goto err;
|
||||
}
|
||||
dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
|
||||
|
||||
/* Move the device to 127 if it isn't already there */
|
||||
if (devnum != USB_DEBUG_DEVNUM) {
|
||||
ret = dbgp_control_msg(devnum,
|
||||
USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
|
||||
USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
|
||||
if (ret < 0) {
|
||||
dbgp_printk("Could not move attached device to %d\n",
|
||||
USB_DEBUG_DEVNUM);
|
||||
goto err;
|
||||
}
|
||||
devnum = USB_DEBUG_DEVNUM;
|
||||
dbgp_printk("debug device renamed to 127\n");
|
||||
}
|
||||
|
||||
/* Enable the debug interface */
|
||||
ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
|
||||
USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
|
||||
USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
|
||||
if (ret < 0) {
|
||||
dbgp_printk(" Could not enable the debug device\n");
|
||||
goto err;
|
||||
}
|
||||
dbgp_printk("debug interface enabled\n");
|
||||
|
||||
/* Perform a small write to get the even/odd data state in sync
|
||||
*/
|
||||
ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
|
||||
if (ret < 0) {
|
||||
dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
|
||||
goto err;
|
||||
}
|
||||
dbgp_printk("small write doned\n");
|
||||
|
||||
return 0;
|
||||
err:
|
||||
/* Things didn't work so remove my claim */
|
||||
ctrl = readl(&ehci_debug->control);
|
||||
ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
|
||||
writel(ctrl, &ehci_debug->control);
|
||||
return -1;
|
||||
|
||||
next_debug_port:
|
||||
port_map_tried |= (1<<(debug_port - 1));
|
||||
new_debug_port = ((debug_port-1+1)%n_ports) + 1;
|
||||
if (port_map_tried != ((1<<n_ports) - 1)) {
|
||||
set_debug_port(new_debug_port);
|
||||
goto try_next_port;
|
||||
}
|
||||
if (--playtimes) {
|
||||
set_debug_port(new_debug_port);
|
||||
goto try_next_time;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int __init early_dbgp_init(char *s)
|
||||
{
|
||||
u32 debug_port, bar, offset;
|
||||
u32 bus, slot, func, cap;
|
||||
void __iomem *ehci_bar;
|
||||
u32 dbgp_num;
|
||||
u32 bar_val;
|
||||
char *e;
|
||||
int ret;
|
||||
u8 byte;
|
||||
|
||||
if (!early_pci_allowed())
|
||||
return -1;
|
||||
|
||||
dbgp_num = 0;
|
||||
if (*s)
|
||||
dbgp_num = simple_strtoul(s, &e, 10);
|
||||
dbgp_printk("dbgp_num: %d\n", dbgp_num);
|
||||
|
||||
cap = find_dbgp(dbgp_num, &bus, &slot, &func);
|
||||
if (!cap)
|
||||
return -1;
|
||||
|
||||
dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
|
||||
func);
|
||||
|
||||
debug_port = read_pci_config(bus, slot, func, cap);
|
||||
bar = (debug_port >> 29) & 0x7;
|
||||
bar = (bar * 4) + 0xc;
|
||||
offset = (debug_port >> 16) & 0xfff;
|
||||
dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
|
||||
if (bar != PCI_BASE_ADDRESS_0) {
|
||||
dbgp_printk("only debug ports on bar 1 handled.\n");
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
|
||||
dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
|
||||
if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
|
||||
dbgp_printk("only simple 32bit mmio bars supported\n");
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* double check if the mem space is enabled */
|
||||
byte = read_pci_config_byte(bus, slot, func, 0x04);
|
||||
if (!(byte & 0x2)) {
|
||||
byte |= 0x02;
|
||||
write_pci_config_byte(bus, slot, func, 0x04, byte);
|
||||
dbgp_printk("mmio for ehci enabled\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME I don't have the bar size so just guess PAGE_SIZE is more
|
||||
* than enough. 1K is the biggest I have seen.
|
||||
*/
|
||||
set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
|
||||
ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
|
||||
ehci_bar += bar_val & ~PAGE_MASK;
|
||||
dbgp_printk("ehci_bar: %p\n", ehci_bar);
|
||||
|
||||
ehci_caps = ehci_bar;
|
||||
ehci_regs = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase));
|
||||
ehci_debug = ehci_bar + offset;
|
||||
ehci_dev.bus = bus;
|
||||
ehci_dev.slot = slot;
|
||||
ehci_dev.func = func;
|
||||
|
||||
detect_set_debug_port();
|
||||
|
||||
ret = ehci_setup();
|
||||
if (ret < 0) {
|
||||
dbgp_printk("ehci_setup failed\n");
|
||||
ehci_debug = 0;
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void early_dbgp_write(struct console *con, const char *str, u32 n)
|
||||
{
|
||||
int chunk, ret;
|
||||
|
||||
if (!ehci_debug)
|
||||
return;
|
||||
while (n > 0) {
|
||||
chunk = n;
|
||||
if (chunk > DBGP_MAX_PACKET)
|
||||
chunk = DBGP_MAX_PACKET;
|
||||
ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
|
||||
dbgp_endpoint_out, str, chunk);
|
||||
str += chunk;
|
||||
n -= chunk;
|
||||
}
|
||||
}
|
||||
|
||||
static struct console early_dbgp_console = {
|
||||
.name = "earlydbg",
|
||||
.write = early_dbgp_write,
|
||||
.flags = CON_PRINTBUFFER,
|
||||
.index = -1,
|
||||
};
|
||||
#endif
|
||||
|
||||
/* Console interface to a host file on AMD's SimNow! */
|
||||
|
||||
static int simnow_fd;
|
||||
|
|
@ -165,6 +889,7 @@ enum {
|
|||
static noinline long simnow(long cmd, long a, long b, long c)
|
||||
{
|
||||
long ret;
|
||||
|
||||
asm volatile("cpuid" :
|
||||
"=a" (ret) :
|
||||
"b" (a), "c" (b), "d" (c), "0" (MAGIC1), "D" (cmd + MAGIC2));
|
||||
|
|
@ -174,6 +899,7 @@ static noinline long simnow(long cmd, long a, long b, long c)
|
|||
static void __init simnow_init(char *str)
|
||||
{
|
||||
char *fn = "klog";
|
||||
|
||||
if (*str == '=')
|
||||
fn = ++str;
|
||||
/* error ignored */
|
||||
|
|
@ -208,10 +934,11 @@ asmlinkage void early_printk(const char *fmt, ...)
|
|||
va_end(ap);
|
||||
}
|
||||
|
||||
static int __initdata keep_early;
|
||||
|
||||
static int __init setup_early_printk(char *buf)
|
||||
{
|
||||
int keep_early;
|
||||
|
||||
if (!buf)
|
||||
return 0;
|
||||
|
||||
|
|
@ -219,8 +946,7 @@ static int __init setup_early_printk(char *buf)
|
|||
return 0;
|
||||
early_console_initialized = 1;
|
||||
|
||||
if (strstr(buf, "keep"))
|
||||
keep_early = 1;
|
||||
keep_early = (strstr(buf, "keep") != NULL);
|
||||
|
||||
if (!strncmp(buf, "serial", 6)) {
|
||||
early_serial_init(buf + 6);
|
||||
|
|
@ -238,6 +964,17 @@ static int __init setup_early_printk(char *buf)
|
|||
simnow_init(buf + 6);
|
||||
early_console = &simnow_console;
|
||||
keep_early = 1;
|
||||
#ifdef CONFIG_EARLY_PRINTK_DBGP
|
||||
} else if (!strncmp(buf, "dbgp", 4)) {
|
||||
if (early_dbgp_init(buf+4) < 0)
|
||||
return 0;
|
||||
early_console = &early_dbgp_console;
|
||||
/*
|
||||
* usb subsys will reset ehci controller, so don't keep
|
||||
* that early console
|
||||
*/
|
||||
keep_early = 0;
|
||||
#endif
|
||||
#ifdef CONFIG_HVC_XEN
|
||||
} else if (!strncmp(buf, "xen", 3)) {
|
||||
early_console = &xenboot_console;
|
||||
|
|
@ -251,4 +988,23 @@ static int __init setup_early_printk(char *buf)
|
|||
register_console(early_console);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __init enable_debug_console(char *buf)
|
||||
{
|
||||
#ifdef DBGP_DEBUG
|
||||
struct console *old_early_console = NULL;
|
||||
|
||||
if (early_console_initialized && early_console) {
|
||||
old_early_console = early_console;
|
||||
unregister_console(early_console);
|
||||
early_console_initialized = 0;
|
||||
}
|
||||
|
||||
setup_early_printk(buf);
|
||||
|
||||
if (early_console == old_early_console && old_early_console)
|
||||
register_console(old_early_console);
|
||||
#endif
|
||||
}
|
||||
|
||||
early_param("earlyprintk", setup_early_printk);
|
||||
|
|
|
|||
Loading…
Reference in New Issue