MLK-22879-01 clk: imx: Add no cached flag for dram pll

When doing DRAM frequency change, the DRAM PLL config will
be changed in ATF side, so add 'CLK_GET_RATE_NOCACHE' flag
to make sure each time we get the DRAM PLL frequency through
'clk_get_rate' API, we can get the correct frequency.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>

drivers/clk/imx/clk-imx8mm.c

@@ -69,6 +69,7 @@ static struct imx_pll14xx_clk imx8mm_dram_pll = {
 		.type = PLL_1443X,
 		.rate_table = imx8mm_drampll_tbl,
 		.rate_count = ARRAY_SIZE(imx8mm_drampll_tbl),
+		.flags = CLK_GET_RATE_NOCACHE,
 };
 
 static struct imx_pll14xx_clk imx8mm_arm_pll = {

drivers/clk/imx/clk-imx8mn.c

@@ -84,6 +84,7 @@ static struct imx_pll14xx_clk imx8mn_dram_pll = {
 		.type = PLL_1443X,
 		.rate_table = imx8mn_drampll_tbl,
 		.rate_count = ARRAY_SIZE(imx8mn_drampll_tbl),
+		.flags = CLK_GET_RATE_NOCACHE,
 };
 
 static struct imx_pll14xx_clk imx8mn_arm_pll = {