fpga: mgr: API change to replace fpga load functions with single function
fpga-mgr has three methods for programming FPGAs, depending on whether the image is in a scatter gather list, a contiguous buffer, or a firmware file. This makes it difficult to write upper layers as the caller has to assume whether the FPGA image is in a sg table, as a single buffer, or a firmware file. This commit moves these parameters to struct fpga_image_info and adds a single function for programming fpgas. New functions: * fpga_mgr_load - given fpga manager and struct fpga_image_info, program the fpga. * fpga_image_info_alloc - alloc a struct fpga_image_info. * fpga_image_info_free - free a struct fpga_image_info. These three functions are unexported: * fpga_mgr_buf_load_sg * fpga_mgr_buf_load * fpga_mgr_firmware_load Also use devm_kstrdup to copy firmware_name so we aren't making assumptions about where it comes from when allocing/freeing the struct fpga_image_info. API documentation has been updated and a new document for FPGA region has been added. Signed-off-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>hifive-unleashed-5.1
Alan Tull
Greg Kroah-Hartman
parent
9c1c4b2753
commit
5cf0c7f650
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@ -11,61 +11,53 @@ hidden away in a low level driver which registers a set of ops with the core.
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The FPGA image data itself is very manufacturer specific, but for our purposes
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it's just binary data. The FPGA manager core won't parse it.
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The FPGA image to be programmed can be in a scatter gather list, a single
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contiguous buffer, or a firmware file. Because allocating contiguous kernel
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memory for the buffer should be avoided, users are encouraged to use a scatter
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gather list instead if possible.
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The particulars for programming the image are presented in a structure (struct
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fpga_image_info). This struct contains parameters such as pointers to the
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FPGA image as well as image-specific particulars such as whether the image was
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built for full or partial reconfiguration.
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API Functions:
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==============
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To program the FPGA from a file or from a buffer:
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-------------------------------------------------
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To program the FPGA:
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--------------------
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int fpga_mgr_buf_load(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *buf, size_t count);
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int fpga_mgr_load(struct fpga_manager *mgr,
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struct fpga_image_info *info);
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Load the FPGA from an image which exists as a contiguous buffer in
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memory. Allocating contiguous kernel memory for the buffer should be avoided,
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users are encouraged to use the _sg interface instead of this.
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int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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struct sg_table *sgt);
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Load the FPGA from an image from non-contiguous in memory. Callers can
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construct a sg_table using alloc_page backed memory.
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int fpga_mgr_firmware_load(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *image_name);
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Load the FPGA from an image which exists as a file. The image file must be on
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the firmware search path (see the firmware class documentation). If successful,
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Load the FPGA from an image which is indicated in the info. If successful,
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the FPGA ends up in operating mode. Return 0 on success or a negative error
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code.
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A FPGA design contained in a FPGA image file will likely have particulars that
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affect how the image is programmed to the FPGA. These are contained in struct
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fpga_image_info. Currently the only such particular is a single flag bit
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indicating whether the image is for full or partial reconfiguration.
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To allocate or free a struct fpga_image_info:
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---------------------------------------------
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struct fpga_image_info *fpga_image_info_alloc(struct device *dev);
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void fpga_image_info_free(struct fpga_image_info *info);
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To get/put a reference to a FPGA manager:
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-----------------------------------------
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struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
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struct fpga_manager *fpga_mgr_get(struct device *dev);
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Given a DT node or device, get an exclusive reference to a FPGA manager.
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void fpga_mgr_put(struct fpga_manager *mgr);
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Release the reference.
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Given a DT node or device, get an exclusive reference to a FPGA manager.
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fpga_mgr_put releases the reference.
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To register or unregister the low level FPGA-specific driver:
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-------------------------------------------------------------
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int fpga_mgr_register(struct device *dev, const char *name,
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const struct fpga_manager_ops *mops,
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void *priv);
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const struct fpga_manager_ops *mops,
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void *priv);
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void fpga_mgr_unregister(struct device *dev);
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@ -78,23 +70,41 @@ How to write an image buffer to a supported FPGA
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/* Include to get the API */
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#include <linux/fpga/fpga-mgr.h>
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/* device node that specifies the FPGA manager to use */
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struct device_node *mgr_node = ...
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/* FPGA image is in this buffer. count is size of the buffer. */
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char *buf = ...
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int count = ...
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/* struct with information about the FPGA image to program. */
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struct fpga_image_info info;
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/* flags indicates whether to do full or partial reconfiguration */
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info.flags = 0;
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struct fpga_manager *mgr;
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struct fpga_image_info *info;
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int ret;
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/* Get exclusive control of FPGA manager */
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struct fpga_manager *mgr = of_fpga_mgr_get(mgr_node);
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/* struct with information about the FPGA image to program. */
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info = fpga_image_info_alloc(dev);
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/* flags indicates whether to do full or partial reconfiguration */
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info->flags = FPGA_MGR_PARTIAL_RECONFIG;
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/*
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* At this point, indicate where the image is. This is pseudo-code; you're
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* going to use one of these three.
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*/
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if (image is in a scatter gather table) {
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info->sgt = [your scatter gather table]
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} else if (image is in a buffer) {
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info->buf = [your image buffer]
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info->count = [image buffer size]
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} else if (image is in a firmware file) {
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info->firmware_name = devm_kstrdup(dev, firmware_name, GFP_KERNEL);
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}
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/*
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* Get a reference to FPGA manager. This example uses the device node of the
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* manager. You could use fpga_mgr_get() instead if you have the device instead
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* of the device node.
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*/
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mgr = of_fpga_mgr_get(mgr_node);
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/* Load the buffer to the FPGA */
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ret = fpga_mgr_buf_load(mgr, &info, buf, count);
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@ -102,35 +112,8 @@ ret = fpga_mgr_buf_load(mgr, &info, buf, count);
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/* Release the FPGA manager */
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fpga_mgr_put(mgr);
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How to write an image file to a supported FPGA
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==============================================
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/* Include to get the API */
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#include <linux/fpga/fpga-mgr.h>
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/* device node that specifies the FPGA manager to use */
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struct device_node *mgr_node = ...
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/* FPGA image is in this file which is in the firmware search path */
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const char *path = "fpga-image-9.rbf"
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/* struct with information about the FPGA image to program. */
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struct fpga_image_info info;
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/* flags indicates whether to do full or partial reconfiguration */
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info.flags = 0;
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int ret;
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/* Get exclusive control of FPGA manager */
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struct fpga_manager *mgr = of_fpga_mgr_get(mgr_node);
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/* Get the firmware image (path) and load it to the FPGA */
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ret = fpga_mgr_firmware_load(mgr, &info, path);
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/* Release the FPGA manager */
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fpga_mgr_put(mgr);
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/* Deallocate the image info if you're done with it */
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fpga_image_info_free(info);
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How to support a new FPGA device
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================================
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@ -0,0 +1,95 @@
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FPGA Regions
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Alan Tull 2017
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CONTENTS
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- Introduction
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- The FPGA region API
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- Usage example
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Introduction
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============
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This document is meant to be an brief overview of the FPGA region API usage. A
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more conceptual look at regions can be found in [1].
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For the purposes of this API document, let's just say that a region associates
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an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an
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FPGA or the whole FPGA. The API provides a way to register a region and to
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program a region.
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Currently the only layer above fpga-region.c in the kernel is the Device Tree
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support (of-fpga-region.c) described in [1]. The DT support layer uses regions
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to program the FPGA and then DT to handle enumeration. The common region code
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is intended to be used by other schemes that have other ways of accomplishing
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enumeration after programming.
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An fpga-region can be set up to know the following things:
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* which FPGA manager to use to do the programming
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* which bridges to disable before programming and enable afterwards.
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Additional info needed to program the FPGA image is passed in the struct
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fpga_image_info [2] including:
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* pointers to the image as either a scatter-gather buffer, a contiguous
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buffer, or the name of firmware file
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* flags indicating specifics such as whether the image if for partial
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reconfiguration.
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===================
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The FPGA region API
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===================
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To register or unregister a region:
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-----------------------------------
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int fpga_region_register(struct device *dev,
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struct fpga_region *region);
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int fpga_region_unregister(struct fpga_region *region);
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An example of usage can be seen in the probe function of [3]
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To program an FPGA:
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-------------------
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int fpga_region_program_fpga(struct fpga_region *region);
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This function operates on info passed in the fpga_image_info
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(region->info).
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This function will attempt to:
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* lock the region's mutex
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* lock the region's FPGA manager
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* build a list of FPGA bridges if a method has been specified to do so
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* disable the bridges
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* program the FPGA
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* re-enable the bridges
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* release the locks
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=============
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Usage example
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=============
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First, allocate the info struct:
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info = fpga_image_info_alloc(dev);
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if (!info)
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return -ENOMEM;
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Set flags as needed, i.e.
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info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
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Point to your FPGA image, such as:
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info->sgt = &sgt;
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Add info to region and do the programming:
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region->info = info;
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ret = fpga_region_program_fpga(region);
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Then enumerate whatever hardware has appeared in the FPGA.
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--
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[1] ../devicetree/bindings/fpga/fpga-region.txt
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[2] ./fpga-mgr.txt
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[3] ../../drivers/fpga/of-fpga-region.c
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@ -0,0 +1,23 @@
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Linux kernel FPGA support
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Alan Tull 2017
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The main point of this project has been to separate the out the upper layers
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that know when to reprogram a FPGA from the lower layers that know how to
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reprogram a specific FPGA device. The intention is to make this manufacturer
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agnostic, understanding that of course the FPGA images are very device specific
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themselves.
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The framework in the kernel includes:
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* low level FPGA manager drivers that know how to program a specific device
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* the fpga-mgr framework they are registered with
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* low level FPGA bridge drivers for hard/soft bridges which are intended to
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be disable during FPGA programming
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* the fpga-bridge framework they are registered with
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* the fpga-region framework which associates and controls managers and bridges
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as reconfigurable regions
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* the of-fpga-region support for reprogramming FPGAs when device tree overlays
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are applied.
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I would encourage you the user to add code that creates FPGA regions rather
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that trying to control managers and bridges separately.
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@ -2,6 +2,7 @@
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* FPGA Manager Core
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*
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* Copyright (C) 2013-2015 Altera Corporation
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* Copyright (C) 2017 Intel Corporation
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*
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* With code from the mailing list:
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* Copyright (C) 2013 Xilinx, Inc.
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@ -31,6 +32,40 @@
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static DEFINE_IDA(fpga_mgr_ida);
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static struct class *fpga_mgr_class;
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struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
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{
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struct fpga_image_info *info;
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get_device(dev);
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info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
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if (!info) {
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put_device(dev);
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return NULL;
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}
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info->dev = dev;
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return info;
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}
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EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
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void fpga_image_info_free(struct fpga_image_info *info)
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{
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struct device *dev;
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if (!info)
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return;
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dev = info->dev;
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if (info->firmware_name)
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devm_kfree(dev, info->firmware_name);
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devm_kfree(dev, info);
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put_device(dev);
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}
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EXPORT_SYMBOL_GPL(fpga_image_info_free);
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/*
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* Call the low level driver's write_init function. This will do the
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* device-specific things to get the FPGA into the state where it is ready to
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@ -137,8 +172,9 @@ static int fpga_mgr_write_complete(struct fpga_manager *mgr,
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
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struct sg_table *sgt)
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static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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struct sg_table *sgt)
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{
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int ret;
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@ -170,7 +206,6 @@ int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
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return fpga_mgr_write_complete(mgr, info);
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_buf_load_sg);
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static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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@ -210,8 +245,9 @@ static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
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const char *buf, size_t count)
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static int fpga_mgr_buf_load(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *buf, size_t count)
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{
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struct page **pages;
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struct sg_table sgt;
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@ -266,7 +302,6 @@ int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
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return rc;
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
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/**
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* fpga_mgr_firmware_load - request firmware and load to fpga
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@ -282,9 +317,9 @@ EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int fpga_mgr_firmware_load(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *image_name)
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static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *image_name)
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{
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struct device *dev = &mgr->dev;
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const struct firmware *fw;
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@ -307,7 +342,18 @@ int fpga_mgr_firmware_load(struct fpga_manager *mgr,
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return ret;
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load);
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int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
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{
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if (info->sgt)
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return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
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if (info->buf && info->count)
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return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
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if (info->firmware_name)
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return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
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return -EINVAL;
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_load);
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static const char * const state_str[] = {
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[FPGA_MGR_STATE_UNKNOWN] = "unknown",
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@ -578,7 +624,7 @@ static void __exit fpga_mgr_class_exit(void)
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ida_destroy(&fpga_mgr_ida);
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}
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MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
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MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
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MODULE_DESCRIPTION("FPGA manager framework");
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MODULE_LICENSE("GPL v2");
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@ -226,14 +226,11 @@ static int fpga_region_get_bridges(struct fpga_region *region,
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/**
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* fpga_region_program_fpga - program FPGA
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* @region: FPGA region
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* @firmware_name: name of FPGA image firmware file
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* @overlay: device node of the overlay
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* Program an FPGA using information in the device tree.
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* Function assumes that there is a firmware-name property.
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* Program an FPGA using information in the region's fpga image info.
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* Return 0 for success or negative error code.
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*/
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static int fpga_region_program_fpga(struct fpga_region *region,
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const char *firmware_name,
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struct device_node *overlay)
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{
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struct fpga_manager *mgr;
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|
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@ -264,7 +261,7 @@ static int fpga_region_program_fpga(struct fpga_region *region,
|
|||
goto err_put_br;
|
||||
}
|
||||
|
||||
ret = fpga_mgr_firmware_load(mgr, region->info, firmware_name);
|
||||
ret = fpga_mgr_load(mgr, region->info);
|
||||
if (ret) {
|
||||
pr_err("failed to load fpga image\n");
|
||||
goto err_put_br;
|
||||
|
|
@ -357,16 +354,15 @@ static int child_regions_with_firmware(struct device_node *overlay)
|
|||
static int fpga_region_notify_pre_apply(struct fpga_region *region,
|
||||
struct of_overlay_notify_data *nd)
|
||||
{
|
||||
const char *firmware_name = NULL;
|
||||
struct device *dev = ®ion->dev;
|
||||
struct fpga_image_info *info;
|
||||
const char *firmware_name;
|
||||
int ret;
|
||||
|
||||
info = devm_kzalloc(®ion->dev, sizeof(*info), GFP_KERNEL);
|
||||
info = fpga_image_info_alloc(dev);
|
||||
if (!info)
|
||||
return -ENOMEM;
|
||||
|
||||
region->info = info;
|
||||
|
||||
/* Reject overlay if child FPGA Regions have firmware-name property */
|
||||
ret = child_regions_with_firmware(nd->overlay);
|
||||
if (ret)
|
||||
|
|
@ -382,7 +378,13 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
|
|||
if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
|
||||
info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
|
||||
|
||||
of_property_read_string(nd->overlay, "firmware-name", &firmware_name);
|
||||
if (!of_property_read_string(nd->overlay, "firmware-name",
|
||||
&firmware_name)) {
|
||||
info->firmware_name = devm_kstrdup(dev, firmware_name,
|
||||
GFP_KERNEL);
|
||||
if (!info->firmware_name)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
|
||||
&info->enable_timeout_us);
|
||||
|
|
@ -394,22 +396,33 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
|
|||
&info->config_complete_timeout_us);
|
||||
|
||||
/* If FPGA was externally programmed, don't specify firmware */
|
||||
if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
|
||||
if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && info->firmware_name) {
|
||||
pr_err("error: specified firmware and external-fpga-config");
|
||||
fpga_image_info_free(info);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* FPGA is already configured externally. We're done. */
|
||||
if (info->flags & FPGA_MGR_EXTERNAL_CONFIG)
|
||||
if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
|
||||
fpga_image_info_free(info);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* If we got this far, we should be programming the FPGA */
|
||||
if (!firmware_name) {
|
||||
if (!info->firmware_name) {
|
||||
pr_err("should specify firmware-name or external-fpga-config\n");
|
||||
fpga_image_info_free(info);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return fpga_region_program_fpga(region, firmware_name, nd->overlay);
|
||||
region->info = info;
|
||||
ret = fpga_region_program_fpga(region, nd->overlay);
|
||||
if (ret) {
|
||||
fpga_image_info_free(info);
|
||||
region->info = NULL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -426,7 +439,7 @@ static void fpga_region_notify_post_remove(struct fpga_region *region,
|
|||
{
|
||||
fpga_bridges_disable(®ion->bridge_list);
|
||||
fpga_bridges_put(®ion->bridge_list);
|
||||
devm_kfree(®ion->dev, region->info);
|
||||
fpga_image_info_free(region->info);
|
||||
region->info = NULL;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* FPGA Framework
|
||||
*
|
||||
* Copyright (C) 2013-2015 Altera Corporation
|
||||
* Copyright (C) 2013-2016 Altera Corporation
|
||||
* Copyright (C) 2017 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -15,12 +16,12 @@
|
|||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#ifndef _LINUX_FPGA_MGR_H
|
||||
#define _LINUX_FPGA_MGR_H
|
||||
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
struct fpga_manager;
|
||||
struct sg_table;
|
||||
|
||||
|
|
@ -83,12 +84,22 @@ enum fpga_mgr_states {
|
|||
* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
|
||||
* @config_complete_timeout_us: maximum time for FPGA to switch to operating
|
||||
* status in the write_complete op.
|
||||
* @firmware_name: name of FPGA image firmware file
|
||||
* @sgt: scatter/gather table containing FPGA image
|
||||
* @buf: contiguous buffer containing FPGA image
|
||||
* @count: size of buf
|
||||
* @dev: device that owns this
|
||||
*/
|
||||
struct fpga_image_info {
|
||||
u32 flags;
|
||||
u32 enable_timeout_us;
|
||||
u32 disable_timeout_us;
|
||||
u32 config_complete_timeout_us;
|
||||
char *firmware_name;
|
||||
struct sg_table *sgt;
|
||||
const char *buf;
|
||||
size_t count;
|
||||
struct device *dev;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -138,14 +149,11 @@ struct fpga_manager {
|
|||
|
||||
#define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
|
||||
|
||||
int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
|
||||
const char *buf, size_t count);
|
||||
int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
|
||||
struct sg_table *sgt);
|
||||
struct fpga_image_info *fpga_image_info_alloc(struct device *dev);
|
||||
|
||||
int fpga_mgr_firmware_load(struct fpga_manager *mgr,
|
||||
struct fpga_image_info *info,
|
||||
const char *image_name);
|
||||
void fpga_image_info_free(struct fpga_image_info *info);
|
||||
|
||||
int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info);
|
||||
|
||||
struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue