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ARM: tegra: Add SOR0_OUT clock on Tegra124

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This clock is needed for eDP to properly function, so add it to the SOR
device tree node.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2019-07-24 15:47:54 +02:00
parent 05a6a629f0
commit 5d089d42bc
1 changed files with 2 additions and 1 deletions
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3
arch/arm/boot/dts/tegra124.dtsi
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@ -157,10 +157,11 @@
reg = <0x0 0x54540000 0x0 0x00040000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SOR0>,
<&tegra_car TEGRA124_CLK_SOR0_OUT>,
<&tegra_car TEGRA124_CLK_PLL_D_OUT0>,
<&tegra_car TEGRA124_CLK_PLL_DP>,
<&tegra_car TEGRA124_CLK_CLK_M>;
clock-names = "sor", "parent", "dp", "safe";
clock-names = "sor", "out", "parent", "dp", "safe";
resets = <&tegra_car 182>;
reset-names = "sor";
status = "disabled";