arm64: kconfig: Ensure spinlock fastpaths are inlined if !PREEMPT
When running with CONFIG_PREEMPT=n, the spinlock fastpaths fit inside 64 bytes, which typically coincides with the L1 I-cache line size. Inline the spinlock fastpaths, like we do already for rwlocks. Signed-off-by: Will Deacon <will.deacon@arm.com>hifive-unleashed-5.1
parent
c11090474d
commit
5d168964ae
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@ -42,6 +42,16 @@ config ARM64
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select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPT
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select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPT
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select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPT
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select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPT
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select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPT
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select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPT
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select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPT
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select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPT
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select ARCH_INLINE_SPIN_LOCK if !PREEMPT
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select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPT
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select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPT
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select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPT
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select ARCH_INLINE_SPIN_UNLOCK if !PREEMPT
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select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPT
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select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPT
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select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPT
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select ARCH_USE_CMPXCHG_LOCKREF
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select ARCH_USE_CMPXCHG_LOCKREF
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_USE_QUEUED_SPINLOCKS
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select ARCH_USE_QUEUED_SPINLOCKS
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