Staging: vt6655: Fix Sparse Warning for Static Declarations
This patch fixes the following Sparse Warnings in rf.c: drivers/staging/vt6655/rf.c:58:21: warning: symbol 'dwAL2230InitTable' was not declared. Should it be static? drivers/staging/vt6655/rf.c:76:21: warning: symbol 'dwAL2230ChannelTable0' was not declared. Should it be static? drivers/staging/vt6655/rf.c:93:21: warning: symbol 'dwAL2230ChannelTable1' was not declared. Should it be static? drivers/staging/vt6655/rf.c:110:15: warning: symbol 'dwAL2230PowerTable' was not declared. Should it be static? drivers/staging/vt6655/rf.c:180:21: warning: symbol 'dwAL7230InitTable' was not declared. Should it be static? drivers/staging/vt6655/rf.c:203:21: warning: symbol 'dwAL7230InitTableAMode' was not declared. Should it be static? drivers/staging/vt6655/rf.c:222:21: warning: symbol 'dwAL7230ChannelTable0' was not declared. Should it be static? drivers/staging/vt6655/rf.c:288:21: warning: symbol 'dwAL7230ChannelTable1' was not declared. Should it be static? drivers/staging/vt6655/rf.c:352:21: warning: symbol 'dwAL7230ChannelTable2' was not declared. Should it be static? drivers/staging/vt6655/rf.c:431:6: warning: symbol 's_bAL7230Init' was not declared. Should it be static? drivers/staging/vt6655/rf.c:474:6: warning: symbol 's_bAL7230SelectChannel' was not declared. Should it be static? drivers/staging/vt6655/rf.c:634:6: warning: symbol 'RFbAL2230Init' was not declared. Should it be static? drivers/staging/vt6655/rf.c:681:6: warning: symbol 'RFbAL2230SelectChannel' was not declared. Should it be static? Signed-off-by: Rashika Kheria <rashika.kheria@gmail.com> Reviewed-by: Josh Triplett <josh@joshtriplett.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -55,7 +55,7 @@
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/*--------------------- Static Variables --------------------------*/
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const unsigned long dwAL2230InitTable[CB_AL2230_INIT_SEQ] = {
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static const unsigned long dwAL2230InitTable[CB_AL2230_INIT_SEQ] = {
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0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, //
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0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, //
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0x01A00200+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, //
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@ -73,7 +73,7 @@ const unsigned long dwAL2230InitTable[CB_AL2230_INIT_SEQ] = {
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0x00580F00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW
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};
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const unsigned long dwAL2230ChannelTable0[CB_MAX_CHANNEL] = {
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static const unsigned long dwAL2230ChannelTable0[CB_MAX_CHANNEL] = {
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0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz
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0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz
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0x03E79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz
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@ -90,7 +90,7 @@ const unsigned long dwAL2230ChannelTable0[CB_MAX_CHANNEL] = {
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0x03E7C000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW // channel = 14, Tf = 2412M
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};
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const unsigned long dwAL2230ChannelTable1[CB_MAX_CHANNEL] = {
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static const unsigned long dwAL2230ChannelTable1[CB_MAX_CHANNEL] = {
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0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz
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0x0B333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz
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0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz
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@ -107,7 +107,7 @@ const unsigned long dwAL2230ChannelTable1[CB_MAX_CHANNEL] = {
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0x06666100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW // channel = 14, Tf = 2412M
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};
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unsigned long dwAL2230PowerTable[AL2230_PWR_IDX_LEN] = {
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static unsigned long dwAL2230PowerTable[AL2230_PWR_IDX_LEN] = {
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0x04040900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW,
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0x04041900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW,
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0x04042900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW,
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@ -177,7 +177,7 @@ unsigned long dwAL2230PowerTable[AL2230_PWR_IDX_LEN] = {
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//{{ RobertYu:20050104
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// 40MHz reference frequency
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// Need to Pull PLLON(PE3) low when writing channel registers through 3-wire.
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const unsigned long dwAL7230InitTable[CB_AL7230_INIT_SEQ] = {
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static const unsigned long dwAL7230InitTable[CB_AL7230_INIT_SEQ] = {
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0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel1 // Need modify for 11a
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0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel1 // Need modify for 11a
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0x841FF200+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 451FE2
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@ -200,7 +200,7 @@ const unsigned long dwAL7230InitTable[CB_AL7230_INIT_SEQ] = {
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0x1ABA8F00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // Need modify for 11a: 12BACF
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};
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const unsigned long dwAL7230InitTableAMode[CB_AL7230_INIT_SEQ] = {
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static const unsigned long dwAL7230InitTableAMode[CB_AL7230_INIT_SEQ] = {
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0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel184 // Need modify for 11b/g
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0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel184 // Need modify for 11b/g
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0x451FE200+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11b/g
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@ -219,7 +219,7 @@ const unsigned long dwAL7230InitTableAMode[CB_AL7230_INIT_SEQ] = {
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0x12BACF00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // Need modify for 11b/g
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};
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const unsigned long dwAL7230ChannelTable0[CB_MAX_CHANNEL] = {
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static const unsigned long dwAL7230ChannelTable0[CB_MAX_CHANNEL] = {
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0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz
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0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz
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0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz
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@ -285,7 +285,7 @@ const unsigned long dwAL7230ChannelTable0[CB_MAX_CHANNEL] = {
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0x0FF61000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // channel = 165, Tf = 5825MHz (56)
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};
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const unsigned long dwAL7230ChannelTable1[CB_MAX_CHANNEL] = {
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static const unsigned long dwAL7230ChannelTable1[CB_MAX_CHANNEL] = {
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0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz
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0x1B333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz
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0x03333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz
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@ -349,7 +349,7 @@ const unsigned long dwAL7230ChannelTable1[CB_MAX_CHANNEL] = {
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0x02AAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // channel = 165, Tf = 5825MHz (56)
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};
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const unsigned long dwAL7230ChannelTable2[CB_MAX_CHANNEL] = {
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static const unsigned long dwAL7230ChannelTable2[CB_MAX_CHANNEL] = {
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0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz
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0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz
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0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz
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@ -428,7 +428,7 @@ const unsigned long dwAL7230ChannelTable2[CB_MAX_CHANNEL] = {
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* Return Value: true if succeeded; false if failed.
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*
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*/
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bool s_bAL7230Init(unsigned long dwIoBase)
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static bool s_bAL7230Init(unsigned long dwIoBase)
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{
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int ii;
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bool bResult;
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@ -471,7 +471,7 @@ bool s_bAL7230Init(unsigned long dwIoBase)
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}
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// Need to Pull PLLON low when writing channel registers through 3-wire interface
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bool s_bAL7230SelectChannel(unsigned long dwIoBase, unsigned char byChannel)
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static bool s_bAL7230SelectChannel(unsigned long dwIoBase, unsigned char byChannel)
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{
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bool bResult;
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@ -631,7 +631,7 @@ bool IFRFbWriteEmbedded(unsigned long dwIoBase, unsigned long dwData)
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* Return Value: true if succeeded; false if failed.
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*
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*/
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bool RFbAL2230Init(unsigned long dwIoBase)
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static bool RFbAL2230Init(unsigned long dwIoBase)
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{
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int ii;
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bool bResult;
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@ -678,7 +678,7 @@ bool RFbAL2230Init(unsigned long dwIoBase)
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return bResult;
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}
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bool RFbAL2230SelectChannel(unsigned long dwIoBase, unsigned char byChannel)
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static bool RFbAL2230SelectChannel(unsigned long dwIoBase, unsigned char byChannel)
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{
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bool bResult;
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