Versatile family cleanups step 1:
- Finalize RealView the PB1176 and PB11MPCore device trees - Move Versatile to use the power/reset driver instead of a custom restart hook -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWwZOHAAoJEEEQszewGV1zsg8P/3xtEDPR9GJAuzzgV8o8hmpA psFc4PmdQcp1e19gb2oi0oKcv9xDzsKGavy/BYMMn9HQ6v4wTmtM9qMwNgRyTWZq RyAtnPxUP543Qiae1tdPBp700cyg8UsEcL56qhwemCOucjwD6wZNiAAs6bUh9mYa J1liSaarw+XOhzUdfqffk0JUac1oqnvdiiOLwAXsdWbCfNdkJGbfZ0N5TuUANMhM RXeqq8giEZAbvQtqumZv6c7Qk02zeG6tYq6R7lsW65IIvOhVk2rxYdC8ZhPTojxR V7jMLnA4xYn5IaLE4l7Z32AqKWGnsThmdP4OEMLnRhEduutHWUVj3XHlPAlS1pN1 cD+mHuP48+5AscEL6Xf6+jeVYFkdER3RX9DgGZxUgLENw9T4g0/vq2DSGijwPuDN NB++vroPQoFEoPzCOx+JvO88VctabzuV7Z6rIvSLcIwPAhHvzMk1G+gy6hrUz5Bc cfovCqw1C8Y15srcIRhNr8dxDyZ3bpsatbSQNgPly4cHnAHLB8olTpXdfBzKIbKO FQmiAh+aPljOXxJT5yTg+3isIWA2tkc67WNiuX3+aKp38Ux2TNvDYCGf+LXF0RsU hgLGe3f4Bqw9xIMPYqQZM2UBl91p48ErhhmNJCWjceVgLEDHsCxaIvCx+oqLyYdv 00TEPFLVtam4SJbqgJwq =NvEo -----END PGP SIGNATURE----- Merge tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt Versatile DT cleanups from Linus Walleij: "this is a first pull request for my cleanups for the Versatile, as the finished stuff should not be sitting in my tree but in ARM SoC. This completes the ARM RealView PB1176 and PB11MPCore device trees, and moves the Versatile to use power/reset. The idea is to keep working on this cleanup branch and send additional patches on top of this one as the prerequisites are merged into the MTD and FBDEV subsystems. So please create a special versatile cleanup branch (or suggest another approach). As it happens, board files and device trees need to change at the same time to make logical sense, especially for Versatile where auxdata is replaced with DT entries, such as when reset is moved in the last patch in this set. The MTD and CLCD changes will share this characteristic." Versatile family cleanups step 1: - Finalize RealView the PB1176 and PB11MPCore device trees - Move Versatile to use the power/reset driver instead of a custom restart hook * tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: versatile: move restart to the device tree ARM: realview: add the DS1338 RTC to PB1176 DT ARM: pb1176: add ethernet to devicetree ARM: pb1176: add ISP1761 USB OTG host controller ARM: pb1176: add AACI to the device tree ARM: pb1176: add ICST307 clocks to the device tree ARM: realview: fix up PB11MP flash compat strings ARM: realview: add flash devices to the PB1176 DTS Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
5dab9f62a4
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@ -53,6 +53,14 @@
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regulator-boot-on;
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};
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veth: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "veth";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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};
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xtal24mhz: xtal24mhz@24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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@ -106,6 +114,53 @@
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clock-frequency = <0>;
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};
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flash@30000000 {
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compatible = "arm,versatile-flash", "cfi-flash";
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reg = <0x30000000 0x4000000>;
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bank-width = <4>;
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};
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fpga_flash@38000000 {
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compatible = "arm,versatile-flash", "cfi-flash";
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reg = <0x38000000 0x800000>;
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bank-width = <4>;
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};
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/*
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* The "secure flash" contains things like the boot
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* monitor so we don't want people to accidentally
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* screw this up. Mark the device tree node disabled
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* by default.
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*/
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secflash@3c000000 {
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compatible = "arm,versatile-flash", "cfi-flash";
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reg = <0x3c000000 0x4000000>;
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bank-width = <4>;
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status = "disabled";
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};
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/* SMSC 9118 ethernet with PHY and EEPROM */
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ethernet@3a000000 {
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compatible = "smsc,lan9118", "smsc,lan9115";
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reg = <0x3a000000 0x10000>;
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interrupt-parent = <&intc_fpga1176>;
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interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
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phy-mode = "mii";
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reg-io-width = <4>;
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smsc,irq-active-high;
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smsc,irq-push-pull;
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vdd33a-supply = <&veth>;
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vddvario-supply = <&veth>;
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};
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usb@3b000000 {
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compatible = "nxp,usb-isp1761";
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reg = <0x3b000000 0x20000>;
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interrupt-parent = <&intc_fpga1176>;
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interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
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port1-otg;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -176,6 +231,41 @@
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label = "versatile:7";
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default-state = "off";
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};
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oscclk0: osc0@0c {
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compatible = "arm,syscon-icst307";
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#clock-cells = <0>;
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lock-offset = <0x20>;
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vco-offset = <0x0C>;
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clocks = <&xtal24mhz>;
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};
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oscclk1: osc1@10 {
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compatible = "arm,syscon-icst307";
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#clock-cells = <0>;
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lock-offset = <0x20>;
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vco-offset = <0x10>;
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clocks = <&xtal24mhz>;
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};
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oscclk2: osc2@14 {
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compatible = "arm,syscon-icst307";
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#clock-cells = <0>;
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lock-offset = <0x20>;
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vco-offset = <0x14>;
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clocks = <&xtal24mhz>;
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};
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oscclk3: osc3@18 {
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compatible = "arm,syscon-icst307";
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#clock-cells = <0>;
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lock-offset = <0x20>;
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vco-offset = <0x18>;
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clocks = <&xtal24mhz>;
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};
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oscclk4: osc4@1c {
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compatible = "arm,syscon-icst307";
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#clock-cells = <0>;
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lock-offset = <0x20>;
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vco-offset = <0x1c>;
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clocks = <&xtal24mhz>;
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};
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};
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/* Primary DevChip GIC synthesized with the CPU */
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clocks = <&uartclk>, <&pclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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/* Direct-mapped development chip ROM */
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pb1176_rom@10200000 {
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compatible = "direct-mapped";
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reg = <0x10200000 0x4000>;
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bank-width = <1>;
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};
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};
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/* These peripherals are inside the FPGA rather than the DevChip */
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@ -306,6 +403,27 @@
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compatible = "simple-bus";
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ranges;
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i2c0: i2c@10002000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "arm,versatile-i2c";
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reg = <0x10002000 0x1000>;
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rtc@68 {
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compatible = "dallas,ds1338";
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reg = <0x68>;
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};
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};
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fpga_aaci: aaci@10004000 {
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compatible = "arm,pl041", "arm,primecell";
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reg = <0x10004000 0x1000>;
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interrupt-parent = <&intc_fpga1176>;
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interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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fpga_mci: mmcsd@10005000 {
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compatible = "arm,pl18x", "arm,primecell";
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reg = <0x10005000 0x1000>;
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@ -230,14 +230,14 @@
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flash0@40000000 {
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/* 2 * 32MiB NOR Flash memory */
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compatible = "arm,vexpress-flash", "cfi-flash";
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compatible = "arm,versatile-flash", "cfi-flash";
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reg = <0x40000000 0x04000000>;
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bank-width = <4>;
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};
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flash1@44000000 {
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// 2 * 32MiB NOR Flash memory
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compatible = "arm,vexpress-flash", "cfi-flash";
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compatible = "arm,versatile-flash", "cfi-flash";
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reg = <0x44000000 0x04000000>;
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bank-width = <4>;
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};
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select COMMON_CLK_VERSATILE
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select CPU_ARM926T
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select ICST
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select MFD_SYSCON
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select MIGHT_HAVE_PCI
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select PLAT_VERSATILE
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select POWER_RESET
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select POWER_RESET_VERSATILE
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select VERSATILE_FPGA_IRQ
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help
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This enables support for ARM Ltd Versatile board.
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@ -52,8 +52,6 @@
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* Versatile Registers
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* ------------------------------------------------------------------------
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*/
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#define VERSATILE_SYS_LOCK_OFFSET 0x20
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#define VERSATILE_SYS_RESETCTL_OFFSET 0x40
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#define VERSATILE_SYS_PCICTL_OFFSET 0x44
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#define VERSATILE_SYS_MCI_OFFSET 0x48
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#define VERSATILE_SYS_FLASH_OFFSET 0x4C
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__io_address(VERSATILE_SCTL_BASE));
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}
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static void versatile_restart(enum reboot_mode mode, const char *cmd)
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{
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u32 val;
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val = readl(versatile_sys_base + VERSATILE_SYS_RESETCTL_OFFSET);
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val |= 0x105;
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writel(0xa05f, versatile_sys_base + VERSATILE_SYS_LOCK_OFFSET);
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writel(val, versatile_sys_base + VERSATILE_SYS_RESETCTL_OFFSET);
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writel(0, versatile_sys_base + VERSATILE_SYS_LOCK_OFFSET);
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}
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static void __init versatile_dt_pci_init(void)
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{
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u32 val;
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.init_early = versatile_init_early,
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.init_machine = versatile_dt_init,
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.dt_compat = versatile_dt_match,
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.restart = versatile_restart,
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MACHINE_END
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