Merge branch 'soc-r8a7778' into boards-bockw-base
This commit is contained in:
commit
5e3780ba6d
|
@ -58,11 +58,13 @@ static struct clk *main_clks[] = {
|
|||
};
|
||||
|
||||
enum {
|
||||
MSTP114,
|
||||
MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
|
||||
MSTP016, MSTP015,
|
||||
MSTP_NR };
|
||||
|
||||
static struct clk mstp_clks[MSTP_NR] = {
|
||||
[MSTP114] = SH_CLK_MSTP32(&clkp, MSTPCR1, 14, 0), /* Ether */
|
||||
[MSTP026] = SH_CLK_MSTP32(&clkp, MSTPCR0, 26, 0), /* SCIF0 */
|
||||
[MSTP025] = SH_CLK_MSTP32(&clkp, MSTPCR0, 25, 0), /* SCIF1 */
|
||||
[MSTP024] = SH_CLK_MSTP32(&clkp, MSTPCR0, 24, 0), /* SCIF2 */
|
||||
|
@ -75,6 +77,7 @@ static struct clk mstp_clks[MSTP_NR] = {
|
|||
|
||||
static struct clk_lookup lookups[] = {
|
||||
/* MSTP32 clocks */
|
||||
CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
|
||||
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
|
||||
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
|
||||
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
|
||||
|
|
|
@ -18,11 +18,15 @@
|
|||
#ifndef __ASM_R8A7778_H__
|
||||
#define __ASM_R8A7778_H__
|
||||
|
||||
#include <linux/sh_eth.h>
|
||||
|
||||
extern void r8a7778_add_standard_devices(void);
|
||||
extern void r8a7778_add_standard_devices_dt(void);
|
||||
extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
|
||||
extern void r8a7778_init_delay(void);
|
||||
extern void r8a7778_init_irq(void);
|
||||
extern void r8a7778_init_irq_dt(void);
|
||||
extern void r8a7778_clock_init(void);
|
||||
extern void r8a7778_init_irq_extpin(int irlm);
|
||||
|
||||
#endif /* __ASM_R8A7778_H__ */
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
*
|
||||
* Copyright (C) 2013 Renesas Solutions Corp.
|
||||
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||
* Copyright (C) 2013 Cogent Embedded, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@ -23,6 +24,7 @@
|
|||
#include <linux/irqchip/arm-gic.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/irqchip.h>
|
||||
#include <linux/serial_sci.h>
|
||||
|
@ -78,22 +80,20 @@ static struct sh_timer_config sh_tmu1_platform_data = {
|
|||
.clocksource_rating = 200,
|
||||
};
|
||||
|
||||
#define PLATFORM_INFO(n, i) \
|
||||
{ \
|
||||
.parent = &platform_bus, \
|
||||
.name = #n, \
|
||||
.id = i, \
|
||||
.res = n ## i ## _resources, \
|
||||
.num_res = ARRAY_SIZE(n ## i ##_resources), \
|
||||
.data = &n ## i ##_platform_data, \
|
||||
.size_data = sizeof(n ## i ## _platform_data), \
|
||||
}
|
||||
|
||||
struct platform_device_info platform_devinfo[] = {
|
||||
PLATFORM_INFO(sh_tmu, 0),
|
||||
PLATFORM_INFO(sh_tmu, 1),
|
||||
/* Ether */
|
||||
static struct resource ether_resources[] = {
|
||||
DEFINE_RES_MEM(0xfde00000, 0x400),
|
||||
DEFINE_RES_IRQ(gic_iid(0x89)),
|
||||
};
|
||||
|
||||
#define r8a7778_register_tmu(idx) \
|
||||
platform_device_register_resndata( \
|
||||
&platform_bus, "sh_tmu", idx, \
|
||||
sh_tmu##idx##_resources, \
|
||||
ARRAY_SIZE(sh_tmu##idx##_resources), \
|
||||
&sh_tmu##idx##_platform_data, \
|
||||
sizeof(sh_tmu##idx##_platform_data))
|
||||
|
||||
void __init r8a7778_add_standard_devices(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -114,8 +114,59 @@ void __init r8a7778_add_standard_devices(void)
|
|||
&scif_platform_data[i],
|
||||
sizeof(struct plat_sci_port));
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(platform_devinfo); i++)
|
||||
platform_device_register_full(&platform_devinfo[i]);
|
||||
r8a7778_register_tmu(0);
|
||||
r8a7778_register_tmu(1);
|
||||
}
|
||||
|
||||
void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
|
||||
{
|
||||
platform_device_register_resndata(&platform_bus, "sh_eth", -1,
|
||||
ether_resources,
|
||||
ARRAY_SIZE(ether_resources),
|
||||
pdata, sizeof(*pdata));
|
||||
}
|
||||
|
||||
static struct renesas_intc_irqpin_config irqpin_platform_data = {
|
||||
.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
|
||||
.sense_bitfield_width = 2,
|
||||
};
|
||||
|
||||
static struct resource irqpin_resources[] = {
|
||||
DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
|
||||
DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
|
||||
DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
|
||||
DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */
|
||||
DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */
|
||||
DEFINE_RES_IRQ(gic_iid(0x3b)), /* IRQ0 */
|
||||
DEFINE_RES_IRQ(gic_iid(0x3c)), /* IRQ1 */
|
||||
DEFINE_RES_IRQ(gic_iid(0x3d)), /* IRQ2 */
|
||||
DEFINE_RES_IRQ(gic_iid(0x3e)), /* IRQ3 */
|
||||
};
|
||||
|
||||
void __init r8a7778_init_irq_extpin(int irlm)
|
||||
{
|
||||
void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
|
||||
unsigned long tmp;
|
||||
|
||||
if (!icr0) {
|
||||
pr_warn("r8a7778: unable to setup external irq pin mode\n");
|
||||
return;
|
||||
}
|
||||
|
||||
tmp = ioread32(icr0);
|
||||
if (irlm)
|
||||
tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */
|
||||
else
|
||||
tmp &= ~(1 << 23); /* IRL mode - not supported */
|
||||
tmp |= (1 << 21); /* LVLMODE = 1 */
|
||||
iowrite32(tmp, icr0);
|
||||
iounmap(icr0);
|
||||
|
||||
if (irlm)
|
||||
platform_device_register_resndata(
|
||||
&platform_bus, "renesas_intc_irqpin", -1,
|
||||
irqpin_resources, ARRAY_SIZE(irqpin_resources),
|
||||
&irqpin_platform_data, sizeof(irqpin_platform_data));
|
||||
}
|
||||
|
||||
#define INT2SMSKCR0 0x82288 /* 0xfe782288 */
|
||||
|
|
Loading…
Reference in a new issue