IB/hfi1: Add a patch value to the firmware version string
The HFI firmware now includes a patch level in its version. Updating the necessary code to include the patch version in the firmware string. Reviewed-by: Easwar Hariharan <easwar.hariharan@intel.com> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2015, 2016 Intel Corporation.
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* Copyright(c) 2015 - 2017 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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@ -7166,7 +7166,7 @@ static void get_link_widths(struct hfi1_devdata *dd, u16 *tx_width,
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* set the max_rate field in handle_verify_cap until v0.19.
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*/
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if ((dd->icode == ICODE_RTL_SILICON) &&
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(dd->dc8051_ver < dc8051_ver(0, 19))) {
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(dd->dc8051_ver < dc8051_ver(0, 19, 0))) {
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/* max_rate: 0 = 12.5G, 1 = 25G */
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switch (max_rate) {
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case 0:
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@ -7351,7 +7351,7 @@ void handle_verify_cap(struct work_struct *work)
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}
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ppd->link_speed_active = 0; /* invalid value */
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if (dd->dc8051_ver < dc8051_ver(0, 20)) {
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if (dd->dc8051_ver < dc8051_ver(0, 20, 0)) {
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/* remote_tx_rate: 0 = 12.5G, 1 = 25G */
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switch (remote_tx_rate) {
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case 0:
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@ -8422,7 +8422,7 @@ static int write_lcb_via_8051(struct hfi1_devdata *dd, u32 addr, u64 data)
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int ret;
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if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR ||
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(dd->dc8051_ver < dc8051_ver(0, 20))) {
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(dd->dc8051_ver < dc8051_ver(0, 20, 0))) {
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if (acquire_lcb_access(dd, 0) == 0) {
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write_csr(dd, addr, data);
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release_lcb_access(dd, 0);
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@ -8728,13 +8728,20 @@ static void read_remote_device_id(struct hfi1_devdata *dd, u16 *device_id,
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& REMOTE_DEVICE_REV_MASK;
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}
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void read_misc_status(struct hfi1_devdata *dd, u8 *ver_a, u8 *ver_b)
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void read_misc_status(struct hfi1_devdata *dd, u8 *ver_major, u8 *ver_minor,
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u8 *ver_patch)
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{
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u32 frame;
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read_8051_config(dd, MISC_STATUS, GENERAL_CONFIG, &frame);
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*ver_a = (frame >> STS_FM_VERSION_A_SHIFT) & STS_FM_VERSION_A_MASK;
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*ver_b = (frame >> STS_FM_VERSION_B_SHIFT) & STS_FM_VERSION_B_MASK;
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*ver_major = (frame >> STS_FM_VERSION_MAJOR_SHIFT) &
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STS_FM_VERSION_MAJOR_MASK;
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*ver_minor = (frame >> STS_FM_VERSION_MINOR_SHIFT) &
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STS_FM_VERSION_MINOR_MASK;
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read_8051_config(dd, VERSION_PATCH, GENERAL_CONFIG, &frame);
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*ver_patch = (frame >> STS_FM_VERSION_PATCH_SHIFT) &
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STS_FM_VERSION_PATCH_MASK;
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}
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static void read_vc_remote_phy(struct hfi1_devdata *dd, u8 *power_management,
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@ -9130,7 +9137,7 @@ static int set_local_link_attributes(struct hfi1_pportdata *ppd)
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if (ret)
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goto set_local_link_attributes_fail;
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if (dd->dc8051_ver < dc8051_ver(0, 20)) {
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if (dd->dc8051_ver < dc8051_ver(0, 20, 0)) {
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/* set the tx rate to the fastest enabled */
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if (ppd->link_speed_enabled & OPA_LINK_SPEED_25G)
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ppd->local_tx_rate = 1;
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@ -1,7 +1,7 @@
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#ifndef _CHIP_H
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#define _CHIP_H
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/*
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* Copyright(c) 2015, 2016 Intel Corporation.
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* Copyright(c) 2015 - 2017 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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@ -394,7 +394,8 @@
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#define LAST_REMOTE_STATE_COMPLETE 0x13
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#define LINK_QUALITY_INFO 0x14
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#define REMOTE_DEVICE_ID 0x15
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#define LINK_DOWN_REASON 0x16
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#define LINK_DOWN_REASON 0x16 /* first byte of offset 0x16 */
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#define VERSION_PATCH 0x16 /* last byte of offset 0x16 */
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/* 8051 lane specific register field IDs */
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#define TX_EQ_SETTINGS 0x00
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@ -524,10 +525,12 @@ enum {
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#define SUPPORTED_CRCS (CAP_CRC_14B | CAP_CRC_48B)
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/* misc status version fields */
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#define STS_FM_VERSION_A_SHIFT 16
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#define STS_FM_VERSION_A_MASK 0xff
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#define STS_FM_VERSION_B_SHIFT 24
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#define STS_FM_VERSION_B_MASK 0xff
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#define STS_FM_VERSION_MINOR_SHIFT 16
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#define STS_FM_VERSION_MINOR_MASK 0xff
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#define STS_FM_VERSION_MAJOR_SHIFT 24
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#define STS_FM_VERSION_MAJOR_MASK 0xff
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#define STS_FM_VERSION_PATCH_SHIFT 24
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#define STS_FM_VERSION_PATCH_MASK 0xff
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/* LCB_CFG_CRC_MODE TX_VAL and RX_VAL CRC mode values */
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#define LCB_CRC_16B 0x0 /* 16b CRC */
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@ -698,7 +701,8 @@ void fabric_serdes_reset(struct hfi1_devdata *dd);
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int read_8051_data(struct hfi1_devdata *dd, u32 addr, u32 len, u64 *result);
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/* chip.c */
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void read_misc_status(struct hfi1_devdata *dd, u8 *ver_a, u8 *ver_b);
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void read_misc_status(struct hfi1_devdata *dd, u8 *ver_major, u8 *ver_minor,
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u8 *ver_patch);
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void read_guid(struct hfi1_devdata *dd);
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int wait_fm_ready(struct hfi1_devdata *dd, u32 mstimeout);
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void set_link_down_reason(struct hfi1_pportdata *ppd, u8 lcl_reason,
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2015, 2016 Intel Corporation.
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* Copyright(c) 2015 - 2017 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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@ -1004,7 +1004,9 @@ static int load_8051_firmware(struct hfi1_devdata *dd,
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{
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u64 reg;
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int ret;
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u8 ver_a, ver_b;
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u8 ver_major;
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u8 ver_minor;
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u8 ver_patch;
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/*
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* DC Reset sequence
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@ -1073,10 +1075,10 @@ static int load_8051_firmware(struct hfi1_devdata *dd,
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return -ETIMEDOUT;
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}
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read_misc_status(dd, &ver_a, &ver_b);
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dd_dev_info(dd, "8051 firmware version %d.%d\n",
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(int)ver_b, (int)ver_a);
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dd->dc8051_ver = dc8051_ver(ver_b, ver_a);
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read_misc_status(dd, &ver_major, &ver_minor, &ver_patch);
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dd_dev_info(dd, "8051 firmware version %d.%d.%d\n",
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(int)ver_major, (int)ver_minor, (int)ver_patch);
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dd->dc8051_ver = dc8051_ver(ver_major, ver_minor, ver_patch);
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return 0;
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}
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@ -1020,7 +1020,7 @@ struct hfi1_devdata {
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u8 qos_shift;
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u16 irev; /* implementation revision */
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u16 dc8051_ver; /* 8051 firmware version */
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u32 dc8051_ver; /* 8051 firmware version */
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spinlock_t hfi1_diag_trans_lock; /* protect diag observer ops */
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struct platform_config platform_config;
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@ -1173,9 +1173,10 @@ struct hfi1_devdata {
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};
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/* 8051 firmware version helper */
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#define dc8051_ver(a, b) ((a) << 8 | (b))
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#define dc8051_ver_maj(a) ((a & 0xff00) >> 8)
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#define dc8051_ver_min(a) (a & 0x00ff)
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#define dc8051_ver(a, b, c) ((a) << 16 | (b) << 8 | (c))
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#define dc8051_ver_maj(a) (((a) & 0xff0000) >> 16)
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#define dc8051_ver_min(a) (((a) & 0x00ff00) >> 8)
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#define dc8051_ver_patch(a) ((a) & 0x0000ff)
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/* f_put_tid types */
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#define PT_EXPECTED 0
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@ -1236,12 +1236,14 @@ int hfi1_verbs_send(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
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static void hfi1_fill_device_attr(struct hfi1_devdata *dd)
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{
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struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
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u16 ver = dd->dc8051_ver;
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u32 ver = dd->dc8051_ver;
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memset(&rdi->dparms.props, 0, sizeof(rdi->dparms.props));
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rdi->dparms.props.fw_ver = ((u64)(dc8051_ver_maj(ver)) << 16) |
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(u64)dc8051_ver_min(ver);
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rdi->dparms.props.fw_ver = ((u64)(dc8051_ver_maj(ver)) << 32) |
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((u64)(dc8051_ver_min(ver)) << 16) |
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(u64)dc8051_ver_patch(ver);
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rdi->dparms.props.device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
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IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
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IB_DEVICE_SYS_IMAGE_GUID | IB_DEVICE_RC_RNR_NAK_GEN |
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{
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struct rvt_dev_info *rdi = ib_to_rvt(ibdev);
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struct hfi1_ibdev *dev = dev_from_rdi(rdi);
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u16 ver = dd_from_dev(dev)->dc8051_ver;
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u32 ver = dd_from_dev(dev)->dc8051_ver;
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snprintf(str, str_len, "%u.%u", dc8051_ver_maj(ver),
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dc8051_ver_min(ver));
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snprintf(str, str_len, "%u.%u.%u", dc8051_ver_maj(ver),
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dc8051_ver_min(ver), dc8051_ver_patch(ver));
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}
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static const char * const driver_cntr_names[] = {
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