Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: Blackfin: fix SMP build error in start_thread() Blackfin: fix memset in smp_send_reschedule() and -stop() Blackfin: fix typo in ptrace poking Blackfin: check for anomaly 05000475 Blackfin: work around testset anomaly 05000477 Blackfin: update anomaly lists Blackfin: fix cache Kconfig typo Blackfin: fix suspend/resume failure with some on-chip ROMs
This commit is contained in:
commit
5ebacb2712
|
@ -225,8 +225,13 @@ int blackfin_dma_suspend(void)
|
|||
void blackfin_dma_resume(void)
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||||
{
|
||||
int i;
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||||
for (i = 0; i < MAX_DMA_SUSPEND_CHANNELS; ++i)
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||||
dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map;
|
||||
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||||
for (i = 0; i < MAX_DMA_CHANNELS; ++i) {
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dma_ch[i].regs->cfg = 0;
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||||
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||||
if (i < MAX_DMA_SUSPEND_CHANNELS)
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dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map;
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}
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}
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#endif
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||||
|
||||
|
|
|
@ -38,7 +38,7 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
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|
||||
#ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE
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d_cache = CPLB_L1_CHBL;
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||||
#ifdef CONFIG_BFIN_EXTMEM_WRITETROUGH
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#ifdef CONFIG_BFIN_EXTMEM_WRITETHROUGH
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d_cache |= CPLB_L1_AOW | CPLB_WT;
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#endif
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#endif
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|
|
|
@ -151,7 +151,7 @@ void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_
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regs->pc = new_ip;
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if (current->mm)
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regs->p5 = current->mm->start_data;
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#ifdef CONFIG_SMP
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#ifndef CONFIG_SMP
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task_thread_info(current)->l1_task_info.stack_start =
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(void *)current->mm->context.stack_start;
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task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
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|
|
|
@ -315,7 +315,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
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case BFIN_MEM_ACCESS_CORE:
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case BFIN_MEM_ACCESS_CORE_ONLY:
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copied = access_process_vm(child, addr, &data,
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to_copy, 0);
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to_copy, 1);
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if (copied)
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break;
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|
|
|
@ -1,9 +1,13 @@
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|||
/*
|
||||
* File: include/asm-blackfin/mach-bf518/anomaly.h
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
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* DO NOT EDIT THIS FILE
|
||||
* This file is under version control at
|
||||
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
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||||
* and can be replaced with that version at any time
|
||||
* DO NOT EDIT THIS FILE
|
||||
*
|
||||
* Copyright (C) 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or later.
|
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* Copyright 2004-2009 Analog Devices Inc.
|
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* Licensed under the ADI BSD license.
|
||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
||||
*/
|
||||
|
||||
/* This file should be up to date with:
|
||||
|
@ -70,6 +74,10 @@
|
|||
#define ANOMALY_05000461 (1)
|
||||
/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
|
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#define ANOMALY_05000462 (1)
|
||||
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
||||
#define ANOMALY_05000473 (1)
|
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/* TESTSET Instruction Cannot Be Interrupted */
|
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#define ANOMALY_05000477 (1)
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|
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/* Anomalies that don't exist on this proc */
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#define ANOMALY_05000099 (0)
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|
@ -133,5 +141,7 @@
|
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#define ANOMALY_05000450 (0)
|
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#define ANOMALY_05000465 (0)
|
||||
#define ANOMALY_05000467 (0)
|
||||
#define ANOMALY_05000474 (0)
|
||||
#define ANOMALY_05000475 (0)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -1,14 +1,18 @@
|
|||
/*
|
||||
* File: include/asm-blackfin/mach-bf527/anomaly.h
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
* DO NOT EDIT THIS FILE
|
||||
* This file is under version control at
|
||||
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
|
||||
* and can be replaced with that version at any time
|
||||
* DO NOT EDIT THIS FILE
|
||||
*
|
||||
* Copyright (C) 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or later.
|
||||
* Copyright 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the ADI BSD license.
|
||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
||||
*/
|
||||
|
||||
/* This file should be up to date with:
|
||||
* - Revision D, 08/14/2009; ADSP-BF526 Blackfin Processor Anomaly List
|
||||
* - Revision F, 03/03/2009; ADSP-BF527 Blackfin Processor Anomaly List
|
||||
* - Revision G, 08/25/2009; ADSP-BF527 Blackfin Processor Anomaly List
|
||||
*/
|
||||
|
||||
#ifndef _MACH_ANOMALY_H_
|
||||
|
@ -200,6 +204,10 @@
|
|||
#define ANOMALY_05000467 (1)
|
||||
/* PLL Latches Incorrect Settings During Reset */
|
||||
#define ANOMALY_05000469 (1)
|
||||
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
||||
#define ANOMALY_05000473 (1)
|
||||
/* TESTSET Instruction Cannot Be Interrupted */
|
||||
#define ANOMALY_05000477 (1)
|
||||
|
||||
/* Anomalies that don't exist on this proc */
|
||||
#define ANOMALY_05000099 (0)
|
||||
|
@ -250,5 +258,7 @@
|
|||
#define ANOMALY_05000412 (0)
|
||||
#define ANOMALY_05000447 (0)
|
||||
#define ANOMALY_05000448 (0)
|
||||
#define ANOMALY_05000474 (0)
|
||||
#define ANOMALY_05000475 (0)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -1,9 +1,13 @@
|
|||
/*
|
||||
* File: include/asm-blackfin/mach-bf533/anomaly.h
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
* DO NOT EDIT THIS FILE
|
||||
* This file is under version control at
|
||||
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
|
||||
* and can be replaced with that version at any time
|
||||
* DO NOT EDIT THIS FILE
|
||||
*
|
||||
* Copyright (C) 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or later.
|
||||
* Copyright 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the ADI BSD license.
|
||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
||||
*/
|
||||
|
||||
/* This file should be up to date with:
|
||||
|
@ -202,6 +206,10 @@
|
|||
#define ANOMALY_05000443 (1)
|
||||
/* False Hardware Error when RETI Points to Invalid Memory */
|
||||
#define ANOMALY_05000461 (1)
|
||||
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
||||
#define ANOMALY_05000473 (1)
|
||||
/* TESTSET Instruction Cannot Be Interrupted */
|
||||
#define ANOMALY_05000477 (1)
|
||||
|
||||
/* These anomalies have been "phased" out of analog.com anomaly sheets and are
|
||||
* here to show running on older silicon just isn't feasible.
|
||||
|
@ -349,5 +357,7 @@
|
|||
#define ANOMALY_05000450 (0)
|
||||
#define ANOMALY_05000465 (0)
|
||||
#define ANOMALY_05000467 (0)
|
||||
#define ANOMALY_05000474 (0)
|
||||
#define ANOMALY_05000475 (0)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -1,9 +1,13 @@
|
|||
/*
|
||||
* File: include/asm-blackfin/mach-bf537/anomaly.h
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
* DO NOT EDIT THIS FILE
|
||||
* This file is under version control at
|
||||
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
|
||||
* and can be replaced with that version at any time
|
||||
* DO NOT EDIT THIS FILE
|
||||
*
|
||||
* Copyright (C) 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or later.
|
||||
* Copyright 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the ADI BSD license.
|
||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
||||
*/
|
||||
|
||||
/* This file should be up to date with:
|
||||
|
@ -156,6 +160,10 @@
|
|||
#define ANOMALY_05000443 (1)
|
||||
/* False Hardware Error when RETI Points to Invalid Memory */
|
||||
#define ANOMALY_05000461 (1)
|
||||
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
||||
#define ANOMALY_05000473 (1)
|
||||
/* TESTSET Instruction Cannot Be Interrupted */
|
||||
#define ANOMALY_05000477 (1)
|
||||
|
||||
/* Anomalies that don't exist on this proc */
|
||||
#define ANOMALY_05000099 (0)
|
||||
|
@ -202,5 +210,7 @@
|
|||
#define ANOMALY_05000450 (0)
|
||||
#define ANOMALY_05000465 (0)
|
||||
#define ANOMALY_05000467 (0)
|
||||
#define ANOMALY_05000474 (0)
|
||||
#define ANOMALY_05000475 (0)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -1,9 +1,13 @@
|
|||
/*
|
||||
* File: include/asm-blackfin/mach-bf538/anomaly.h
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
* DO NOT EDIT THIS FILE
|
||||
* This file is under version control at
|
||||
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
|
||||
* and can be replaced with that version at any time
|
||||
* DO NOT EDIT THIS FILE
|
||||
*
|
||||
* Copyright (C) 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or later.
|
||||
* Copyright 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the ADI BSD license.
|
||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
||||
*/
|
||||
|
||||
/* This file should be up to date with:
|
||||
|
@ -128,6 +132,10 @@
|
|||
#define ANOMALY_05000443 (1)
|
||||
/* False Hardware Error when RETI Points to Invalid Memory */
|
||||
#define ANOMALY_05000461 (1)
|
||||
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
||||
#define ANOMALY_05000473 (1)
|
||||
/* TESTSET Instruction Cannot Be Interrupted */
|
||||
#define ANOMALY_05000477 (1)
|
||||
|
||||
/* Anomalies that don't exist on this proc */
|
||||
#define ANOMALY_05000099 (0)
|
||||
|
@ -176,5 +184,7 @@
|
|||
#define ANOMALY_05000450 (0)
|
||||
#define ANOMALY_05000465 (0)
|
||||
#define ANOMALY_05000467 (0)
|
||||
#define ANOMALY_05000474 (0)
|
||||
#define ANOMALY_05000475 (0)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -1,9 +1,13 @@
|
|||
/*
|
||||
* File: include/asm-blackfin/mach-bf548/anomaly.h
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
* DO NOT EDIT THIS FILE
|
||||
* This file is under version control at
|
||||
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
|
||||
* and can be replaced with that version at any time
|
||||
* DO NOT EDIT THIS FILE
|
||||
*
|
||||
* Copyright (C) 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or later.
|
||||
* Copyright 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the ADI BSD license.
|
||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
||||
*/
|
||||
|
||||
/* This file should be up to date with:
|
||||
|
@ -24,6 +28,8 @@
|
|||
#define ANOMALY_05000119 (1)
|
||||
/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
|
||||
#define ANOMALY_05000122 (1)
|
||||
/* Data Corruption with Cached External Memory and Non-Cached On-Chip L2 Memory */
|
||||
#define ANOMALY_05000220 (1)
|
||||
/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
|
||||
#define ANOMALY_05000245 (1)
|
||||
/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
|
||||
|
@ -200,6 +206,14 @@
|
|||
#define ANOMALY_05000466 (1)
|
||||
/* Possible RX data corruption when control & data EP FIFOs are accessed via the core */
|
||||
#define ANOMALY_05000467 (1)
|
||||
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
||||
#define ANOMALY_05000473 (1)
|
||||
/* Access to DDR-SDRAM causes system hang under certain PLL/VR settings */
|
||||
#define ANOMALY_05000474 (1)
|
||||
/* Core Hang With L2/L3 Configured in Writeback Cache Mode */
|
||||
#define ANOMALY_05000475 (1)
|
||||
/* TESTSET Instruction Cannot Be Interrupted */
|
||||
#define ANOMALY_05000477 (1)
|
||||
|
||||
/* Anomalies that don't exist on this proc */
|
||||
#define ANOMALY_05000099 (0)
|
||||
|
@ -215,7 +229,6 @@
|
|||
#define ANOMALY_05000198 (0)
|
||||
#define ANOMALY_05000202 (0)
|
||||
#define ANOMALY_05000215 (0)
|
||||
#define ANOMALY_05000220 (0)
|
||||
#define ANOMALY_05000227 (0)
|
||||
#define ANOMALY_05000230 (0)
|
||||
#define ANOMALY_05000231 (0)
|
||||
|
|
|
@ -19,6 +19,16 @@
|
|||
\reg\().h = _corelock;
|
||||
.endm
|
||||
|
||||
.macro safe_testset addr:req, scratch:req
|
||||
#if ANOMALY_05000477
|
||||
cli \scratch;
|
||||
testset (\addr);
|
||||
sti \scratch;
|
||||
#else
|
||||
testset (\addr);
|
||||
#endif
|
||||
.endm
|
||||
|
||||
/*
|
||||
* r0 = address of atomic data to flush and invalidate (32bit).
|
||||
*
|
||||
|
@ -33,7 +43,7 @@ ENTRY(_get_core_lock)
|
|||
cli r0;
|
||||
coreslot_loadaddr p0;
|
||||
.Lretry_corelock:
|
||||
testset (p0);
|
||||
safe_testset p0, r2;
|
||||
if cc jump .Ldone_corelock;
|
||||
SSYNC(r2);
|
||||
jump .Lretry_corelock
|
||||
|
@ -56,7 +66,7 @@ ENTRY(_get_core_lock_noflush)
|
|||
cli r0;
|
||||
coreslot_loadaddr p0;
|
||||
.Lretry_corelock_noflush:
|
||||
testset (p0);
|
||||
safe_testset p0, r2;
|
||||
if cc jump .Ldone_corelock_noflush;
|
||||
SSYNC(r2);
|
||||
jump .Lretry_corelock_noflush
|
||||
|
|
|
@ -1,9 +1,13 @@
|
|||
/*
|
||||
* File: include/asm-blackfin/mach-bf561/anomaly.h
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
* DO NOT EDIT THIS FILE
|
||||
* This file is under version control at
|
||||
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
|
||||
* and can be replaced with that version at any time
|
||||
* DO NOT EDIT THIS FILE
|
||||
*
|
||||
* Copyright (C) 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or later.
|
||||
* Copyright 2004-2009 Analog Devices Inc.
|
||||
* Licensed under the ADI BSD license.
|
||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
||||
*/
|
||||
|
||||
/* This file should be up to date with:
|
||||
|
@ -213,7 +217,11 @@
|
|||
/* Disabling Peripherals with DMA Running May Cause DMA System Instability */
|
||||
#define ANOMALY_05000278 (__SILICON_REVISION__ < 5)
|
||||
/* False Hardware Error Exception when ISR Context Is Not Restored */
|
||||
#define ANOMALY_05000281 (__SILICON_REVISION__ < 5)
|
||||
/* Temporarily walk around for bug 5423 till this issue is confirmed by
|
||||
* official anomaly document. It looks 05000281 still exists on bf561
|
||||
* v0.5.
|
||||
*/
|
||||
#define ANOMALY_05000281 (__SILICON_REVISION__ <= 5)
|
||||
/* System MMR Write Is Stalled Indefinitely when Killed in a Particular Stage */
|
||||
#define ANOMALY_05000283 (1)
|
||||
/* Reads Will Receive Incorrect Data under Certain Conditions */
|
||||
|
@ -280,6 +288,12 @@
|
|||
#define ANOMALY_05000443 (1)
|
||||
/* False Hardware Error when RETI Points to Invalid Memory */
|
||||
#define ANOMALY_05000461 (1)
|
||||
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
||||
#define ANOMALY_05000473 (1)
|
||||
/* Core Hang With L2/L3 Configured in Writeback Cache Mode */
|
||||
#define ANOMALY_05000475 (__SILICON_REVISION__ < 4)
|
||||
/* TESTSET Instruction Cannot Be Interrupted */
|
||||
#define ANOMALY_05000477 (1)
|
||||
|
||||
/* Anomalies that don't exist on this proc */
|
||||
#define ANOMALY_05000119 (0)
|
||||
|
@ -304,5 +318,6 @@
|
|||
#define ANOMALY_05000450 (0)
|
||||
#define ANOMALY_05000465 (0)
|
||||
#define ANOMALY_05000467 (0)
|
||||
#define ANOMALY_05000474 (0)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -57,3 +57,8 @@
|
|||
(!defined(CONFIG_BFIN_EXTMEM_DCACHEABLE) && defined(CONFIG_BFIN_L2_WRITEBACK)))
|
||||
# error You are exposing Anomaly 220 in this config, either config L2 as Write Through, or make External Memory WB.
|
||||
#endif
|
||||
|
||||
#if ANOMALY_05000475 && \
|
||||
(defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK))
|
||||
# error "Anomaly 475 does not allow you to use Write Back cache with L2 or External Memory"
|
||||
#endif
|
||||
|
|
|
@ -276,10 +276,9 @@ void smp_send_reschedule(int cpu)
|
|||
if (cpu_is_offline(cpu))
|
||||
return;
|
||||
|
||||
msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
|
||||
msg = kzalloc(sizeof(*msg), GFP_ATOMIC);
|
||||
if (!msg)
|
||||
return;
|
||||
memset(msg, 0, sizeof(msg));
|
||||
INIT_LIST_HEAD(&msg->list);
|
||||
msg->type = BFIN_IPI_RESCHEDULE;
|
||||
|
||||
|
@ -305,10 +304,9 @@ void smp_send_stop(void)
|
|||
if (cpus_empty(callmap))
|
||||
return;
|
||||
|
||||
msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
|
||||
msg = kzalloc(sizeof(*msg), GFP_ATOMIC);
|
||||
if (!msg)
|
||||
return;
|
||||
memset(msg, 0, sizeof(msg));
|
||||
INIT_LIST_HEAD(&msg->list);
|
||||
msg->type = BFIN_IPI_CPU_STOP;
|
||||
|
||||
|
|
Loading…
Reference in a new issue