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MLK-24836 ARM: imx: Refresh wdog should consider the CMD mode on i.MX7ULP 

When refresh i.MX7ULP wdog during resume, need to check if wdog is power
gate or NOT, as the command mode is different, if using incorrect refresh
command, it will trigger system reset immediately, so add CMD32 bit check
to make it work for both standby and mem mode suspend.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 1645d2add2862bf09de5e18568f3351bc230ed21)
5.4-rM2-2.2.x-imx-squashed
Anson Huang 2020-09-24 10:29:58 +08:00
parent bba6ff64f0
commit 5ec03d06f5
1 changed files with 13 additions and 2 deletions
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15
arch/arm/mach-imx/pm-imx7ulp.c
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@ -117,6 +117,13 @@
#define ADDR_1M_MASK 0xFFF00000
#define WDOG_CS 0x0
#define WDOG_CS_CMD32EN BIT(13)
#define WDOG_CNT 0x4
#define REFRESH_SEQ0 0xA602
#define REFRESH_SEQ1 0xB480
#define REFRESH ((REFRESH_SEQ1 << 16) | REFRESH_SEQ0)
static void __iomem *smc1_base;
static void __iomem *pmc0_base;
static void __iomem *pmc1_base;
@ -469,8 +476,12 @@ static void imx7ulp_wdog_refresh(void)
* On revision 2.2, wdog2 is by default disabled when out of
* reset, so here, we ONLY refresh wdog1.
*/
writel_relaxed(0xA602, wdog1_base + 0x4);
writel_relaxed(0xB480, wdog1_base + 0x4);
if (readl_relaxed(wdog1_base + WDOG_CS) & WDOG_CS_CMD32EN) {
writel(REFRESH, wdog1_base + WDOG_CNT);
} else {
writel_relaxed(REFRESH_SEQ0, wdog1_base + WDOG_CNT);
writel_relaxed(REFRESH_SEQ1, wdog1_base + WDOG_CNT);
}
}
static int imx7ulp_pm_enter(suspend_state_t state)