wireless-drivers-next patches for v5.7
Second set of patches for v5.7. Lots of cleanup patches this time, but of course various new features as well fixes. When merging with wireless-drivers this pull request has a conflict in: drivers/net/wireless/intel/iwlwifi/pcie/drv.c To solve that just drop the changes from commitcf52c8a776
in wireless-drivers and take the hunk from wireless-drivers-next as is. The list of specific subsystem device IDs are not necessary after commitd6f2134a38
(in wireless-drivers-next) anymore, the detection is based on other characteristics of the devices. Major changes: qtnfmac * support WPA3 SAE and OWE in AP mode ath10k * support for getting btcoex settings from Device Tree * support QCA9377 SDIO device ath11k * add HE rate accounting * add thermal sensor and cooling devices mt76 * MT7663 support for the MT7615 driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJeechaAAoJEG4XJFUm622b/IcH/jzdxSwI/dRp2ZrEG+UFDNyZ ChTdgW1k+WWLrTKaw5S+mmtM9sLQ7Ia5dL+ZyE7tFIEGzuCSdAbbOIkygw+rhLy9 BO0rsTbXRuErRpUJgwKc56sFrvBL2pm4Rx+4IV29jhXdyJ70MUvRAINcHLESeBcO uI5dqapScRf/EnVYP2Zso6i2FLep5hoC0reBq2UQ5Y95Lv0cpMCbHQ1xqdcm9pI3 ZvLDpVyGpp75Eoxlt1Ubiv6ijsEnTaM3cI+Q5rRWt8g3JKP7yYT7HGbJ3fb0cWhq bNNISs+XN67lnyU1Mx3c2pjyb+szJZ0o4OGbYNAqsquItl4B0RQc3fUBMlCUlYI= =+2Hj -----END PGP SIGNATURE----- Merge tag 'wireless-drivers-next-2020-03-24' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers-next patches for v5.7 Second set of patches for v5.7. Lots of cleanup patches this time, but of course various new features as well fixes. When merging with wireless-drivers this pull request has a conflict in: drivers/net/wireless/intel/iwlwifi/pcie/drv.c To solve that just drop the changes from commitcf52c8a776
in wireless-drivers and take the hunk from wireless-drivers-next as is. The list of specific subsystem device IDs are not necessary after commitd6f2134a38
(in wireless-drivers-next) anymore, the detection is based on other characteristics of the devices. Major changes: qtnfmac * support WPA3 SAE and OWE in AP mode ath10k * support for getting btcoex settings from Device Tree * support QCA9377 SDIO device ath11k * add HE rate accounting * add thermal sensor and cooling devices mt76 * MT7663 support for the MT7615 driver ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
5ef8c66541
|
@ -91,6 +91,11 @@ Optional properties:
|
|||
- qcom,msa-fixed-perm: Boolean context flag to disable SCM call for statically
|
||||
mapped msa region.
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- qcom,coexist-support : should contain eithr "0" or "1" to indicate coex
|
||||
support by the hardware.
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- qcom,coexist-gpio-pin : gpio pin number information to support coex
|
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which will be used by wifi firmware.
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|
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Example (to supply PCI based wifi block details):
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|
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In this example, the node is defined as child node of the PCI controller.
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|
@ -159,6 +164,8 @@ wifi0: wifi@a000000 {
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qcom,msi_addr = <0x0b006040>;
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qcom,msi_base = <0x40>;
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qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
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qcom,coexist-support = <1>;
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qcom,coexist-gpio-pin = <0x33>;
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};
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Example (to supply wcn3990 SoC wifi block details):
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|
|
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@ -531,7 +531,7 @@ struct adm8211_eeprom {
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u8 lpf_cutoff[14]; /* 0x62 */
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u8 lnags_threshold[14]; /* 0x70 */
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__le16 checksum; /* 0x7E */
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u8 cis_data[0]; /* 0x80, 384 bytes */
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u8 cis_data[]; /* 0x80, 384 bytes */
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} __packed;
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struct adm8211_priv {
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|
|
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@ -459,7 +459,7 @@ static int ath10k_ahb_resource_init(struct ath10k *ar)
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ar_ahb->mem_len = resource_size(res);
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ar_ahb->gcc_mem = ioremap(ATH10K_GCC_REG_BASE,
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ATH10K_GCC_REG_SIZE);
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ATH10K_GCC_REG_SIZE);
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if (!ar_ahb->gcc_mem) {
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ath10k_err(ar, "gcc mem ioremap error\n");
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ret = -ENOMEM;
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@ -467,7 +467,7 @@ static int ath10k_ahb_resource_init(struct ath10k *ar)
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}
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ar_ahb->tcsr_mem = ioremap(ATH10K_TCSR_REG_BASE,
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ATH10K_TCSR_REG_SIZE);
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ATH10K_TCSR_REG_SIZE);
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if (!ar_ahb->tcsr_mem) {
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ath10k_err(ar, "tcsr mem ioremap error\n");
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ret = -ENOMEM;
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|
|
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@ -540,6 +540,33 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.fw_diag_ce_download = true,
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.tx_stats_over_pktlog = false,
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},
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{
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.id = QCA9377_HW_1_1_DEV_VERSION,
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.dev_id = QCA9377_1_0_DEVICE_ID,
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.bus = ATH10K_BUS_SDIO,
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.name = "qca9377 hw1.1 sdio",
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.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
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.uart_pin = 19,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.cal_data_len = 8124,
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.fw = {
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.dir = QCA9377_HW_1_0_FW_DIR,
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.board = QCA9377_HW_1_0_BOARD_DATA_FILE,
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.board_size = QCA9377_BOARD_DATA_SZ,
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.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca6174_ops,
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.hw_clk = qca6174_clk,
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.target_cpu_freq = 176000000,
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.decap_align_bytes = 4,
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.n_cipher_suites = 8,
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.num_peers = TARGET_QCA9377_HL_NUM_PEERS,
|
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
|
||||
.uart_pin_workaround = true,
|
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},
|
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{
|
||||
.id = QCA4019_HW_1_0_DEV_VERSION,
|
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.dev_id = 0,
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||||
|
@ -874,6 +901,13 @@ static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
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return -ENODATA;
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}
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if (ar->id.bmi_ids_valid) {
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ath10k_dbg(ar, ATH10K_DBG_BOOT,
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"boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
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ar->id.bmi_board_id, ar->id.bmi_chip_id);
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goto skip_otp_download;
|
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}
|
||||
|
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ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
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"boot upload otp to 0x%x len %zd for board id\n",
|
||||
address, ar->normal_mode_fw.fw_file.otp_len);
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|
@ -921,6 +955,8 @@ static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
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ar->id.bmi_board_id = board_id;
|
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ar->id.bmi_chip_id = chip_id;
|
||||
|
||||
skip_otp_download:
|
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|
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return 0;
|
||||
}
|
||||
|
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|
@ -2119,6 +2155,40 @@ done:
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return 0;
|
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}
|
||||
|
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static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
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{
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struct device_node *node;
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u8 coex_support = 0;
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int ret;
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node = ar->dev->of_node;
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if (!node)
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goto out;
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ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
|
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if (ret) {
|
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ar->coex_support = true;
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goto out;
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}
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|
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if (coex_support) {
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ar->coex_support = true;
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} else {
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ar->coex_support = false;
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ar->coex_gpio_pin = -1;
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goto out;
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}
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ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
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&ar->coex_gpio_pin);
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if (ret)
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ar->coex_gpio_pin = -1;
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out:
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ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
|
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ar->coex_support, ar->coex_gpio_pin);
|
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}
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|
||||
static int ath10k_init_uart(struct ath10k *ar)
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{
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int ret;
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||||
|
@ -2696,14 +2766,22 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
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if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
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val |= WMI_10_4_BSS_CHANNEL_INFO_64;
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|
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ath10k_core_fetch_btcoex_dt(ar);
|
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|
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/* 10.4 firmware supports BT-Coex without reloading firmware
|
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* via pdev param. To support Bluetooth coexistence pdev param,
|
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* WMI_COEX_GPIO_SUPPORT of extended resource config should be
|
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* enabled always.
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*
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* We can still enable BTCOEX if firmware has the support
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* eventhough btceox_support value is
|
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* ATH10K_DT_BTCOEX_NOT_FOUND
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*/
|
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|
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if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
|
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test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
|
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ar->running_fw->fw_file.fw_features))
|
||||
ar->running_fw->fw_file.fw_features) &&
|
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ar->coex_support)
|
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val |= WMI_10_4_COEX_GPIO_SUPPORT;
|
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|
||||
if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
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@ -2863,6 +2941,8 @@ void ath10k_core_stop(struct ath10k *ar)
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ath10k_htt_tx_stop(&ar->htt);
|
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ath10k_htt_rx_free(&ar->htt);
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ath10k_wmi_detach(ar);
|
||||
|
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ar->id.bmi_ids_valid = false;
|
||||
}
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EXPORT_SYMBOL(ath10k_core_stop);
|
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|
||||
|
|
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@ -1222,6 +1222,9 @@ struct ath10k {
|
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struct ath10k_bus_params bus_param;
|
||||
struct completion peer_delete_done;
|
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|
||||
bool coex_support;
|
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int coex_gpio_pin;
|
||||
|
||||
/* must be last */
|
||||
u8 drv_priv[0] __aligned(sizeof(void *));
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};
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|
|
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@ -1978,6 +1978,9 @@ static ssize_t ath10k_write_btcoex(struct file *file,
|
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if (strtobool(buf, &val) != 0)
|
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return -EINVAL;
|
||||
|
||||
if (!ar->coex_support)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
|
||||
if (ar->state != ATH10K_STATE_ON &&
|
||||
|
@ -2370,9 +2373,6 @@ static ssize_t ath10k_write_warm_hw_reset(struct file *file,
|
|||
goto exit;
|
||||
}
|
||||
|
||||
if (!(test_bit(WMI_SERVICE_RESET_CHIP, ar->wmi.svc_map)))
|
||||
ath10k_warn(ar, "wmi service for reset chip is not available\n");
|
||||
|
||||
ret = ath10k_wmi_pdev_set_param(ar, ar->wmi.pdev_param->pdev_reset,
|
||||
WMI_RST_MODE_WARM_RESET);
|
||||
|
||||
|
@ -2647,8 +2647,10 @@ int ath10k_debug_register(struct ath10k *ar)
|
|||
ar->debug.debugfs_phy, ar,
|
||||
&fops_tpc_stats_final);
|
||||
|
||||
debugfs_create_file("warm_hw_reset", 0600, ar->debug.debugfs_phy, ar,
|
||||
&fops_warm_hw_reset);
|
||||
if (test_bit(WMI_SERVICE_RESET_CHIP, ar->wmi.svc_map))
|
||||
debugfs_create_file("warm_hw_reset", 0600,
|
||||
ar->debug.debugfs_phy, ar,
|
||||
&fops_warm_hw_reset);
|
||||
|
||||
debugfs_create_file("ps_state_enable", 0600, ar->debug.debugfs_phy, ar,
|
||||
&fops_ps_state_enable);
|
||||
|
|
|
@ -2744,7 +2744,8 @@ static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
|
|||
continue;
|
||||
}
|
||||
|
||||
tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0);
|
||||
tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0) &
|
||||
IEEE80211_QOS_CTL_TID_MASK;
|
||||
tx_duration = __le32_to_cpu(ppdu_dur->tx_duration);
|
||||
|
||||
ieee80211_sta_register_airtime(peer->sta, tid, tx_duration, 0);
|
||||
|
|
|
@ -1131,6 +1131,7 @@ static int ath10k_get_htt_tx_data_rssi_pad(struct htt_resp *resp)
|
|||
|
||||
const struct ath10k_hw_ops qca988x_ops = {
|
||||
.set_coverage_class = ath10k_hw_qca988x_set_coverage_class,
|
||||
.is_rssi_enable = ath10k_htt_tx_rssi_enable,
|
||||
};
|
||||
|
||||
static int ath10k_qca99x0_rx_desc_get_l3_pad_bytes(struct htt_rx_desc *rxd)
|
||||
|
|
|
@ -774,6 +774,9 @@ ath10k_is_rssi_enable(struct ath10k_hw_params *hw,
|
|||
#define TARGET_HL_TLV_AST_SKID_LIMIT 16
|
||||
#define TARGET_HL_TLV_NUM_WDS_ENTRIES 2
|
||||
|
||||
/* Target specific defines for QCA9377 high latency firmware */
|
||||
#define TARGET_QCA9377_HL_NUM_PEERS 15
|
||||
|
||||
/* Diagnostic Window */
|
||||
#define CE_DIAG_PIPE 7
|
||||
|
||||
|
|
|
@ -4982,7 +4982,8 @@ static int ath10k_start(struct ieee80211_hw *hw)
|
|||
param = ar->wmi.pdev_param->enable_btcoex;
|
||||
if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
|
||||
test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
|
||||
ar->running_fw->fw_file.fw_features)) {
|
||||
ar->running_fw->fw_file.fw_features) &&
|
||||
ar->coex_support) {
|
||||
ret = ath10k_wmi_pdev_set_param(ar, param, 0);
|
||||
if (ret) {
|
||||
ath10k_warn(ar,
|
||||
|
|
|
@ -694,7 +694,7 @@ static int ath10k_sdio_mbox_rx_fetch_bundle(struct ath10k *ar)
|
|||
htc_hdr = (struct ath10k_htc_hdr *)(ar_sdio->vsg_buffer + pkt_offset);
|
||||
pkt->act_len = le16_to_cpu(htc_hdr->len) + sizeof(*htc_hdr);
|
||||
|
||||
if (pkt->act_len > pkt->alloc_len ) {
|
||||
if (pkt->act_len > pkt->alloc_len) {
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
@ -953,8 +953,11 @@ static int ath10k_sdio_mbox_read_int_status(struct ath10k *ar,
|
|||
*/
|
||||
ret = ath10k_sdio_read(ar, MBOX_HOST_INT_STATUS_ADDRESS,
|
||||
irq_proc_reg, sizeof(*irq_proc_reg));
|
||||
if (ret)
|
||||
if (ret) {
|
||||
queue_work(ar->workqueue, &ar->restart_work);
|
||||
ath10k_warn(ar, "read int status fail, start recovery\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Update only those registers that are enabled */
|
||||
*host_int_status = irq_proc_reg->host_int_status &
|
||||
|
@ -1647,23 +1650,33 @@ static int ath10k_sdio_hif_diag_read(struct ath10k *ar, u32 address, void *buf,
|
|||
size_t buf_len)
|
||||
{
|
||||
int ret;
|
||||
void *mem;
|
||||
|
||||
mem = kzalloc(buf_len, GFP_KERNEL);
|
||||
if (!mem)
|
||||
return -ENOMEM;
|
||||
|
||||
/* set window register to start read cycle */
|
||||
ret = ath10k_sdio_write32(ar, MBOX_WINDOW_READ_ADDR_ADDRESS, address);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to set mbox window read address: %d", ret);
|
||||
return ret;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* read the data */
|
||||
ret = ath10k_sdio_read(ar, MBOX_WINDOW_DATA_ADDRESS, buf, buf_len);
|
||||
ret = ath10k_sdio_read(ar, MBOX_WINDOW_DATA_ADDRESS, mem, buf_len);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to read from mbox window data address: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
goto out;
|
||||
}
|
||||
|
||||
return 0;
|
||||
memcpy(buf, mem, buf_len);
|
||||
|
||||
out:
|
||||
kfree(mem);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath10k_sdio_hif_diag_read32(struct ath10k *ar, u32 address,
|
||||
|
|
|
@ -8787,7 +8787,7 @@ ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
|
|||
cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
|
||||
cmd->host_platform_config = __cpu_to_le32(type);
|
||||
cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
|
||||
cmd->wlan_gpio_priority = __cpu_to_le32(-1);
|
||||
cmd->wlan_gpio_priority = __cpu_to_le32(ar->coex_gpio_pin);
|
||||
cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
|
||||
cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
|
||||
cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
|
||||
|
|
|
@ -371,6 +371,11 @@ enum wmi_10_4_service {
|
|||
WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
|
||||
WMI_10_4_SERVICE_REPORT_AIRTIME,
|
||||
WMI_10_4_SERVICE_TX_PWR_PER_PEER,
|
||||
WMI_10_4_SERVICE_FETCH_PEER_TX_PN,
|
||||
WMI_10_4_SERVICE_MULTIPLE_VDEV_RESTART,
|
||||
WMI_10_4_SERVICE_ENHANCED_RADIO_COUNTERS,
|
||||
WMI_10_4_SERVICE_QINQ_SUPPORT,
|
||||
WMI_10_4_SERVICE_RESET_CHIP,
|
||||
};
|
||||
|
||||
static inline char *wmi_service_name(enum wmi_service service_id)
|
||||
|
@ -827,6 +832,8 @@ static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
|
|||
WMI_SERVICE_REPORT_AIRTIME, len);
|
||||
SVCMAP(WMI_10_4_SERVICE_TX_PWR_PER_PEER,
|
||||
WMI_SERVICE_TX_PWR_PER_PEER, len);
|
||||
SVCMAP(WMI_10_4_SERVICE_RESET_CHIP,
|
||||
WMI_SERVICE_RESET_CHIP, len);
|
||||
}
|
||||
|
||||
#undef SVCMAP
|
||||
|
|
|
@ -20,6 +20,7 @@ ath11k-y += core.o \
|
|||
ath11k-$(CONFIG_ATH11K_DEBUGFS) += debug_htt_stats.o debugfs_sta.o
|
||||
ath11k-$(CONFIG_NL80211_TESTMODE) += testmode.o
|
||||
ath11k-$(CONFIG_ATH11K_TRACING) += trace.o
|
||||
ath11k-$(CONFIG_THERMAL) += thermal.o
|
||||
|
||||
# for tracing framework to find trace.h
|
||||
CFLAGS_trace.o := -I$(src)
|
||||
|
|
|
@ -392,11 +392,19 @@ static int ath11k_core_pdev_create(struct ath11k_base *ab)
|
|||
goto err_mac_unregister;
|
||||
}
|
||||
|
||||
ret = ath11k_thermal_register(ab);
|
||||
if (ret) {
|
||||
ath11k_err(ab, "could not register thermal device: %d\n",
|
||||
ret);
|
||||
goto err_dp_pdev_free;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_dp_pdev_free:
|
||||
ath11k_dp_pdev_free(ab);
|
||||
err_mac_unregister:
|
||||
ath11k_mac_unregister(ab);
|
||||
|
||||
err_pdev_debug:
|
||||
ath11k_debug_pdev_destroy(ab);
|
||||
|
||||
|
@ -405,6 +413,7 @@ err_pdev_debug:
|
|||
|
||||
static void ath11k_core_pdev_destroy(struct ath11k_base *ab)
|
||||
{
|
||||
ath11k_thermal_unregister(ab);
|
||||
ath11k_mac_unregister(ab);
|
||||
ath11k_ahb_ext_irq_disable(ab);
|
||||
ath11k_dp_pdev_free(ab);
|
||||
|
@ -569,6 +578,7 @@ static int ath11k_core_reconfigure_on_crash(struct ath11k_base *ab)
|
|||
int ret;
|
||||
|
||||
mutex_lock(&ab->core_lock);
|
||||
ath11k_thermal_unregister(ab);
|
||||
ath11k_ahb_ext_irq_disable(ab);
|
||||
ath11k_dp_pdev_free(ab);
|
||||
ath11k_ahb_stop(ab);
|
||||
|
@ -607,6 +617,7 @@ void ath11k_core_halt(struct ath11k *ar)
|
|||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
ar->num_created_vdevs = 0;
|
||||
ar->allocated_vdev_map = 0;
|
||||
|
||||
ath11k_mac_scan_finish(ar);
|
||||
ath11k_mac_peer_cleanup_all(ar);
|
||||
|
@ -644,6 +655,7 @@ static void ath11k_core_restart(struct work_struct *work)
|
|||
complete(&ar->install_key_done);
|
||||
complete(&ar->vdev_setup_done);
|
||||
complete(&ar->bss_survey_done);
|
||||
complete(&ar->thermal.wmi_sync);
|
||||
|
||||
wake_up(&ar->dp.tx_empty_waitq);
|
||||
idr_for_each(&ar->txmgmt_idr,
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include "hw.h"
|
||||
#include "hal_rx.h"
|
||||
#include "reg.h"
|
||||
#include "thermal.h"
|
||||
|
||||
#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
|
||||
|
||||
|
@ -243,6 +244,8 @@ struct ath11k_rx_peer_stats {
|
|||
u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
|
||||
u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
|
||||
u64 rx_duration;
|
||||
u64 dcm_count;
|
||||
u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
|
||||
};
|
||||
|
||||
#define ATH11K_HE_MCS_NUM 12
|
||||
|
@ -331,7 +334,6 @@ struct ath11k_sta {
|
|||
u32 smps;
|
||||
|
||||
struct work_struct update_wk;
|
||||
struct ieee80211_tx_info tx_info;
|
||||
struct rate_info txrate;
|
||||
struct rate_info last_txrate;
|
||||
u64 rx_duration;
|
||||
|
@ -486,6 +488,7 @@ struct ath11k {
|
|||
int max_num_peers;
|
||||
u32 num_started_vdevs;
|
||||
u32 num_created_vdevs;
|
||||
unsigned long long allocated_vdev_map;
|
||||
|
||||
struct idr txmgmt_idr;
|
||||
/* protects txmgmt_idr data */
|
||||
|
@ -524,6 +527,7 @@ struct ath11k {
|
|||
struct ath11k_debug debug;
|
||||
#endif
|
||||
bool dfs_block_radar_events;
|
||||
struct ath11k_thermal thermal;
|
||||
};
|
||||
|
||||
struct ath11k_band_cap {
|
||||
|
|
|
@ -68,12 +68,19 @@ struct debug_htt_stats_req {
|
|||
u8 buf[0];
|
||||
};
|
||||
|
||||
struct ath_pktlog_hdr {
|
||||
u16 flags;
|
||||
u16 missed_cnt;
|
||||
u16 log_type;
|
||||
u16 size;
|
||||
u32 timestamp;
|
||||
u32 type_specific_data;
|
||||
u8 payload[0];
|
||||
};
|
||||
|
||||
#define ATH11K_HTT_STATS_BUF_SIZE (1024 * 512)
|
||||
|
||||
#define ATH11K_FW_STATS_BUF_SIZE (1024 * 1024)
|
||||
|
||||
#define ATH11K_HTT_PKTLOG_MAX_SIZE 2048
|
||||
|
||||
enum ath11k_pktlog_filter {
|
||||
ATH11K_PKTLOG_RX = 0x000000001,
|
||||
ATH11K_PKTLOG_TX = 0x000000002,
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
do { \
|
||||
int index = 0; u8 i; \
|
||||
for (i = 0; i < len; i++) { \
|
||||
index += snprintf(out + index, HTT_MAX_STRING_LEN - index, \
|
||||
index += scnprintf(out + index, HTT_MAX_STRING_LEN - index, \
|
||||
" %u:%u,", i, arr[i]); \
|
||||
if (index < 0 || index >= HTT_MAX_STRING_LEN) \
|
||||
break; \
|
||||
|
@ -46,7 +46,7 @@ static inline void htt_print_stats_string_tlv(const void *tag_buf,
|
|||
len += HTT_DBG_OUT(buf + len, buf_len - len, "HTT_STATS_STRING_TLV:");
|
||||
|
||||
for (i = 0; i < tag_len; i++) {
|
||||
index += snprintf(&data[index],
|
||||
index += scnprintf(&data[index],
|
||||
HTT_MAX_STRING_LEN - index,
|
||||
"%.*s", 4, (char *)&(htt_stats_buf->data[i]));
|
||||
if (index >= HTT_MAX_STRING_LEN)
|
||||
|
@ -3097,7 +3097,7 @@ static inline void htt_print_rx_pdev_rate_stats_tlv(const void *tag_buf,
|
|||
index = 0;
|
||||
|
||||
for (i = 0; i < HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS; i++)
|
||||
index += snprintf(&rx_pilot_evm_db[j][index],
|
||||
index += scnprintf(&rx_pilot_evm_db[j][index],
|
||||
HTT_MAX_STRING_LEN - index,
|
||||
" %u:%d,",
|
||||
i,
|
||||
|
@ -3109,7 +3109,7 @@ static inline void htt_print_rx_pdev_rate_stats_tlv(const void *tag_buf,
|
|||
index = 0;
|
||||
memset(str_buf, 0x0, HTT_MAX_STRING_LEN);
|
||||
for (i = 0; i < HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS; i++)
|
||||
index += snprintf(&str_buf[index],
|
||||
index += scnprintf(&str_buf[index],
|
||||
HTT_MAX_STRING_LEN - index,
|
||||
" %u:%d,", i, htt_stats_buf->rx_pilot_evm_db_mean[i]);
|
||||
len += HTT_DBG_OUT(buf + len, buf_len - len, "pilot_evm_dB_mean = %s ", str_buf);
|
||||
|
@ -3217,7 +3217,7 @@ static inline void htt_print_rx_pdev_rate_stats_tlv(const void *tag_buf,
|
|||
index = 0;
|
||||
memset(str_buf, 0x0, HTT_MAX_STRING_LEN);
|
||||
for (i = 0; i < HTT_RX_PDEV_MAX_OFDMA_NUM_USER; i++)
|
||||
index += snprintf(&str_buf[index],
|
||||
index += scnprintf(&str_buf[index],
|
||||
HTT_MAX_STRING_LEN - index,
|
||||
" %u:%d,",
|
||||
i, htt_stats_buf->rx_ul_fd_rssi[j][i]);
|
||||
|
@ -3232,7 +3232,7 @@ static inline void htt_print_rx_pdev_rate_stats_tlv(const void *tag_buf,
|
|||
index = 0;
|
||||
memset(str_buf, 0x0, HTT_MAX_STRING_LEN);
|
||||
for (i = 0; i < HTT_RX_PDEV_STATS_NUM_BW_COUNTERS; i++)
|
||||
index += snprintf(&str_buf[index],
|
||||
index += scnprintf(&str_buf[index],
|
||||
HTT_MAX_STRING_LEN - index,
|
||||
" %u:%d,",
|
||||
i,
|
||||
|
|
|
@ -24,7 +24,7 @@ ath11k_accumulate_per_peer_tx_stats(struct ath11k_sta *arsta,
|
|||
tx_stats = arsta->tx_stats;
|
||||
gi = FIELD_GET(RATE_INFO_FLAGS_SHORT_GI, arsta->txrate.flags);
|
||||
mcs = txrate->mcs;
|
||||
bw = txrate->bw;
|
||||
bw = ath11k_mac_mac80211_bw_to_ath11k_bw(txrate->bw);
|
||||
nss = txrate->nss - 1;
|
||||
|
||||
#define STATS_OP_FMT(name) tx_stats->stats[ATH11K_STATS_TYPE_##name]
|
||||
|
@ -136,7 +136,7 @@ void ath11k_update_per_peer_stats_from_txcompl(struct ath11k *ar,
|
|||
struct ath11k_sta *arsta;
|
||||
struct ieee80211_sta *sta;
|
||||
u16 rate;
|
||||
u8 rate_idx;
|
||||
u8 rate_idx = 0;
|
||||
int ret;
|
||||
u8 mcs;
|
||||
|
||||
|
@ -379,6 +379,13 @@ static ssize_t ath11k_dbg_sta_dump_rx_stats(struct file *file,
|
|||
len += scnprintf(buf + len, size - len, "%llu ", rx_stats->nss_count[i]);
|
||||
len += scnprintf(buf + len, size - len, "\nRX Duration:%llu ",
|
||||
rx_stats->rx_duration);
|
||||
len += scnprintf(buf + len, size - len,
|
||||
"\nDCM: %llu\nRU: 26 %llu 52: %llu 106: %llu 242: %llu 484: %llu 996: %llu\n",
|
||||
rx_stats->dcm_count, rx_stats->ru_alloc_cnt[0],
|
||||
rx_stats->ru_alloc_cnt[1], rx_stats->ru_alloc_cnt[2],
|
||||
rx_stats->ru_alloc_cnt[3], rx_stats->ru_alloc_cnt[4],
|
||||
rx_stats->ru_alloc_cnt[5]);
|
||||
|
||||
len += scnprintf(buf + len, size - len, "\n");
|
||||
|
||||
spin_unlock_bh(&ar->ab->base_lock);
|
||||
|
|
|
@ -39,8 +39,9 @@ void ath11k_dp_peer_cleanup(struct ath11k *ar, int vdev_id, const u8 *addr)
|
|||
int ath11k_dp_peer_setup(struct ath11k *ar, int vdev_id, const u8 *addr)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct ath11k_peer *peer;
|
||||
u32 reo_dest;
|
||||
int ret;
|
||||
int ret = 0, tid;
|
||||
|
||||
/* NOTE: reo_dest ring id starts from 1 unlike mac_id which starts from 0 */
|
||||
reo_dest = ar->dp.mac_id + 1;
|
||||
|
@ -54,24 +55,36 @@ int ath11k_dp_peer_setup(struct ath11k *ar, int vdev_id, const u8 *addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
ret = ath11k_peer_rx_tid_setup(ar, addr, vdev_id,
|
||||
HAL_DESC_REO_NON_QOS_TID, 1, 0);
|
||||
if (ret) {
|
||||
ath11k_warn(ab, "failed to setup rxd tid queue for non-qos tid %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath11k_peer_rx_tid_setup(ar, addr, vdev_id, 0, 1, 0);
|
||||
if (ret) {
|
||||
ath11k_warn(ab, "failed to setup rxd tid queue for tid 0 %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
for (tid = 0; tid <= IEEE80211_NUM_TIDS; tid++) {
|
||||
ret = ath11k_peer_rx_tid_setup(ar, addr, vdev_id,
|
||||
tid, 1, 0);
|
||||
if (ret) {
|
||||
ath11k_warn(ab, "failed to setup rxd tid queue for tid %d: %d\n",
|
||||
tid, ret);
|
||||
goto peer_clean;
|
||||
}
|
||||
}
|
||||
|
||||
/* TODO: Setup other peer specific resource used in data path */
|
||||
|
||||
return 0;
|
||||
|
||||
peer_clean:
|
||||
spin_lock_bh(&ab->base_lock);
|
||||
|
||||
peer = ath11k_peer_find(ab, vdev_id, addr);
|
||||
if (!peer) {
|
||||
ath11k_warn(ab, "failed to find the peer to del rx tid\n");
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
for (; tid >= 0; tid--)
|
||||
ath11k_peer_rx_tid_delete(ar, peer, tid);
|
||||
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void ath11k_dp_srng_cleanup(struct ath11k_base *ab, struct dp_srng *ring)
|
||||
|
|
|
@ -168,7 +168,7 @@ struct ath11k_pdev_dp {
|
|||
#define DP_RX_RELEASE_RING_SIZE 1024
|
||||
#define DP_REO_EXCEPTION_RING_SIZE 128
|
||||
#define DP_REO_CMD_RING_SIZE 128
|
||||
#define DP_REO_STATUS_RING_SIZE 256
|
||||
#define DP_REO_STATUS_RING_SIZE 2048
|
||||
#define DP_RXDMA_BUF_RING_SIZE 4096
|
||||
#define DP_RXDMA_REFILL_RING_SIZE 2048
|
||||
#define DP_RXDMA_ERR_DST_RING_SIZE 1024
|
||||
|
@ -1066,6 +1066,13 @@ struct htt_ppdu_stats_common {
|
|||
u16 bw_mhz;
|
||||
} __packed;
|
||||
|
||||
enum htt_ppdu_stats_gi {
|
||||
HTT_PPDU_STATS_SGI_0_8_US,
|
||||
HTT_PPDU_STATS_SGI_0_4_US,
|
||||
HTT_PPDU_STATS_SGI_1_6_US,
|
||||
HTT_PPDU_STATS_SGI_3_2_US,
|
||||
};
|
||||
|
||||
#define HTT_PPDU_STATS_USER_RATE_INFO0_USER_POS_M GENMASK(3, 0)
|
||||
#define HTT_PPDU_STATS_USER_RATE_INFO0_MU_GROUP_ID_M GENMASK(11, 4)
|
||||
|
||||
|
@ -1094,6 +1101,8 @@ struct htt_ppdu_stats_common {
|
|||
FIELD_GET(HTT_PPDU_STATS_USER_RATE_FLAGS_MCS_M, _val)
|
||||
#define HTT_USR_RATE_GI(_val) \
|
||||
FIELD_GET(HTT_PPDU_STATS_USER_RATE_FLAGS_GI_M, _val)
|
||||
#define HTT_USR_RATE_DCM(_val) \
|
||||
FIELD_GET(HTT_PPDU_STATS_USER_RATE_FLAGS_DCM_M, _val)
|
||||
|
||||
#define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_LTF_SIZE_M GENMASK(1, 0)
|
||||
#define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_STBC_M BIT(2)
|
||||
|
|
|
@ -633,8 +633,8 @@ free_desc:
|
|||
kfree(rx_tid->vaddr);
|
||||
}
|
||||
|
||||
static void ath11k_peer_rx_tid_delete(struct ath11k *ar,
|
||||
struct ath11k_peer *peer, u8 tid)
|
||||
void ath11k_peer_rx_tid_delete(struct ath11k *ar,
|
||||
struct ath11k_peer *peer, u8 tid)
|
||||
{
|
||||
struct ath11k_hal_reo_cmd cmd = {0};
|
||||
struct dp_rx_tid *rx_tid = &peer->rx_tid[tid];
|
||||
|
@ -1028,23 +1028,23 @@ int ath11k_dp_htt_tlv_iter(struct ath11k_base *ab, const void *ptr, size_t len,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static u32 ath11k_bw_to_mac80211_bwflags(u8 bw)
|
||||
static inline u32 ath11k_he_gi_to_nl80211_he_gi(u8 sgi)
|
||||
{
|
||||
u32 bwflags = 0;
|
||||
u32 ret = 0;
|
||||
|
||||
switch (bw) {
|
||||
case ATH11K_BW_40:
|
||||
bwflags = IEEE80211_TX_RC_40_MHZ_WIDTH;
|
||||
switch (sgi) {
|
||||
case RX_MSDU_START_SGI_0_8_US:
|
||||
ret = NL80211_RATE_INFO_HE_GI_0_8;
|
||||
break;
|
||||
case ATH11K_BW_80:
|
||||
bwflags = IEEE80211_TX_RC_80_MHZ_WIDTH;
|
||||
case RX_MSDU_START_SGI_1_6_US:
|
||||
ret = NL80211_RATE_INFO_HE_GI_1_6;
|
||||
break;
|
||||
case ATH11K_BW_160:
|
||||
bwflags = IEEE80211_TX_RC_160_MHZ_WIDTH;
|
||||
case RX_MSDU_START_SGI_3_2_US:
|
||||
ret = NL80211_RATE_INFO_HE_GI_3_2;
|
||||
break;
|
||||
}
|
||||
|
||||
return bwflags;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
|
@ -1056,12 +1056,11 @@ ath11k_update_per_peer_tx_stats(struct ath11k *ar,
|
|||
struct ieee80211_sta *sta;
|
||||
struct ath11k_sta *arsta;
|
||||
struct htt_ppdu_stats_user_rate *user_rate;
|
||||
struct ieee80211_chanctx_conf *conf = NULL;
|
||||
struct ath11k_per_peer_tx_stats *peer_stats = &ar->peer_tx_stats;
|
||||
struct htt_ppdu_user_stats *usr_stats = &ppdu_stats->user_stats[user];
|
||||
struct htt_ppdu_stats_common *common = &ppdu_stats->common;
|
||||
int ret;
|
||||
u8 flags, mcs, nss, bw, sgi, rate_idx = 0;
|
||||
u8 flags, mcs, nss, bw, sgi, dcm, rate_idx = 0;
|
||||
u32 succ_bytes = 0;
|
||||
u16 rate = 0, succ_pkts = 0;
|
||||
u32 tx_duration = 0;
|
||||
|
@ -1096,18 +1095,29 @@ ath11k_update_per_peer_tx_stats(struct ath11k *ar,
|
|||
nss = HTT_USR_RATE_NSS(user_rate->rate_flags) + 1;
|
||||
mcs = HTT_USR_RATE_MCS(user_rate->rate_flags);
|
||||
sgi = HTT_USR_RATE_GI(user_rate->rate_flags);
|
||||
dcm = HTT_USR_RATE_DCM(user_rate->rate_flags);
|
||||
|
||||
/* Note: If host configured fixed rates and in some other special
|
||||
* cases, the broadcast/management frames are sent in different rates.
|
||||
* Firmware rate's control to be skipped for this?
|
||||
*/
|
||||
|
||||
if (flags == WMI_RATE_PREAMBLE_VHT && mcs > 9) {
|
||||
if (flags == WMI_RATE_PREAMBLE_HE && mcs > 11) {
|
||||
ath11k_warn(ab, "Invalid HE mcs %hhd peer stats", mcs);
|
||||
return;
|
||||
}
|
||||
|
||||
if (flags == WMI_RATE_PREAMBLE_HE && mcs > ATH11K_HE_MCS_MAX) {
|
||||
ath11k_warn(ab, "Invalid HE mcs %hhd peer stats", mcs);
|
||||
return;
|
||||
}
|
||||
|
||||
if (flags == WMI_RATE_PREAMBLE_VHT && mcs > ATH11K_VHT_MCS_MAX) {
|
||||
ath11k_warn(ab, "Invalid VHT mcs %hhd peer stats", mcs);
|
||||
return;
|
||||
}
|
||||
|
||||
if (flags == WMI_RATE_PREAMBLE_HT && (mcs > 7 || nss < 1)) {
|
||||
if (flags == WMI_RATE_PREAMBLE_HT && (mcs > ATH11K_HT_MCS_MAX || nss < 1)) {
|
||||
ath11k_warn(ab, "Invalid HT mcs %hhd nss %hhd peer stats",
|
||||
mcs, nss);
|
||||
return;
|
||||
|
@ -1136,60 +1146,42 @@ ath11k_update_per_peer_tx_stats(struct ath11k *ar,
|
|||
arsta = (struct ath11k_sta *)sta->drv_priv;
|
||||
|
||||
memset(&arsta->txrate, 0, sizeof(arsta->txrate));
|
||||
memset(&arsta->tx_info.status, 0, sizeof(arsta->tx_info.status));
|
||||
|
||||
switch (flags) {
|
||||
case WMI_RATE_PREAMBLE_OFDM:
|
||||
arsta->txrate.legacy = rate;
|
||||
if (arsta->arvif && arsta->arvif->vif)
|
||||
conf = rcu_dereference(arsta->arvif->vif->chanctx_conf);
|
||||
if (conf && conf->def.chan->band == NL80211_BAND_5GHZ)
|
||||
arsta->tx_info.status.rates[0].idx = rate_idx - 4;
|
||||
break;
|
||||
case WMI_RATE_PREAMBLE_CCK:
|
||||
arsta->txrate.legacy = rate;
|
||||
arsta->tx_info.status.rates[0].idx = rate_idx;
|
||||
if (mcs > ATH11K_HW_RATE_CCK_LP_1M &&
|
||||
mcs <= ATH11K_HW_RATE_CCK_SP_2M)
|
||||
arsta->tx_info.status.rates[0].flags |=
|
||||
IEEE80211_TX_RC_USE_SHORT_PREAMBLE;
|
||||
break;
|
||||
case WMI_RATE_PREAMBLE_HT:
|
||||
arsta->txrate.mcs = mcs + 8 * (nss - 1);
|
||||
arsta->tx_info.status.rates[0].idx = arsta->txrate.mcs;
|
||||
arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
|
||||
arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_MCS;
|
||||
if (sgi) {
|
||||
if (sgi)
|
||||
arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
|
||||
arsta->tx_info.status.rates[0].flags |=
|
||||
IEEE80211_TX_RC_SHORT_GI;
|
||||
}
|
||||
break;
|
||||
case WMI_RATE_PREAMBLE_VHT:
|
||||
arsta->txrate.mcs = mcs;
|
||||
ieee80211_rate_set_vht(&arsta->tx_info.status.rates[0], mcs, nss);
|
||||
arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
|
||||
arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_VHT_MCS;
|
||||
if (sgi) {
|
||||
if (sgi)
|
||||
arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
|
||||
arsta->tx_info.status.rates[0].flags |=
|
||||
IEEE80211_TX_RC_SHORT_GI;
|
||||
}
|
||||
break;
|
||||
case WMI_RATE_PREAMBLE_HE:
|
||||
arsta->txrate.mcs = mcs;
|
||||
arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS;
|
||||
arsta->txrate.he_dcm = dcm;
|
||||
arsta->txrate.he_gi = ath11k_he_gi_to_nl80211_he_gi(sgi);
|
||||
arsta->txrate.he_ru_alloc = ath11k_he_ru_tones_to_nl80211_he_ru_alloc(
|
||||
(user_rate->ru_end -
|
||||
user_rate->ru_start) + 1);
|
||||
break;
|
||||
}
|
||||
|
||||
arsta->txrate.nss = nss;
|
||||
arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw);
|
||||
arsta->tx_info.status.rates[0].flags |= ath11k_bw_to_mac80211_bwflags(bw);
|
||||
arsta->tx_duration += tx_duration;
|
||||
memcpy(&arsta->last_txrate, &arsta->txrate, sizeof(struct rate_info));
|
||||
|
||||
if (succ_pkts) {
|
||||
arsta->tx_info.flags = IEEE80211_TX_STAT_ACK;
|
||||
arsta->tx_info.status.rates[0].count = 1;
|
||||
ieee80211_tx_rate_update(ar->hw, sta, &arsta->tx_info);
|
||||
}
|
||||
|
||||
/* PPDU stats reported for mgmt packet doesn't have valid tx bytes.
|
||||
* So skip peer stats update for mgmt packets.
|
||||
*/
|
||||
|
@ -1308,18 +1300,10 @@ exit:
|
|||
static void ath11k_htt_pktlog(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct htt_pktlog_msg *data = (struct htt_pktlog_msg *)skb->data;
|
||||
struct ath_pktlog_hdr *hdr = (struct ath_pktlog_hdr *)data;
|
||||
struct ath11k *ar;
|
||||
u32 len;
|
||||
u8 pdev_id;
|
||||
|
||||
len = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PAYLOAD_SIZE, data->hdr);
|
||||
if (len > ATH11K_HTT_PKTLOG_MAX_SIZE) {
|
||||
ath11k_warn(ab, "htt pktlog buffer size %d, expected < %d\n",
|
||||
len,
|
||||
ATH11K_HTT_PKTLOG_MAX_SIZE);
|
||||
return;
|
||||
}
|
||||
|
||||
pdev_id = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PDEV_ID, data->hdr);
|
||||
ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);
|
||||
if (!ar) {
|
||||
|
@ -1327,7 +1311,7 @@ static void ath11k_htt_pktlog(struct ath11k_base *ab, struct sk_buff *skb)
|
|||
return;
|
||||
}
|
||||
|
||||
trace_ath11k_htt_pktlog(ar, data->payload, len);
|
||||
trace_ath11k_htt_pktlog(ar, data->payload, hdr->size);
|
||||
}
|
||||
|
||||
void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab,
|
||||
|
@ -1988,6 +1972,7 @@ static void ath11k_dp_rx_h_rate(struct ath11k *ar, struct hal_rx_desc *rx_desc,
|
|||
}
|
||||
rx_status->encoding = RX_ENC_HE;
|
||||
rx_status->nss = nss;
|
||||
rx_status->he_gi = ath11k_he_gi_to_nl80211_he_gi(sgi);
|
||||
rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);
|
||||
break;
|
||||
}
|
||||
|
@ -2411,6 +2396,8 @@ static void ath11k_dp_rx_update_peer_stats(struct ath11k_sta *arsta,
|
|||
|
||||
rx_stats->num_mpdu_fcs_ok += ppdu_info->num_mpdu_fcs_ok;
|
||||
rx_stats->num_mpdu_fcs_err += ppdu_info->num_mpdu_fcs_err;
|
||||
rx_stats->dcm_count += ppdu_info->dcm;
|
||||
rx_stats->ru_alloc_cnt[ppdu_info->ru_alloc] += num_msdu;
|
||||
|
||||
arsta->rssi_comb = ppdu_info->rssi_comb;
|
||||
rx_stats->rx_duration += ppdu_info->rx_duration;
|
||||
|
|
|
@ -44,6 +44,8 @@ int ath11k_dp_rx_ampdu_start(struct ath11k *ar,
|
|||
int ath11k_dp_rx_ampdu_stop(struct ath11k *ar,
|
||||
struct ieee80211_ampdu_params *params);
|
||||
void ath11k_peer_rx_tid_cleanup(struct ath11k *ar, struct ath11k_peer *peer);
|
||||
void ath11k_peer_rx_tid_delete(struct ath11k *ar,
|
||||
struct ath11k_peer *peer, u8 tid);
|
||||
int ath11k_peer_rx_tid_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id,
|
||||
u8 tid, u32 ba_win_sz, u16 ssn);
|
||||
void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab,
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
#include "dp_tx.h"
|
||||
#include "debug.h"
|
||||
#include "hw.h"
|
||||
#include "peer.h"
|
||||
|
||||
/* NOTE: Any of the mapped ring id value must not exceed DP_TCL_NUM_RING_MAX */
|
||||
static const u8
|
||||
|
|
|
@ -1001,6 +1001,7 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab,
|
|||
}
|
||||
|
||||
ppdu_info->nss = nsts + 1;
|
||||
ppdu_info->dcm = dcm;
|
||||
ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU;
|
||||
break;
|
||||
}
|
||||
|
@ -1038,9 +1039,15 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab,
|
|||
break;
|
||||
}
|
||||
case HAL_PHYRX_HE_SIG_B1_MU: {
|
||||
/* TODO: Check if resource unit(RU) allocation stats
|
||||
* are required
|
||||
*/
|
||||
struct hal_rx_he_sig_b1_mu_info *he_sig_b1_mu =
|
||||
(struct hal_rx_he_sig_b1_mu_info *)tlv_data;
|
||||
u16 ru_tones;
|
||||
|
||||
info0 = __le32_to_cpu(he_sig_b1_mu->info0);
|
||||
|
||||
ru_tones = FIELD_GET(HAL_RX_HE_SIG_B1_MU_INFO_INFO0_RU_ALLOCATION,
|
||||
info0);
|
||||
ppdu_info->ru_alloc = ath11k_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones);
|
||||
ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO;
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -99,6 +99,8 @@ struct hal_rx_mon_ppdu_info {
|
|||
u8 beamformed;
|
||||
u8 rssi_comb;
|
||||
u8 tid;
|
||||
u8 dcm;
|
||||
u8 ru_alloc;
|
||||
u8 reception_type;
|
||||
u64 rx_duration;
|
||||
};
|
||||
|
@ -325,6 +327,34 @@ enum hal_rx_mon_status
|
|||
ath11k_hal_rx_parse_mon_status(struct ath11k_base *ab,
|
||||
struct hal_rx_mon_ppdu_info *ppdu_info,
|
||||
struct sk_buff *skb);
|
||||
|
||||
static inline u32 ath11k_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones)
|
||||
{
|
||||
u32 ret = 0;
|
||||
|
||||
switch (ru_tones) {
|
||||
case RU_26:
|
||||
ret = NL80211_RATE_INFO_HE_RU_ALLOC_26;
|
||||
break;
|
||||
case RU_52:
|
||||
ret = NL80211_RATE_INFO_HE_RU_ALLOC_52;
|
||||
break;
|
||||
case RU_106:
|
||||
ret = NL80211_RATE_INFO_HE_RU_ALLOC_106;
|
||||
break;
|
||||
case RU_242:
|
||||
ret = NL80211_RATE_INFO_HE_RU_ALLOC_242;
|
||||
break;
|
||||
case RU_484:
|
||||
ret = NL80211_RATE_INFO_HE_RU_ALLOC_484;
|
||||
break;
|
||||
case RU_996:
|
||||
ret = NL80211_RATE_INFO_HE_RU_ALLOC_996;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_0 0xDDBEEF
|
||||
#define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_1 0xADBEEF
|
||||
#define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_2 0xBDBEEF
|
||||
|
|
|
@ -178,6 +178,22 @@ u8 ath11k_mac_bw_to_mac80211_bw(u8 bw)
|
|||
return ret;
|
||||
}
|
||||
|
||||
enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw)
|
||||
{
|
||||
switch (bw) {
|
||||
case RATE_INFO_BW_20:
|
||||
return ATH11K_BW_20;
|
||||
case RATE_INFO_BW_40:
|
||||
return ATH11K_BW_40;
|
||||
case RATE_INFO_BW_80:
|
||||
return ATH11K_BW_80;
|
||||
case RATE_INFO_BW_160:
|
||||
return ATH11K_BW_160;
|
||||
default:
|
||||
return ATH11K_BW_20;
|
||||
}
|
||||
}
|
||||
|
||||
int ath11k_mac_hw_ratecode_to_legacy_rate(u8 hw_rc, u8 preamble, u8 *rateidx,
|
||||
u16 *rate)
|
||||
{
|
||||
|
@ -369,8 +385,10 @@ struct ath11k_vif *ath11k_mac_get_arvif(struct ath11k *ar, u32 vdev_id)
|
|||
flags,
|
||||
ath11k_get_arvif_iter,
|
||||
&arvif_iter);
|
||||
if (!arvif_iter.arvif)
|
||||
if (!arvif_iter.arvif) {
|
||||
ath11k_warn(ar->ab, "No VIF found for vdev %d\n", vdev_id);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return arvif_iter.arvif;
|
||||
}
|
||||
|
@ -398,14 +416,12 @@ struct ath11k *ath11k_mac_get_ar_by_vdev_id(struct ath11k_base *ab, u32 vdev_id)
|
|||
{
|
||||
int i;
|
||||
struct ath11k_pdev *pdev;
|
||||
struct ath11k_vif *arvif;
|
||||
|
||||
for (i = 0; i < ab->num_radios; i++) {
|
||||
pdev = rcu_dereference(ab->pdevs_active[i]);
|
||||
if (pdev && pdev->ar) {
|
||||
arvif = ath11k_mac_get_arvif(pdev->ar, vdev_id);
|
||||
if (arvif)
|
||||
return arvif->ar;
|
||||
if (pdev->ar->allocated_vdev_map & (1LL << vdev_id))
|
||||
return pdev->ar;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2786,6 +2802,7 @@ static int ath11k_mac_op_sta_state(struct ieee80211_hw *hw,
|
|||
struct ath11k *ar = hw->priv;
|
||||
struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
|
||||
struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
|
||||
struct ath11k_peer *peer;
|
||||
int ret = 0;
|
||||
|
||||
/* cancel must be done outside the mutex to avoid deadlock */
|
||||
|
@ -2818,6 +2835,17 @@ static int ath11k_mac_op_sta_state(struct ieee80211_hw *hw,
|
|||
sta->addr, arvif->vdev_id);
|
||||
|
||||
ath11k_mac_dec_num_stations(arvif, sta);
|
||||
spin_lock_bh(&ar->ab->base_lock);
|
||||
peer = ath11k_peer_find(ar->ab, arvif->vdev_id, sta->addr);
|
||||
if (peer && peer->sta == sta) {
|
||||
ath11k_warn(ar->ab, "Found peer entry %pM n vdev %i after it was supposedly removed\n",
|
||||
vif->addr, arvif->vdev_id);
|
||||
peer->sta = NULL;
|
||||
list_del(&peer->list);
|
||||
kfree(peer);
|
||||
ar->num_peers--;
|
||||
}
|
||||
spin_unlock_bh(&ar->ab->base_lock);
|
||||
|
||||
kfree(arsta->tx_stats);
|
||||
arsta->tx_stats = NULL;
|
||||
|
@ -3874,6 +3902,7 @@ static int ath11k_mac_op_start(struct ieee80211_hw *hw)
|
|||
ar->num_started_vdevs = 0;
|
||||
ar->num_created_vdevs = 0;
|
||||
ar->num_peers = 0;
|
||||
ar->allocated_vdev_map = 0;
|
||||
|
||||
/* Configure monitor status ring with default rx_filter to get rx status
|
||||
* such as rssi, rx_duration.
|
||||
|
@ -4112,8 +4141,9 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw,
|
|||
}
|
||||
|
||||
ar->num_created_vdevs++;
|
||||
|
||||
ar->allocated_vdev_map |= 1LL << arvif->vdev_id;
|
||||
ab->free_vdev_map &= ~(1LL << arvif->vdev_id);
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
list_add(&arvif->list, &ar->arvifs);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
@ -4227,6 +4257,7 @@ err_peer_del:
|
|||
err_vdev_del:
|
||||
ath11k_wmi_vdev_delete(ar, arvif->vdev_id);
|
||||
ar->num_created_vdevs--;
|
||||
ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id);
|
||||
ab->free_vdev_map |= 1LL << arvif->vdev_id;
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
list_del(&arvif->list);
|
||||
|
@ -4263,7 +4294,6 @@ static void ath11k_mac_op_remove_interface(struct ieee80211_hw *hw,
|
|||
ath11k_dbg(ab, ATH11K_DBG_MAC, "mac remove interface (vdev %d)\n",
|
||||
arvif->vdev_id);
|
||||
|
||||
ab->free_vdev_map |= 1LL << (arvif->vdev_id);
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
list_del(&arvif->list);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
@ -4281,6 +4311,8 @@ static void ath11k_mac_op_remove_interface(struct ieee80211_hw *hw,
|
|||
arvif->vdev_id, ret);
|
||||
|
||||
ar->num_created_vdevs--;
|
||||
ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id);
|
||||
ab->free_vdev_map |= 1LL << (arvif->vdev_id);
|
||||
|
||||
ath11k_peer_cleanup(ar, arvif->vdev_id);
|
||||
|
||||
|
@ -5873,6 +5905,8 @@ int ath11k_mac_allocate(struct ath11k_base *ab)
|
|||
init_completion(&ar->bss_survey_done);
|
||||
init_completion(&ar->scan.started);
|
||||
init_completion(&ar->scan.completed);
|
||||
init_completion(&ar->thermal.wmi_sync);
|
||||
|
||||
INIT_DELAYED_WORK(&ar->scan.timeout, ath11k_scan_timeout_work);
|
||||
INIT_WORK(&ar->regd_update_work, ath11k_regd_update_work);
|
||||
|
||||
|
|
|
@ -144,4 +144,5 @@ void ath11k_mac_drain_tx(struct ath11k *ar);
|
|||
void ath11k_mac_peer_cleanup_all(struct ath11k *ar);
|
||||
int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx);
|
||||
u8 ath11k_mac_bw_to_mac80211_bw(u8 bw);
|
||||
enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw);
|
||||
#endif
|
||||
|
|
|
@ -1209,4 +1209,12 @@ struct hal_rx_desc {
|
|||
u8 msdu_payload[0];
|
||||
} __packed;
|
||||
|
||||
#define HAL_RX_RU_ALLOC_TYPE_MAX 6
|
||||
#define RU_26 1
|
||||
#define RU_52 2
|
||||
#define RU_106 4
|
||||
#define RU_242 9
|
||||
#define RU_484 18
|
||||
#define RU_996 37
|
||||
|
||||
#endif /* ATH11K_RX_DESC_H */
|
||||
|
|
224
drivers/net/wireless/ath/ath11k/thermal.c
Normal file
224
drivers/net/wireless/ath/ath11k/thermal.c
Normal file
|
@ -0,0 +1,224 @@
|
|||
// SPDX-License-Identifier: BSD-3-Clause-Clear
|
||||
/*
|
||||
* Copyright (c) 2020 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/sysfs.h>
|
||||
#include <linux/thermal.h>
|
||||
#include <linux/hwmon.h>
|
||||
#include <linux/hwmon-sysfs.h>
|
||||
#include "core.h"
|
||||
#include "debug.h"
|
||||
|
||||
static int
|
||||
ath11k_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev,
|
||||
unsigned long *state)
|
||||
{
|
||||
*state = ATH11K_THERMAL_THROTTLE_MAX;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
ath11k_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev,
|
||||
unsigned long *state)
|
||||
{
|
||||
struct ath11k *ar = cdev->devdata;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
*state = ar->thermal.throttle_state;
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
ath11k_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev,
|
||||
unsigned long throttle_state)
|
||||
{
|
||||
struct ath11k *ar = cdev->devdata;
|
||||
int ret;
|
||||
|
||||
if (throttle_state > ATH11K_THERMAL_THROTTLE_MAX) {
|
||||
ath11k_warn(ar->ab, "throttle state %ld is exceeding the limit %d\n",
|
||||
throttle_state, ATH11K_THERMAL_THROTTLE_MAX);
|
||||
return -EINVAL;
|
||||
}
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
ret = ath11k_thermal_set_throttling(ar, throttle_state);
|
||||
if (ret == 0)
|
||||
ar->thermal.throttle_state = throttle_state;
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct thermal_cooling_device_ops ath11k_thermal_ops = {
|
||||
.get_max_state = ath11k_thermal_get_max_throttle_state,
|
||||
.get_cur_state = ath11k_thermal_get_cur_throttle_state,
|
||||
.set_cur_state = ath11k_thermal_set_cur_throttle_state,
|
||||
};
|
||||
|
||||
static ssize_t ath11k_thermal_show_temp(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
struct ath11k *ar = dev_get_drvdata(dev);
|
||||
int ret, temperature;
|
||||
unsigned long time_left;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
|
||||
/* Can't get temperature when the card is off */
|
||||
if (ar->state != ATH11K_STATE_ON) {
|
||||
ret = -ENETDOWN;
|
||||
goto out;
|
||||
}
|
||||
|
||||
reinit_completion(&ar->thermal.wmi_sync);
|
||||
ret = ath11k_wmi_send_pdev_temperature_cmd(ar);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to read temperature %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags)) {
|
||||
ret = -ESHUTDOWN;
|
||||
goto out;
|
||||
}
|
||||
|
||||
time_left = wait_for_completion_timeout(&ar->thermal.wmi_sync,
|
||||
ATH11K_THERMAL_SYNC_TIMEOUT_HZ);
|
||||
if (!time_left) {
|
||||
ath11k_warn(ar->ab, "failed to synchronize thermal read\n");
|
||||
ret = -ETIMEDOUT;
|
||||
goto out;
|
||||
}
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
temperature = ar->thermal.temperature;
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
/* display in millidegree celcius */
|
||||
ret = snprintf(buf, PAGE_SIZE, "%d\n", temperature * 1000);
|
||||
out:
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void ath11k_thermal_event_temperature(struct ath11k *ar, int temperature)
|
||||
{
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
ar->thermal.temperature = temperature;
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
complete(&ar->thermal.wmi_sync);
|
||||
}
|
||||
|
||||
static SENSOR_DEVICE_ATTR(temp1_input, 0444, ath11k_thermal_show_temp,
|
||||
NULL, 0);
|
||||
|
||||
static struct attribute *ath11k_hwmon_attrs[] = {
|
||||
&sensor_dev_attr_temp1_input.dev_attr.attr,
|
||||
NULL,
|
||||
};
|
||||
ATTRIBUTE_GROUPS(ath11k_hwmon);
|
||||
|
||||
int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state)
|
||||
{
|
||||
struct ath11k_base *sc = ar->ab;
|
||||
struct thermal_mitigation_params param;
|
||||
int ret = 0;
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
if (ar->state != ATH11K_STATE_ON)
|
||||
return 0;
|
||||
|
||||
memset(¶m, 0, sizeof(param));
|
||||
param.pdev_id = ar->pdev->pdev_id;
|
||||
param.enable = throttle_state ? 1 : 0;
|
||||
param.dc = ATH11K_THERMAL_DEFAULT_DUTY_CYCLE;
|
||||
param.dc_per_event = 0xFFFFFFFF;
|
||||
|
||||
param.levelconf[0].tmplwm = ATH11K_THERMAL_TEMP_LOW_MARK;
|
||||
param.levelconf[0].tmphwm = ATH11K_THERMAL_TEMP_HIGH_MARK;
|
||||
param.levelconf[0].dcoffpercent = throttle_state;
|
||||
param.levelconf[0].priority = 0; /* disable all data tx queues */
|
||||
|
||||
ret = ath11k_wmi_send_thermal_mitigation_param_cmd(ar, ¶m);
|
||||
if (ret) {
|
||||
ath11k_warn(sc, "failed to send thermal mitigation duty cycle %u ret %d\n",
|
||||
throttle_state, ret);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int ath11k_thermal_register(struct ath11k_base *sc)
|
||||
{
|
||||
struct thermal_cooling_device *cdev;
|
||||
struct device *hwmon_dev;
|
||||
struct ath11k *ar;
|
||||
struct ath11k_pdev *pdev;
|
||||
int i, ret;
|
||||
|
||||
for (i = 0; i < sc->num_radios; i++) {
|
||||
pdev = &sc->pdevs[i];
|
||||
ar = pdev->ar;
|
||||
if (!ar)
|
||||
continue;
|
||||
|
||||
cdev = thermal_cooling_device_register("ath11k_thermal", ar,
|
||||
&ath11k_thermal_ops);
|
||||
|
||||
if (IS_ERR(cdev)) {
|
||||
ath11k_err(sc, "failed to setup thermal device result: %ld\n",
|
||||
PTR_ERR(cdev));
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = sysfs_create_link(&ar->hw->wiphy->dev.kobj, &cdev->device.kobj,
|
||||
"cooling_device");
|
||||
if (ret) {
|
||||
ath11k_err(sc, "failed to create cooling device symlink\n");
|
||||
goto err_thermal_destroy;
|
||||
}
|
||||
|
||||
ar->thermal.cdev = cdev;
|
||||
if (!IS_REACHABLE(CONFIG_HWMON))
|
||||
return 0;
|
||||
|
||||
hwmon_dev = devm_hwmon_device_register_with_groups(&ar->hw->wiphy->dev,
|
||||
"ath11k_hwmon", ar,
|
||||
ath11k_hwmon_groups);
|
||||
if (IS_ERR(hwmon_dev)) {
|
||||
ath11k_err(ar->ab, "failed to register hwmon device: %ld\n",
|
||||
PTR_ERR(hwmon_dev));
|
||||
ret = -EINVAL;
|
||||
goto err_thermal_destroy;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_thermal_destroy:
|
||||
ath11k_thermal_unregister(sc);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void ath11k_thermal_unregister(struct ath11k_base *sc)
|
||||
{
|
||||
struct ath11k *ar;
|
||||
struct ath11k_pdev *pdev;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < sc->num_radios; i++) {
|
||||
pdev = &sc->pdevs[i];
|
||||
ar = pdev->ar;
|
||||
if (!ar)
|
||||
continue;
|
||||
|
||||
sysfs_remove_link(&ar->hw->wiphy->dev.kobj, "cooling_device");
|
||||
thermal_cooling_device_unregister(ar->thermal.cdev);
|
||||
}
|
||||
}
|
53
drivers/net/wireless/ath/ath11k/thermal.h
Normal file
53
drivers/net/wireless/ath/ath11k/thermal.h
Normal file
|
@ -0,0 +1,53 @@
|
|||
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
|
||||
/*
|
||||
* Copyright (c) 2020 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _ATH11K_THERMAL_
|
||||
#define _ATH11K_THERMAL_
|
||||
|
||||
#define ATH11K_THERMAL_TEMP_LOW_MARK -100
|
||||
#define ATH11K_THERMAL_TEMP_HIGH_MARK 150
|
||||
#define ATH11K_THERMAL_THROTTLE_MAX 100
|
||||
#define ATH11K_THERMAL_DEFAULT_DUTY_CYCLE 100
|
||||
#define ATH11K_HWMON_NAME_LEN 15
|
||||
#define ATH11K_THERMAL_SYNC_TIMEOUT_HZ (5 * HZ)
|
||||
|
||||
struct ath11k_thermal {
|
||||
struct thermal_cooling_device *cdev;
|
||||
struct completion wmi_sync;
|
||||
|
||||
/* protected by conf_mutex */
|
||||
u32 throttle_state;
|
||||
/* temperature value in Celcius degree
|
||||
* protected by data_lock
|
||||
*/
|
||||
int temperature;
|
||||
};
|
||||
|
||||
#if IS_REACHABLE(CONFIG_THERMAL)
|
||||
int ath11k_thermal_register(struct ath11k_base *sc);
|
||||
void ath11k_thermal_unregister(struct ath11k_base *sc);
|
||||
int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state);
|
||||
void ath11k_thermal_event_temperature(struct ath11k *ar, int temperature);
|
||||
#else
|
||||
static inline int ath11k_thermal_register(struct ath11k_base *sc)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void ath11k_thermal_unregister(struct ath11k *ar)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void ath11k_thermal_event_temperature(struct ath11k *ar,
|
||||
int temperature)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif /* _ATH11K_THERMAL_ */
|
|
@ -1471,6 +1471,34 @@ int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
|
|||
return ret;
|
||||
}
|
||||
|
||||
int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar)
|
||||
{
|
||||
struct ath11k_pdev_wmi *wmi = ar->wmi;
|
||||
struct wmi_get_pdev_temperature_cmd *cmd;
|
||||
struct sk_buff *skb;
|
||||
int ret;
|
||||
|
||||
skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
|
||||
cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_GET_TEMPERATURE_CMD) |
|
||||
FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);
|
||||
cmd->pdev_id = ar->pdev->pdev_id;
|
||||
|
||||
ret = ath11k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
|
||||
dev_kfree_skb(skb);
|
||||
}
|
||||
|
||||
ath11k_dbg(ar->ab, ATH11K_DBG_WMI,
|
||||
"WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
|
||||
u32 vdev_id, u32 bcn_ctrl_op)
|
||||
{
|
||||
|
@ -2442,6 +2470,70 @@ out:
|
|||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
|
||||
struct thermal_mitigation_params *param)
|
||||
{
|
||||
struct ath11k_pdev_wmi *wmi = ar->wmi;
|
||||
struct wmi_therm_throt_config_request_cmd *cmd;
|
||||
struct wmi_therm_throt_level_config_info *lvl_conf;
|
||||
struct wmi_tlv *tlv;
|
||||
struct sk_buff *skb;
|
||||
int i, ret, len;
|
||||
|
||||
len = sizeof(*cmd) + TLV_HDR_SIZE +
|
||||
THERMAL_LEVELS * sizeof(struct wmi_therm_throt_level_config_info);
|
||||
|
||||
skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, len);
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
cmd = (struct wmi_therm_throt_config_request_cmd *)skb->data;
|
||||
|
||||
cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_THERM_THROT_CONFIG_REQUEST) |
|
||||
FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);
|
||||
|
||||
cmd->pdev_id = ar->pdev->pdev_id;
|
||||
cmd->enable = param->enable;
|
||||
cmd->dc = param->dc;
|
||||
cmd->dc_per_event = param->dc_per_event;
|
||||
cmd->therm_throt_levels = THERMAL_LEVELS;
|
||||
|
||||
tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
|
||||
tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |
|
||||
FIELD_PREP(WMI_TLV_LEN,
|
||||
(THERMAL_LEVELS *
|
||||
sizeof(struct wmi_therm_throt_level_config_info)));
|
||||
|
||||
lvl_conf = (struct wmi_therm_throt_level_config_info *)(skb->data +
|
||||
sizeof(*cmd) +
|
||||
TLV_HDR_SIZE);
|
||||
for (i = 0; i < THERMAL_LEVELS; i++) {
|
||||
lvl_conf->tlv_header =
|
||||
FIELD_PREP(WMI_TLV_TAG, WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO) |
|
||||
FIELD_PREP(WMI_TLV_LEN, sizeof(*lvl_conf) - TLV_HDR_SIZE);
|
||||
|
||||
lvl_conf->temp_lwm = param->levelconf[i].tmplwm;
|
||||
lvl_conf->temp_hwm = param->levelconf[i].tmphwm;
|
||||
lvl_conf->dc_off_percent = param->levelconf[i].dcoffpercent;
|
||||
lvl_conf->prio = param->levelconf[i].priority;
|
||||
lvl_conf++;
|
||||
}
|
||||
|
||||
ret = ath11k_wmi_cmd_send(wmi, skb, WMI_THERM_THROT_SET_CONF_CMDID);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to send THERM_THROT_SET_CONF cmd\n");
|
||||
dev_kfree_skb(skb);
|
||||
}
|
||||
|
||||
ath11k_dbg(ar->ab, ATH11K_DBG_WMI,
|
||||
"WMI vdev set thermal throt pdev_id %d enable %d dc %d dc_per_event %x levels %d\n",
|
||||
ar->pdev->pdev_id, param->enable, param->dc,
|
||||
param->dc_per_event, THERMAL_LEVELS);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter)
|
||||
{
|
||||
struct ath11k_pdev_wmi *wmi = ar->wmi;
|
||||
|
@ -4168,6 +4260,31 @@ int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
ath11k_pull_pdev_temp_ev(struct ath11k_base *ab, u8 *evt_buf,
|
||||
u32 len, const struct wmi_pdev_temperature_event *ev)
|
||||
{
|
||||
const void **tb;
|
||||
int ret;
|
||||
|
||||
tb = ath11k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC);
|
||||
if (IS_ERR(tb)) {
|
||||
ret = PTR_ERR(tb);
|
||||
ath11k_warn(ab, "failed to parse tlv: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
|
||||
if (!ev) {
|
||||
ath11k_warn(ab, "failed to fetch pdev temp ev");
|
||||
kfree(tb);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
kfree(tb);
|
||||
return 0;
|
||||
}
|
||||
|
||||
size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head)
|
||||
{
|
||||
struct ath11k_fw_stats_vdev *i;
|
||||
|
@ -5345,15 +5462,18 @@ static void ath11k_peer_assoc_conf_event(struct ath11k_base *ab, struct sk_buff
|
|||
"peer assoc conf ev vdev id %d macaddr %pM\n",
|
||||
peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
|
||||
|
||||
rcu_read_lock();
|
||||
ar = ath11k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
|
||||
|
||||
if (!ar) {
|
||||
ath11k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
|
||||
peer_assoc_conf.vdev_id);
|
||||
rcu_read_unlock();
|
||||
return;
|
||||
}
|
||||
|
||||
complete(&ar->peer_assoc_done);
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
static void ath11k_update_stats_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
|
@ -5511,6 +5631,30 @@ exit:
|
|||
kfree(tb);
|
||||
}
|
||||
|
||||
static void
|
||||
ath11k_wmi_pdev_temperature_event(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ath11k *ar;
|
||||
struct wmi_pdev_temperature_event ev = {0};
|
||||
|
||||
if (ath11k_pull_pdev_temp_ev(ab, skb->data, skb->len, &ev) != 0) {
|
||||
ath11k_warn(ab, "failed to extract pdev temperature event");
|
||||
return;
|
||||
}
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_WMI,
|
||||
"pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
|
||||
|
||||
ar = ath11k_mac_get_ar_by_pdev_id(ab, ev.pdev_id);
|
||||
if (!ar) {
|
||||
ath11k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
|
||||
return;
|
||||
}
|
||||
|
||||
ath11k_thermal_event_temperature(ar, ev.temp);
|
||||
}
|
||||
|
||||
static void ath11k_wmi_tlv_op_rx(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_cmd_hdr *cmd_hdr;
|
||||
|
@ -5588,6 +5732,9 @@ static void ath11k_wmi_tlv_op_rx(struct ath11k_base *ab, struct sk_buff *skb)
|
|||
case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
|
||||
ath11k_wmi_pdev_csa_switch_count_status_event(ab, skb);
|
||||
break;
|
||||
case WMI_PDEV_TEMPERATURE_EVENTID:
|
||||
ath11k_wmi_pdev_temperature_event(ab, skb);
|
||||
break;
|
||||
/* add Unsupported events here */
|
||||
case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
|
||||
case WMI_VDEV_DELETE_RESP_EVENTID:
|
||||
|
|
|
@ -442,6 +442,10 @@ enum wmi_tlv_cmd_id {
|
|||
WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
|
||||
WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
|
||||
WMI_READ_DATA_FROM_FLASH_CMDID,
|
||||
WMI_THERM_THROT_SET_CONF_CMDID,
|
||||
WMI_RUNTIME_DPD_RECAL_CMDID,
|
||||
WMI_GET_TPC_POWER_CMDID,
|
||||
WMI_IDLE_TRIGGER_MONITOR_CMDID,
|
||||
WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
|
||||
WMI_GPIO_OUTPUT_CMDID,
|
||||
WMI_TXBF_CMDID,
|
||||
|
@ -3300,6 +3304,12 @@ struct wmi_request_stats_cmd {
|
|||
u32 pdev_id;
|
||||
} __packed;
|
||||
|
||||
struct wmi_get_pdev_temperature_cmd {
|
||||
u32 tlv_header;
|
||||
u32 param;
|
||||
u32 pdev_id;
|
||||
} __packed;
|
||||
|
||||
#define WMI_BEACON_TX_BUFFER_SIZE 512
|
||||
|
||||
struct wmi_bcn_tmpl_cmd {
|
||||
|
@ -3605,6 +3615,39 @@ struct wmi_init_country_cmd {
|
|||
} cc_info;
|
||||
} __packed;
|
||||
|
||||
#define THERMAL_LEVELS 1
|
||||
struct tt_level_config {
|
||||
u32 tmplwm;
|
||||
u32 tmphwm;
|
||||
u32 dcoffpercent;
|
||||
u32 priority;
|
||||
};
|
||||
|
||||
struct thermal_mitigation_params {
|
||||
u32 pdev_id;
|
||||
u32 enable;
|
||||
u32 dc;
|
||||
u32 dc_per_event;
|
||||
struct tt_level_config levelconf[THERMAL_LEVELS];
|
||||
};
|
||||
|
||||
struct wmi_therm_throt_config_request_cmd {
|
||||
u32 tlv_header;
|
||||
u32 pdev_id;
|
||||
u32 enable;
|
||||
u32 dc;
|
||||
u32 dc_per_event;
|
||||
u32 therm_throt_levels;
|
||||
} __packed;
|
||||
|
||||
struct wmi_therm_throt_level_config_info {
|
||||
u32 tlv_header;
|
||||
u32 temp_lwm;
|
||||
u32 temp_hwm;
|
||||
u32 dc_off_percent;
|
||||
u32 prio;
|
||||
} __packed;
|
||||
|
||||
struct wmi_pdev_pktlog_filter_info {
|
||||
u32 tlv_header;
|
||||
struct wmi_mac_addr peer_macaddr;
|
||||
|
@ -4095,6 +4138,12 @@ struct wmi_pdev_radar_ev {
|
|||
s32 sidx;
|
||||
} __packed;
|
||||
|
||||
struct wmi_pdev_temperature_event {
|
||||
/* temperature value in Celcius degree */
|
||||
s32 temp;
|
||||
u32 pdev_id;
|
||||
} __packed;
|
||||
|
||||
#define WMI_RX_STATUS_OK 0x00
|
||||
#define WMI_RX_STATUS_ERR_CRC 0x01
|
||||
#define WMI_RX_STATUS_ERR_DECRYPT 0x08
|
||||
|
@ -4726,6 +4775,7 @@ int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
|
|||
enum wmi_bss_chan_info_req_type type);
|
||||
int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
|
||||
struct stats_request_params *param);
|
||||
int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar);
|
||||
int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
|
||||
u8 peer_addr[ETH_ALEN],
|
||||
struct peer_flush_params *param);
|
||||
|
@ -4740,6 +4790,9 @@ int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
|
|||
int
|
||||
ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
|
||||
struct wmi_init_country_params init_cc_param);
|
||||
int
|
||||
ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
|
||||
struct thermal_mitigation_params *param);
|
||||
int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
|
||||
int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
|
||||
int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
|
||||
|
|
|
@ -54,7 +54,7 @@ config ATH5K_TRACER
|
|||
|
||||
config ATH5K_AHB
|
||||
bool "Atheros 5xxx AHB bus support"
|
||||
depends on ATH25
|
||||
depends on ATH25 && ATH5K
|
||||
---help---
|
||||
This adds support for WiSoC type chipsets of the 5xxx Atheros
|
||||
family.
|
||||
|
|
|
@ -201,35 +201,35 @@ static ssize_t read_file_beacon(struct file *file, char __user *user_buf,
|
|||
u64 tsf;
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_BEACON);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"%-24s0x%08x\tintval: %d\tTIM: 0x%x\n",
|
||||
"AR5K_BEACON", v, v & AR5K_BEACON_PERIOD,
|
||||
(v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S);
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n",
|
||||
"AR5K_LAST_TSTP", ath5k_hw_reg_read(ah, AR5K_LAST_TSTP));
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n",
|
||||
"AR5K_BEACON_CNT", ath5k_hw_reg_read(ah, AR5K_BEACON_CNT));
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_TIMER0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
|
||||
"AR5K_TIMER0 (TBTT)", v, v);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_TIMER1);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
|
||||
"AR5K_TIMER1 (DMA)", v, v >> 3);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_TIMER2);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
|
||||
"AR5K_TIMER2 (SWBA)", v, v >> 3);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_TIMER3);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
|
||||
"AR5K_TIMER3 (ATIM)", v, v);
|
||||
|
||||
tsf = ath5k_hw_get_tsf64(ah);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"TSF\t\t0x%016llx\tTU: %08x\n",
|
||||
(unsigned long long)tsf, TSF_TO_TU(tsf));
|
||||
|
||||
|
@ -320,16 +320,16 @@ static ssize_t read_file_debug(struct file *file, char __user *user_buf,
|
|||
unsigned int len = 0;
|
||||
unsigned int i;
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"DEBUG LEVEL: 0x%08x\n\n", ah->debug.level);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) {
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"%10s %c 0x%08x - %s\n", dbg_info[i].name,
|
||||
ah->debug.level & dbg_info[i].level ? '+' : ' ',
|
||||
dbg_info[i].level, dbg_info[i].desc);
|
||||
}
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"%10s %c 0x%08x - %s\n", dbg_info[i].name,
|
||||
ah->debug.level == dbg_info[i].level ? '+' : ' ',
|
||||
dbg_info[i].level, dbg_info[i].desc);
|
||||
|
@ -383,60 +383,60 @@ static ssize_t read_file_antenna(struct file *file, char __user *user_buf,
|
|||
unsigned int i;
|
||||
unsigned int v;
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n",
|
||||
ah->ah_ant_mode);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n",
|
||||
ah->ah_def_ant);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n",
|
||||
ah->ah_tx_ant);
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n");
|
||||
for (i = 1; i < ARRAY_SIZE(ah->stats.antenna_rx); i++) {
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"[antenna %d]\t%d\t%d\n",
|
||||
i, ah->stats.antenna_rx[i], ah->stats.antenna_tx[i]);
|
||||
}
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n",
|
||||
ah->stats.antenna_rx[0], ah->stats.antenna_tx[0]);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_STA_ID1);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n",
|
||||
(v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_STA_ID1_DESC_ANTENNA\t%d\n",
|
||||
(v & AR5K_STA_ID1_DESC_ANTENNA) != 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_STA_ID1_RTS_DEF_ANTENNA\t%d\n",
|
||||
(v & AR5K_STA_ID1_RTS_DEF_ANTENNA) != 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n",
|
||||
(v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n",
|
||||
(v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_PHY_RESTART);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_PHY_RESTART_DIV_GC\t\t%x\n",
|
||||
(v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_PHY_FAST_ANT_DIV);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_PHY_FAST_ANT_DIV_EN\t%d\n",
|
||||
(v & AR5K_PHY_FAST_ANT_DIV_EN) != 0);
|
||||
|
||||
v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v);
|
||||
v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_1);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v);
|
||||
|
||||
if (len > sizeof(buf))
|
||||
|
@ -495,36 +495,36 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
|
|||
unsigned int len = 0;
|
||||
u32 filt = ath5k_hw_get_rx_filter(ah);
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n",
|
||||
ah->bssidmask);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ",
|
||||
filt);
|
||||
if (filt & AR5K_RX_FILTER_UCAST)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " UCAST");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " UCAST");
|
||||
if (filt & AR5K_RX_FILTER_MCAST)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " MCAST");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " MCAST");
|
||||
if (filt & AR5K_RX_FILTER_BCAST)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " BCAST");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " BCAST");
|
||||
if (filt & AR5K_RX_FILTER_CONTROL)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " CONTROL");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " CONTROL");
|
||||
if (filt & AR5K_RX_FILTER_BEACON)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " BEACON");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " BEACON");
|
||||
if (filt & AR5K_RX_FILTER_PROM)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " PROM");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " PROM");
|
||||
if (filt & AR5K_RX_FILTER_XRPOLL)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " XRPOLL");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " XRPOLL");
|
||||
if (filt & AR5K_RX_FILTER_PROBEREQ)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " PROBEREQ");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " PROBEREQ");
|
||||
if (filt & AR5K_RX_FILTER_PHYERR_5212)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " PHYERR-5212");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " PHYERR-5212");
|
||||
if (filt & AR5K_RX_FILTER_RADARERR_5212)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5212");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " RADARERR-5212");
|
||||
if (filt & AR5K_RX_FILTER_PHYERR_5211)
|
||||
snprintf(buf + len, sizeof(buf) - len, " PHYERR-5211");
|
||||
if (filt & AR5K_RX_FILTER_RADARERR_5211)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5211");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, " RADARERR-5211");
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n",
|
||||
ath_opmode_to_string(ah->opmode), ah->opmode);
|
||||
|
||||
if (len > sizeof(buf))
|
||||
|
@ -551,65 +551,65 @@ static ssize_t read_file_frameerrors(struct file *file, char __user *user_buf,
|
|||
unsigned int len = 0;
|
||||
int i;
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"RX\n---------------------\n");
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "CRC\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "CRC\t%u\t(%u%%)\n",
|
||||
st->rxerr_crc,
|
||||
st->rx_all_count > 0 ?
|
||||
st->rxerr_crc * 100 / st->rx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "PHY\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "PHY\t%u\t(%u%%)\n",
|
||||
st->rxerr_phy,
|
||||
st->rx_all_count > 0 ?
|
||||
st->rxerr_phy * 100 / st->rx_all_count : 0);
|
||||
for (i = 0; i < 32; i++) {
|
||||
if (st->rxerr_phy_code[i])
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
" phy_err[%u]\t%u\n",
|
||||
i, st->rxerr_phy_code[i]);
|
||||
}
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "FIFO\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "FIFO\t%u\t(%u%%)\n",
|
||||
st->rxerr_fifo,
|
||||
st->rx_all_count > 0 ?
|
||||
st->rxerr_fifo * 100 / st->rx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "decrypt\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "decrypt\t%u\t(%u%%)\n",
|
||||
st->rxerr_decrypt,
|
||||
st->rx_all_count > 0 ?
|
||||
st->rxerr_decrypt * 100 / st->rx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "MIC\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "MIC\t%u\t(%u%%)\n",
|
||||
st->rxerr_mic,
|
||||
st->rx_all_count > 0 ?
|
||||
st->rxerr_mic * 100 / st->rx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "process\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "process\t%u\t(%u%%)\n",
|
||||
st->rxerr_proc,
|
||||
st->rx_all_count > 0 ?
|
||||
st->rxerr_proc * 100 / st->rx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "jumbo\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "jumbo\t%u\t(%u%%)\n",
|
||||
st->rxerr_jumbo,
|
||||
st->rx_all_count > 0 ?
|
||||
st->rxerr_jumbo * 100 / st->rx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "[RX all\t%u]\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "[RX all\t%u]\n",
|
||||
st->rx_all_count);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "RX-all-bytes\t%u\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "RX-all-bytes\t%u\n",
|
||||
st->rx_bytes_count);
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"\nTX\n---------------------\n");
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "retry\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "retry\t%u\t(%u%%)\n",
|
||||
st->txerr_retry,
|
||||
st->tx_all_count > 0 ?
|
||||
st->txerr_retry * 100 / st->tx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "FIFO\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "FIFO\t%u\t(%u%%)\n",
|
||||
st->txerr_fifo,
|
||||
st->tx_all_count > 0 ?
|
||||
st->txerr_fifo * 100 / st->tx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "filter\t%u\t(%u%%)\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "filter\t%u\t(%u%%)\n",
|
||||
st->txerr_filt,
|
||||
st->tx_all_count > 0 ?
|
||||
st->txerr_filt * 100 / st->tx_all_count : 0);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "[TX all\t%u]\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "[TX all\t%u]\n",
|
||||
st->tx_all_count);
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "TX-all-bytes\t%u\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "TX-all-bytes\t%u\n",
|
||||
st->tx_bytes_count);
|
||||
|
||||
if (len > sizeof(buf))
|
||||
|
@ -670,56 +670,56 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
|
|||
char buf[700];
|
||||
unsigned int len = 0;
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"HW has PHY error counters:\t%s\n",
|
||||
ah->ah_capabilities.cap_has_phyerr_counters ?
|
||||
"yes" : "no");
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"HW max spur immunity level:\t%d\n",
|
||||
as->max_spur_level);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"\nANI state\n--------------------------------------------\n");
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "operating mode:\t\t\t");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "operating mode:\t\t\t");
|
||||
switch (as->ani_mode) {
|
||||
case ATH5K_ANI_MODE_OFF:
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "OFF\n");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "OFF\n");
|
||||
break;
|
||||
case ATH5K_ANI_MODE_MANUAL_LOW:
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"MANUAL LOW\n");
|
||||
break;
|
||||
case ATH5K_ANI_MODE_MANUAL_HIGH:
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"MANUAL HIGH\n");
|
||||
break;
|
||||
case ATH5K_ANI_MODE_AUTO:
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "AUTO\n");
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "AUTO\n");
|
||||
break;
|
||||
default:
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"??? (not good)\n");
|
||||
break;
|
||||
}
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"noise immunity level:\t\t%d\n",
|
||||
as->noise_imm_level);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"spur immunity level:\t\t%d\n",
|
||||
as->spur_level);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"firstep level:\t\t\t%d\n",
|
||||
as->firstep_level);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"OFDM weak signal detection:\t%s\n",
|
||||
as->ofdm_weak_sig ? "on" : "off");
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"CCK weak signal detection:\t%s\n",
|
||||
as->cck_weak_sig ? "on" : "off");
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"\nMIB INTERRUPTS:\t\t%u\n",
|
||||
st->mib_intr);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"beacon RSSI average:\t%d\n",
|
||||
(int)ewma_beacon_rssi_read(&ah->ah_beacon_rssi_avg));
|
||||
|
||||
|
@ -728,35 +728,35 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
|
|||
_struct.cycles > 0 ? \
|
||||
_struct._field * 100 / _struct.cycles : 0
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"profcnt tx\t\t%u\t(%d%%)\n",
|
||||
CC_PRINT(as->last_cc, tx_frame));
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"profcnt rx\t\t%u\t(%d%%)\n",
|
||||
CC_PRINT(as->last_cc, rx_frame));
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"profcnt busy\t\t%u\t(%d%%)\n",
|
||||
CC_PRINT(as->last_cc, rx_busy));
|
||||
#undef CC_PRINT
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "profcnt cycles\t\t%u\n",
|
||||
len += scnprintf(buf + len, sizeof(buf) - len, "profcnt cycles\t\t%u\n",
|
||||
as->last_cc.cycles);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"listen time\t\t%d\tlast: %d\n",
|
||||
as->listen_time, as->last_listen);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"OFDM errors\t\t%u\tlast: %u\tsum: %u\n",
|
||||
as->ofdm_errors, as->last_ofdm_errors,
|
||||
as->sum_ofdm_errors);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"CCK errors\t\t%u\tlast: %u\tsum: %u\n",
|
||||
as->cck_errors, as->last_cck_errors,
|
||||
as->sum_cck_errors);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_PHYERR_CNT1\t%x\t(=%d)\n",
|
||||
ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1),
|
||||
ATH5K_ANI_OFDM_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX -
|
||||
ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1)));
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"AR5K_PHYERR_CNT2\t%x\t(=%d)\n",
|
||||
ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2),
|
||||
ATH5K_ANI_CCK_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX -
|
||||
|
@ -836,13 +836,13 @@ static ssize_t read_file_queue(struct file *file, char __user *user_buf,
|
|||
struct ath5k_buf *bf, *bf0;
|
||||
int i, n;
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"available txbuffers: %d\n", ah->txbuf_len);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
|
||||
txq = &ah->txqs[i];
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"%02d: %ssetup\n", i, txq->setup ? "" : "not ");
|
||||
|
||||
if (!txq->setup)
|
||||
|
@ -854,9 +854,9 @@ static ssize_t read_file_queue(struct file *file, char __user *user_buf,
|
|||
n++;
|
||||
spin_unlock_bh(&txq->lock);
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
" len: %d bufs: %d\n", txq->txq_len, n);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
" stuck: %d\n", txq->txq_stuck);
|
||||
}
|
||||
|
||||
|
|
|
@ -1460,6 +1460,9 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
|||
ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
|
||||
}
|
||||
|
||||
if (changed & IEEE80211_CONF_CHANGE_POWER)
|
||||
ath9k_set_txpower(sc, NULL);
|
||||
|
||||
mutex_unlock(&sc->mutex);
|
||||
ath9k_ps_restore(sc);
|
||||
|
||||
|
|
|
@ -45,7 +45,7 @@
|
|||
#include "cmd.h"
|
||||
|
||||
#define ADD(buf, off, max, fmt, args...) \
|
||||
off += snprintf(&buf[off], max - off, fmt, ##args);
|
||||
off += scnprintf(&buf[off], max - off, fmt, ##args);
|
||||
|
||||
|
||||
struct carl9170_debugfs_fops {
|
||||
|
|
|
@ -151,7 +151,7 @@ struct at76_command {
|
|||
u8 cmd;
|
||||
u8 reserved;
|
||||
__le16 size;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
/* Length of Atmel-specific Rx header before 802.11 frame */
|
||||
|
|
|
@ -51,7 +51,7 @@ struct b43_dfs_file *fops_to_dfs_file(struct b43_wldev *dev,
|
|||
#define fappend(fmt, x...) \
|
||||
do { \
|
||||
if (bufsize - count) \
|
||||
count += snprintf(buf + count, \
|
||||
count += scnprintf(buf + count, \
|
||||
bufsize - count, \
|
||||
fmt , ##x); \
|
||||
else \
|
||||
|
|
|
@ -54,7 +54,7 @@ struct b43legacy_dfs_file * fops_to_dfs_file(struct b43legacy_wldev *dev,
|
|||
#define fappend(fmt, x...) \
|
||||
do { \
|
||||
if (bufsize - count) \
|
||||
count += snprintf(buf + count, \
|
||||
count += scnprintf(buf + count, \
|
||||
bufsize - count, \
|
||||
fmt , ##x); \
|
||||
else \
|
||||
|
|
|
@ -25,13 +25,15 @@
|
|||
static int get_integer(const char *buf, size_t count)
|
||||
{
|
||||
char tmp[10 + 1] = { 0 };
|
||||
int ret = -EINVAL;
|
||||
int ret = -EINVAL, res;
|
||||
|
||||
if (count == 0)
|
||||
goto out;
|
||||
count = min_t(size_t, count, 10);
|
||||
memcpy(tmp, buf, count);
|
||||
ret = simple_strtol(tmp, NULL, 10);
|
||||
ret = kstrtoint(tmp, 10, &res);
|
||||
if (!ret)
|
||||
return res;
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -60,7 +60,7 @@ struct brcmf_fw_request {
|
|||
u16 bus_nr;
|
||||
u32 n_items;
|
||||
const char *board_type;
|
||||
struct brcmf_fw_item items[0];
|
||||
struct brcmf_fw_item items[];
|
||||
};
|
||||
|
||||
struct brcmf_fw_name {
|
||||
|
|
|
@ -32,7 +32,7 @@ struct brcmf_fweh_queue_item {
|
|||
u8 ifaddr[ETH_ALEN];
|
||||
struct brcmf_event_msg_be emsg;
|
||||
u32 datalen;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
@ -629,30 +629,30 @@ static char *snprint_line(char *buf, size_t count,
|
|||
int out, i, j, l;
|
||||
char c;
|
||||
|
||||
out = snprintf(buf, count, "%08X", ofs);
|
||||
out = scnprintf(buf, count, "%08X", ofs);
|
||||
|
||||
for (l = 0, i = 0; i < 2; i++) {
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
for (j = 0; j < 8 && l < len; j++, l++)
|
||||
out += snprintf(buf + out, count - out, "%02X ",
|
||||
out += scnprintf(buf + out, count - out, "%02X ",
|
||||
data[(i * 8 + j)]);
|
||||
for (; j < 8; j++)
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
}
|
||||
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
for (l = 0, i = 0; i < 2; i++) {
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
for (j = 0; j < 8 && l < len; j++, l++) {
|
||||
c = data[(i * 8 + j)];
|
||||
if (!isascii(c) || !isprint(c))
|
||||
c = '.';
|
||||
|
||||
out += snprintf(buf + out, count - out, "%c", c);
|
||||
out += scnprintf(buf + out, count - out, "%c", c);
|
||||
}
|
||||
|
||||
for (; j < 8; j++)
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
}
|
||||
|
||||
return buf;
|
||||
|
|
|
@ -223,30 +223,30 @@ static int snprint_line(char *buf, size_t count,
|
|||
int out, i, j, l;
|
||||
char c;
|
||||
|
||||
out = snprintf(buf, count, "%08X", ofs);
|
||||
out = scnprintf(buf, count, "%08X", ofs);
|
||||
|
||||
for (l = 0, i = 0; i < 2; i++) {
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
for (j = 0; j < 8 && l < len; j++, l++)
|
||||
out += snprintf(buf + out, count - out, "%02X ",
|
||||
out += scnprintf(buf + out, count - out, "%02X ",
|
||||
data[(i * 8 + j)]);
|
||||
for (; j < 8; j++)
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
}
|
||||
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
for (l = 0, i = 0; i < 2; i++) {
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
for (j = 0; j < 8 && l < len; j++, l++) {
|
||||
c = data[(i * 8 + j)];
|
||||
if (!isascii(c) || !isprint(c))
|
||||
c = '.';
|
||||
|
||||
out += snprintf(buf + out, count - out, "%c", c);
|
||||
out += scnprintf(buf + out, count - out, "%c", c);
|
||||
}
|
||||
|
||||
for (; j < 8; j++)
|
||||
out += snprintf(buf + out, count - out, " ");
|
||||
out += scnprintf(buf + out, count - out, " ");
|
||||
}
|
||||
|
||||
return out;
|
||||
|
@ -1279,12 +1279,12 @@ static ssize_t show_event_log(struct device *d,
|
|||
log_len = log_size / sizeof(*log);
|
||||
ipw_capture_event_log(priv, log_len, log);
|
||||
|
||||
len += snprintf(buf + len, PAGE_SIZE - len, "%08X", log_len);
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "%08X", log_len);
|
||||
for (i = 0; i < log_len; i++)
|
||||
len += snprintf(buf + len, PAGE_SIZE - len,
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"\n%08X%08X%08X",
|
||||
log[i].time, log[i].event, log[i].data);
|
||||
len += snprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
kfree(log);
|
||||
return len;
|
||||
}
|
||||
|
@ -1298,13 +1298,13 @@ static ssize_t show_error(struct device *d,
|
|||
u32 len = 0, i;
|
||||
if (!priv->error)
|
||||
return 0;
|
||||
len += snprintf(buf + len, PAGE_SIZE - len,
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"%08lX%08X%08X%08X",
|
||||
priv->error->jiffies,
|
||||
priv->error->status,
|
||||
priv->error->config, priv->error->elem_len);
|
||||
for (i = 0; i < priv->error->elem_len; i++)
|
||||
len += snprintf(buf + len, PAGE_SIZE - len,
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"\n%08X%08X%08X%08X%08X%08X%08X",
|
||||
priv->error->elem[i].time,
|
||||
priv->error->elem[i].desc,
|
||||
|
@ -1314,15 +1314,15 @@ static ssize_t show_error(struct device *d,
|
|||
priv->error->elem[i].link2,
|
||||
priv->error->elem[i].data);
|
||||
|
||||
len += snprintf(buf + len, PAGE_SIZE - len,
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"\n%08X", priv->error->log_len);
|
||||
for (i = 0; i < priv->error->log_len; i++)
|
||||
len += snprintf(buf + len, PAGE_SIZE - len,
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"\n%08X%08X%08X",
|
||||
priv->error->log[i].time,
|
||||
priv->error->log[i].event,
|
||||
priv->error->log[i].data);
|
||||
len += snprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
return len;
|
||||
}
|
||||
|
||||
|
@ -1350,7 +1350,7 @@ static ssize_t show_cmd_log(struct device *d,
|
|||
(i != priv->cmdlog_pos) && (len < PAGE_SIZE);
|
||||
i = (i + 1) % priv->cmdlog_len) {
|
||||
len +=
|
||||
snprintf(buf + len, PAGE_SIZE - len,
|
||||
scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"\n%08lX%08X%08X%08X\n", priv->cmdlog[i].jiffies,
|
||||
priv->cmdlog[i].retcode, priv->cmdlog[i].cmd.cmd,
|
||||
priv->cmdlog[i].cmd.len);
|
||||
|
@ -1358,9 +1358,9 @@ static ssize_t show_cmd_log(struct device *d,
|
|||
snprintk_buf(buf + len, PAGE_SIZE - len,
|
||||
(u8 *) priv->cmdlog[i].cmd.param,
|
||||
priv->cmdlog[i].cmd.len);
|
||||
len += snprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
}
|
||||
len += snprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
return len;
|
||||
}
|
||||
|
||||
|
@ -9608,24 +9608,24 @@ static int ipw_wx_get_powermode(struct net_device *dev,
|
|||
int level = IPW_POWER_LEVEL(priv->power_mode);
|
||||
char *p = extra;
|
||||
|
||||
p += snprintf(p, MAX_WX_STRING, "Power save level: %d ", level);
|
||||
p += scnprintf(p, MAX_WX_STRING, "Power save level: %d ", level);
|
||||
|
||||
switch (level) {
|
||||
case IPW_POWER_AC:
|
||||
p += snprintf(p, MAX_WX_STRING - (p - extra), "(AC)");
|
||||
p += scnprintf(p, MAX_WX_STRING - (p - extra), "(AC)");
|
||||
break;
|
||||
case IPW_POWER_BATTERY:
|
||||
p += snprintf(p, MAX_WX_STRING - (p - extra), "(BATTERY)");
|
||||
p += scnprintf(p, MAX_WX_STRING - (p - extra), "(BATTERY)");
|
||||
break;
|
||||
default:
|
||||
p += snprintf(p, MAX_WX_STRING - (p - extra),
|
||||
p += scnprintf(p, MAX_WX_STRING - (p - extra),
|
||||
"(Timeout %dms, Period %dms)",
|
||||
timeout_duration[level - 1] / 1000,
|
||||
period_duration[level - 1] / 1000);
|
||||
}
|
||||
|
||||
if (!(priv->power_mode & IPW_POWER_ENABLED))
|
||||
p += snprintf(p, MAX_WX_STRING - (p - extra), " OFF");
|
||||
p += scnprintf(p, MAX_WX_STRING - (p - extra), " OFF");
|
||||
|
||||
wrqu->data.length = p - extra + 1;
|
||||
|
||||
|
|
|
@ -1156,7 +1156,7 @@ static int libipw_parse_info_param(struct libipw_info_element
|
|||
for (i = 0; i < network->rates_len; i++) {
|
||||
network->rates[i] = info_element->data[i];
|
||||
#ifdef CONFIG_LIBIPW_DEBUG
|
||||
p += snprintf(p, sizeof(rates_str) -
|
||||
p += scnprintf(p, sizeof(rates_str) -
|
||||
(p - rates_str), "%02X ",
|
||||
network->rates[i]);
|
||||
#endif
|
||||
|
@ -1183,7 +1183,7 @@ static int libipw_parse_info_param(struct libipw_info_element
|
|||
for (i = 0; i < network->rates_ex_len; i++) {
|
||||
network->rates_ex[i] = info_element->data[i];
|
||||
#ifdef CONFIG_LIBIPW_DEBUG
|
||||
p += snprintf(p, sizeof(rates_str) -
|
||||
p += scnprintf(p, sizeof(rates_str) -
|
||||
(p - rates_str), "%02X ",
|
||||
network->rates_ex[i]);
|
||||
#endif
|
||||
|
|
|
@ -213,7 +213,7 @@ static char *libipw_translate_scan(struct libipw_device *ieee,
|
|||
* for given network. */
|
||||
iwe.cmd = IWEVCUSTOM;
|
||||
p = custom;
|
||||
p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
|
||||
p += scnprintf(p, MAX_CUSTOM_LEN - (p - custom),
|
||||
" Last beacon: %ums ago",
|
||||
elapsed_jiffies_msecs(network->last_scanned));
|
||||
iwe.u.data.length = p - custom;
|
||||
|
@ -223,18 +223,18 @@ static char *libipw_translate_scan(struct libipw_device *ieee,
|
|||
/* Add spectrum management information */
|
||||
iwe.cmd = -1;
|
||||
p = custom;
|
||||
p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Channel flags: ");
|
||||
p += scnprintf(p, MAX_CUSTOM_LEN - (p - custom), " Channel flags: ");
|
||||
|
||||
if (libipw_get_channel_flags(ieee, network->channel) &
|
||||
LIBIPW_CH_INVALID) {
|
||||
iwe.cmd = IWEVCUSTOM;
|
||||
p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), "INVALID ");
|
||||
p += scnprintf(p, MAX_CUSTOM_LEN - (p - custom), "INVALID ");
|
||||
}
|
||||
|
||||
if (libipw_get_channel_flags(ieee, network->channel) &
|
||||
LIBIPW_CH_RADAR_DETECT) {
|
||||
iwe.cmd = IWEVCUSTOM;
|
||||
p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), "DFS ");
|
||||
p += scnprintf(p, MAX_CUSTOM_LEN - (p - custom), "DFS ");
|
||||
}
|
||||
|
||||
if (iwe.cmd == IWEVCUSTOM) {
|
||||
|
|
|
@ -228,9 +228,7 @@ il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
|
|||
static int
|
||||
il3945_remove_static_key(struct il_priv *il)
|
||||
{
|
||||
int ret = -EOPNOTSUPP;
|
||||
|
||||
return ret;
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
|
@ -416,7 +416,6 @@ il4965_set_ucode_ptrs(struct il_priv *il)
|
|||
{
|
||||
dma_addr_t pinst;
|
||||
dma_addr_t pdata;
|
||||
int ret = 0;
|
||||
|
||||
/* bits 35:4 for 4965 */
|
||||
pinst = il->ucode_code.p_addr >> 4;
|
||||
|
@ -433,7 +432,7 @@ il4965_set_ucode_ptrs(struct il_priv *il)
|
|||
il->ucode_code.len | BSM_DRAM_INST_LOAD);
|
||||
D_INFO("Runtime uCode pointers are set.\n");
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -246,6 +246,23 @@ static const struct iwl_ht_params iwl_22000_ht_params = {
|
|||
#define IWL_NUM_RBDS_22000_HE 2048
|
||||
#define IWL_NUM_RBDS_AX210_HE 4096
|
||||
|
||||
const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = {
|
||||
.device_family = IWL_DEVICE_FAMILY_22000,
|
||||
.base_params = &iwl_22000_base_params,
|
||||
.mq_rx_supported = true,
|
||||
.use_tfh = true,
|
||||
.rf_id = true,
|
||||
.gen2 = true,
|
||||
.bisr_workaround = 1,
|
||||
};
|
||||
|
||||
const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz";
|
||||
|
||||
const char iwl_ax200_killer_1650w_name[] =
|
||||
"Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)";
|
||||
const char iwl_ax200_killer_1650x_name[] =
|
||||
"Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)";
|
||||
|
||||
const struct iwl_cfg iwl_ax101_cfg_qu_hr = {
|
||||
.name = "Intel(R) Wi-Fi 6 AX101",
|
||||
.fw_name_pre = IWL_22000_QU_B_HR_B_FW_PRE,
|
||||
|
@ -352,7 +369,6 @@ const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = {
|
|||
};
|
||||
|
||||
const struct iwl_cfg iwl_ax200_cfg_cc = {
|
||||
.name = "Intel(R) Wi-Fi 6 AX200 160MHz",
|
||||
.fw_name_pre = IWL_CC_A_FW_PRE,
|
||||
IWL_DEVICE_22500,
|
||||
/*
|
||||
|
@ -361,35 +377,6 @@ const struct iwl_cfg iwl_ax200_cfg_cc = {
|
|||
* HT size; mac80211 would otherwise pick the HE max (256) by default.
|
||||
*/
|
||||
.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
|
||||
.trans.bisr_workaround = 1,
|
||||
.num_rbds = IWL_NUM_RBDS_22000_HE,
|
||||
};
|
||||
|
||||
const struct iwl_cfg killer1650x_2ax_cfg = {
|
||||
.name = "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)",
|
||||
.fw_name_pre = IWL_CC_A_FW_PRE,
|
||||
IWL_DEVICE_22500,
|
||||
/*
|
||||
* This device doesn't support receiving BlockAck with a large bitmap
|
||||
* so we need to restrict the size of transmitted aggregation to the
|
||||
* HT size; mac80211 would otherwise pick the HE max (256) by default.
|
||||
*/
|
||||
.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
|
||||
.trans.bisr_workaround = 1,
|
||||
.num_rbds = IWL_NUM_RBDS_22000_HE,
|
||||
};
|
||||
|
||||
const struct iwl_cfg killer1650w_2ax_cfg = {
|
||||
.name = "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)",
|
||||
.fw_name_pre = IWL_CC_A_FW_PRE,
|
||||
IWL_DEVICE_22500,
|
||||
/*
|
||||
* This device doesn't support receiving BlockAck with a large bitmap
|
||||
* so we need to restrict the size of transmitted aggregation to the
|
||||
* HT size; mac80211 would otherwise pick the HE max (256) by default.
|
||||
*/
|
||||
.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
|
||||
.trans.bisr_workaround = 1,
|
||||
.num_rbds = IWL_NUM_RBDS_22000_HE,
|
||||
};
|
||||
|
||||
|
|
|
@ -123,8 +123,6 @@ static const struct iwl_tt_params iwl9000_tt_params = {
|
|||
#define IWL_DEVICE_9000 \
|
||||
.ucode_api_max = IWL9000_UCODE_API_MAX, \
|
||||
.ucode_api_min = IWL9000_UCODE_API_MIN, \
|
||||
.trans.device_family = IWL_DEVICE_FAMILY_9000, \
|
||||
.trans.base_params = &iwl9000_base_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.nvm_hw_section_num = 10, \
|
||||
.non_shared_ant = ANT_B, \
|
||||
|
@ -137,11 +135,9 @@ static const struct iwl_tt_params iwl9000_tt_params = {
|
|||
.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \
|
||||
.thermal_params = &iwl9000_tt_params, \
|
||||
.apmg_not_supported = true, \
|
||||
.trans.mq_rx_supported = true, \
|
||||
.num_rbds = 512, \
|
||||
.vht_mu_mimo_supported = true, \
|
||||
.mac_addr_from_csr = true, \
|
||||
.trans.rf_id = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true, \
|
||||
.min_umac_error_event_table = 0x800000, \
|
||||
|
@ -178,168 +174,45 @@ const struct iwl_cfg_trans_params iwl9000_trans_cfg = {
|
|||
.rf_id = true,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9160_2ac_cfg = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9160",
|
||||
.fw_name_pre = IWL9260_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9260_2ac_cfg = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9260",
|
||||
.fw_name_pre = IWL9260_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
};
|
||||
|
||||
const char iwl9162_name[] = "Intel(R) Wireless-AC 9162";
|
||||
const char iwl9260_name[] = "Intel(R) Wireless-AC 9260";
|
||||
const char iwl9260_1_name[] = "Intel(R) Wireless-AC 9260-1";
|
||||
const char iwl9270_name[] = "Intel(R) Wireless-AC 9270";
|
||||
const char iwl9461_name[] = "Intel(R) Wireless-AC 9461";
|
||||
const char iwl9462_name[] = "Intel(R) Wireless-AC 9462";
|
||||
const char iwl9560_name[] = "Intel(R) Wireless-AC 9560";
|
||||
const char iwl9162_160_name[] = "Intel(R) Wireless-AC 9162 160MHz";
|
||||
const char iwl9260_160_name[] = "Intel(R) Wireless-AC 9260 160MHz";
|
||||
const char iwl9270_160_name[] = "Intel(R) Wireless-AC 9270 160MHz";
|
||||
const char iwl9461_160_name[] = "Intel(R) Wireless-AC 9461 160MHz";
|
||||
const char iwl9462_160_name[] = "Intel(R) Wireless-AC 9462 160MHz";
|
||||
const char iwl9560_160_name[] = "Intel(R) Wireless-AC 9560 160MHz";
|
||||
|
||||
const struct iwl_cfg iwl9260_2ac_160_cfg = {
|
||||
.fw_name_pre = IWL9260_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9260_killer_2ac_cfg = {
|
||||
.name = "Killer (R) Wireless-AC 1550 Wireless Network Adapter (9260NGW)",
|
||||
.fw_name_pre = IWL9260_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9270_2ac_cfg = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9270",
|
||||
.fw_name_pre = IWL9260_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9460_2ac_cfg = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9460",
|
||||
.fw_name_pre = IWL9260_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9460_2ac_cfg_soc = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9460",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9461_2ac_cfg_soc = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9461",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9462_2ac_cfg_soc = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9462",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
};
|
||||
const char iwl9260_killer_1550_name[] =
|
||||
"Killer (R) Wireless-AC 1550 Wireless Network Adapter (9260NGW)";
|
||||
const char iwl9560_killer_1550i_name[] =
|
||||
"Killer (R) Wireless-AC 1550i Wireless Network Adapter (9560NGW)";
|
||||
const char iwl9560_killer_1550s_name[] =
|
||||
"Killer (R) Wireless-AC 1550s Wireless Network Adapter (9560NGW)";
|
||||
|
||||
const struct iwl_cfg iwl9560_2ac_cfg = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9560",
|
||||
.fw_name_pre = IWL9260_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_2ac_160_cfg = {
|
||||
.name = "Intel(R) Wireless-AC 9560 160MHz",
|
||||
.fw_name_pre = IWL9260_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_2ac_cfg_soc = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9560",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_2ac_160_cfg_soc = {
|
||||
.name = "Intel(R) Wireless-AC 9560 160MHz",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_killer_2ac_cfg_soc = {
|
||||
.name = "Killer (R) Wireless-AC 1550i Wireless Network Adapter (9560NGW)",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc = {
|
||||
.name = "Killer (R) Wireless-AC 1550s Wireless Network Adapter (9560NGW)",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9460_2ac_cfg_shared_clk = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9460",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
.extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9461_2ac_cfg_shared_clk = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9461",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
.extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9462_2ac_cfg_shared_clk = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9462",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
.extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_2ac_cfg_shared_clk = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9560",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
.extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_2ac_160_cfg_shared_clk = {
|
||||
.name = "Intel(R) Wireless-AC 9560 160MHz",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
.extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_killer_2ac_cfg_shared_clk = {
|
||||
.name = "Killer (R) Wireless-AC 1550i Wireless Network Adapter (9560NGW)",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
.soc_latency = 5000,
|
||||
.extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl9560_killer_s_2ac_cfg_shared_clk = {
|
||||
.name = "Killer (R) Wireless-AC 1550s Wireless Network Adapter (9560NGW)",
|
||||
.fw_name_pre = IWL9000_FW_PRE,
|
||||
IWL_DEVICE_9000,
|
||||
.integrated = true,
|
||||
|
|
|
@ -454,9 +454,40 @@ struct iwl_cfg {
|
|||
|
||||
#define IWL_CFG_ANY (~0)
|
||||
|
||||
#define IWL_CFG_MAC_TYPE_PU 0x31
|
||||
#define IWL_CFG_MAC_TYPE_PNJ 0x32
|
||||
#define IWL_CFG_MAC_TYPE_TH 0x32
|
||||
#define IWL_CFG_MAC_TYPE_QU 0x33
|
||||
|
||||
#define IWL_CFG_RF_TYPE_TH 0x105
|
||||
#define IWL_CFG_RF_TYPE_TH1 0x108
|
||||
#define IWL_CFG_RF_TYPE_JF2 0x105
|
||||
#define IWL_CFG_RF_TYPE_JF1 0x108
|
||||
|
||||
#define IWL_CFG_RF_ID_TH 0x1
|
||||
#define IWL_CFG_RF_ID_TH1 0x1
|
||||
#define IWL_CFG_RF_ID_JF 0x3
|
||||
#define IWL_CFG_RF_ID_JF1 0x6
|
||||
#define IWL_CFG_RF_ID_JF1_DIV 0xA
|
||||
|
||||
#define IWL_CFG_NO_160 0x0
|
||||
#define IWL_CFG_160 0x1
|
||||
|
||||
#define IWL_CFG_CORES_BT 0x0
|
||||
#define IWL_CFG_CORES_BT_GNSS 0x5
|
||||
|
||||
#define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4)
|
||||
#define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0100) >> 9)
|
||||
#define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10)
|
||||
|
||||
struct iwl_dev_info {
|
||||
u16 device;
|
||||
u16 subdevice;
|
||||
u16 mac_type;
|
||||
u16 rf_type;
|
||||
u8 rf_id;
|
||||
u8 no_160;
|
||||
u8 cores;
|
||||
const struct iwl_cfg *cfg;
|
||||
const char *name;
|
||||
};
|
||||
|
@ -465,8 +496,26 @@ struct iwl_dev_info {
|
|||
* This list declares the config structures for all devices.
|
||||
*/
|
||||
extern const struct iwl_cfg_trans_params iwl9000_trans_cfg;
|
||||
extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg;
|
||||
extern const char iwl9162_name[];
|
||||
extern const char iwl9260_name[];
|
||||
extern const char iwl9260_1_name[];
|
||||
extern const char iwl9270_name[];
|
||||
extern const char iwl9461_name[];
|
||||
extern const char iwl9462_name[];
|
||||
extern const char iwl9560_name[];
|
||||
extern const char iwl9162_160_name[];
|
||||
extern const char iwl9260_160_name[];
|
||||
extern const char iwl9270_160_name[];
|
||||
extern const char iwl9461_160_name[];
|
||||
extern const char iwl9462_160_name[];
|
||||
extern const char iwl9560_160_name[];
|
||||
extern const char iwl9260_killer_1550_name[];
|
||||
extern const char iwl9560_killer_1550i_name[];
|
||||
extern const char iwl9560_killer_1550s_name[];
|
||||
extern const char iwl_ax200_name[];
|
||||
extern const char iwl_ax200_killer_1650w_name[];
|
||||
extern const char iwl_ax200_killer_1650x_name[];
|
||||
|
||||
#if IS_ENABLED(CONFIG_IWLDVM)
|
||||
extern const struct iwl_cfg iwl5300_agn_cfg;
|
||||
|
@ -533,28 +582,18 @@ extern const struct iwl_cfg iwl8260_2ac_cfg;
|
|||
extern const struct iwl_cfg iwl8265_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl8275_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl4165_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl9160_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl9260_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl9260_2ac_160_cfg;
|
||||
extern const struct iwl_cfg iwl9260_killer_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl9270_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl9460_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl9560_2ac_cfg;
|
||||
extern const struct iwl_cfg iwl9560_2ac_cfg_quz_a0_jf_b0_soc;
|
||||
extern const struct iwl_cfg iwl9560_2ac_160_cfg;
|
||||
extern const struct iwl_cfg iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc;
|
||||
extern const struct iwl_cfg iwl9460_2ac_cfg_soc;
|
||||
extern const struct iwl_cfg iwl9461_2ac_cfg_soc;
|
||||
extern const struct iwl_cfg iwl9461_2ac_cfg_quz_a0_jf_b0_soc;
|
||||
extern const struct iwl_cfg iwl9462_2ac_cfg_soc;
|
||||
extern const struct iwl_cfg iwl9462_2ac_cfg_quz_a0_jf_b0_soc;
|
||||
extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
|
||||
extern const struct iwl_cfg iwl9560_2ac_160_cfg_soc;
|
||||
extern const struct iwl_cfg iwl9560_killer_2ac_cfg_soc;
|
||||
extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc;
|
||||
extern const struct iwl_cfg iwl9560_killer_i_2ac_cfg_quz_a0_jf_b0_soc;
|
||||
extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_quz_a0_jf_b0_soc;
|
||||
extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk;
|
||||
extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk;
|
||||
extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk;
|
||||
extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk;
|
||||
|
|
|
@ -566,43 +566,13 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
|||
{IWL_PCI_DEVICE(0x06F0, 0x4234, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},
|
||||
{IWL_PCI_DEVICE(0x06F0, 0x42A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0034, iwl9560_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0060, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0064, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x00A0, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x00A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0210, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0214, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0230, iwl9560_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0234, iwl9560_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0238, iwl9560_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x023C, iwl9560_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0260, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x0264, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x02A0, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x02A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1010, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1030, iwl9560_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1210, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1410, iwl9270_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1420, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1550, iwl9260_killer_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1552, iwl9560_killer_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x1610, iwl9270_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x2030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x2034, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x4034, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x40A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x4234, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, 0x42A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2526, PCI_ANY_ID, iwl9000_trans_cfg)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x271B, 0x0010, iwl9160_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x271B, 0x0014, iwl9160_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x271B, 0x0210, iwl9160_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x271B, 0x0214, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x271C, 0x0214, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x271B, PCI_ANY_ID, iwl9000_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x271C, PCI_ANY_ID, iwl9000_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x30DC, PCI_ANY_ID, iwl9000_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x31DC, PCI_ANY_ID, iwl9000_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, PCI_ANY_ID, iwl9000_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0xA370, PCI_ANY_ID, iwl9000_trans_cfg)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x2720, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
|
||||
{IWL_PCI_DEVICE(0x2720, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
|
||||
|
@ -630,64 +600,6 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
|||
{IWL_PCI_DEVICE(0x2720, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
|
||||
{IWL_PCI_DEVICE(0x2720, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0034, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0038, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x003C, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0060, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0064, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x00A0, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x00A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0230, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0234, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0238, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x023C, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0260, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x0264, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x02A0, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x02A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x1010, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x1030, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x1210, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x1552, iwl9560_killer_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x2030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x2034, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x4030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x4034, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x40A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x4234, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x30DC, 0x42A4, iwl9462_2ac_cfg_soc)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0030, iwl9560_2ac_160_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0034, iwl9560_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0038, iwl9560_2ac_160_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x003C, iwl9560_2ac_160_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0060, iwl9460_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0064, iwl9461_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x00A0, iwl9462_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x00A4, iwl9462_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0230, iwl9560_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0234, iwl9560_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0238, iwl9560_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x023C, iwl9560_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0260, iwl9461_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x0264, iwl9461_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x02A0, iwl9462_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x02A4, iwl9462_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x1010, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x1030, iwl9560_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x1210, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x1551, iwl9560_killer_s_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x1552, iwl9560_killer_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x2030, iwl9560_2ac_160_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x2034, iwl9560_2ac_160_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x4030, iwl9560_2ac_160_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x4034, iwl9560_2ac_160_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x40A4, iwl9462_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x4234, iwl9560_2ac_cfg_shared_clk)},
|
||||
{IWL_PCI_DEVICE(0x31DC, 0x42A4, iwl9462_2ac_cfg_shared_clk)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x34F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
|
||||
{IWL_PCI_DEVICE(0x34F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
|
||||
{IWL_PCI_DEVICE(0x34F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
|
||||
|
@ -768,46 +680,6 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
|||
{IWL_PCI_DEVICE(0x43F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
|
||||
{IWL_PCI_DEVICE(0x43F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0000, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0010, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0034, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0038, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x003C, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0060, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0064, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x00A0, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x00A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0210, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0230, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0234, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0238, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x023C, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0260, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0264, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x02A0, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x02A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0310, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0410, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0510, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0610, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0710, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x0A10, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x1010, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x1030, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x1210, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x1552, iwl9560_killer_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x2010, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x2030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x2034, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x2A10, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x4030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x4034, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x40A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x4234, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x9DF0, 0x42A4, iwl9462_2ac_cfg_soc)},
|
||||
|
||||
{IWL_PCI_DEVICE(0xA0F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
|
||||
{IWL_PCI_DEVICE(0xA0F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
|
||||
{IWL_PCI_DEVICE(0xA0F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
|
||||
|
@ -835,37 +707,11 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
|||
{IWL_PCI_DEVICE(0xA0F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
|
||||
{IWL_PCI_DEVICE(0xA0F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
|
||||
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0034, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0038, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x003C, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0060, iwl9460_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0064, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x00A0, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x00A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0230, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0234, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0238, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x023C, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0260, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x0264, iwl9461_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x02A0, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x02A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x1010, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x1030, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x1210, iwl9260_2ac_cfg)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x1552, iwl9560_killer_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x2030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x2034, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x4030, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x4034, iwl9560_2ac_160_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x40A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x4234, iwl9560_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0xA370, 0x42A4, iwl9462_2ac_cfg_soc)},
|
||||
{IWL_PCI_DEVICE(0x2720, 0x0030, iwl9560_2ac_cfg_qnj_jf_b0)},
|
||||
|
||||
/* 22000 Series */
|
||||
{IWL_PCI_DEVICE(0x2723, PCI_ANY_ID, iwl_ax200_trans_cfg)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x02F0, 0x0070, iwl_ax201_cfg_quz_hr)},
|
||||
{IWL_PCI_DEVICE(0x02F0, 0x0074, iwl_ax201_cfg_quz_hr)},
|
||||
{IWL_PCI_DEVICE(0x02F0, 0x0078, iwl_ax201_cfg_quz_hr)},
|
||||
|
@ -940,16 +786,6 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
|||
{IWL_PCI_DEVICE(0xA0F0, 0x4070, iwl_ax201_cfg_qu_hr)},
|
||||
{IWL_PCI_DEVICE(0xA0F0, 0x4244, iwl_ax101_cfg_qu_hr)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x2723, 0x0080, iwl_ax200_cfg_cc)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x0084, iwl_ax200_cfg_cc)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x0088, iwl_ax200_cfg_cc)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x008C, iwl_ax200_cfg_cc)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x1653, killer1650w_2ax_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x1654, killer1650x_2ax_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x2080, iwl_ax200_cfg_cc)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x4080, iwl_ax200_cfg_cc)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x4088, iwl_ax200_cfg_cc)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x2725, 0x0090, iwlax211_2ax_cfg_so_gf_a0)},
|
||||
{IWL_PCI_DEVICE(0x2725, 0x0020, iwlax210_2ax_cfg_ty_gf_a0)},
|
||||
{IWL_PCI_DEVICE(0x2725, 0x0310, iwlax210_2ax_cfg_ty_gf_a0)},
|
||||
|
@ -971,28 +807,139 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
|||
};
|
||||
MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
|
||||
|
||||
#define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \
|
||||
{ .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \
|
||||
.name = _name }
|
||||
#define _IWL_DEV_INFO(_device, _subdevice, _mac_type, _rf_type, _rf_id, \
|
||||
_no_160, _cores, _cfg, _name) \
|
||||
{ .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \
|
||||
.name = _name, .mac_type = _mac_type, .rf_type = _rf_type, \
|
||||
.no_160 = _no_160, .cores = _cores, .rf_id = _rf_id, }
|
||||
|
||||
#define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \
|
||||
_IWL_DEV_INFO(_device, _subdevice, IWL_CFG_ANY, IWL_CFG_ANY, \
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, _cfg, _name)
|
||||
|
||||
static const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
#if IS_ENABLED(CONFIG_IWLMVM)
|
||||
IWL_DEV_INFO(0x2526, 0x0010, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x0014, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x0018, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x001C, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x6010, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x6014, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x8014, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x8010, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0xA014, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0xE010, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0xE014, iwl9260_2ac_160_cfg, iwl9260_160_name),
|
||||
/* 9000 */
|
||||
IWL_DEV_INFO(0x2526, 0x1550, iwl9260_2ac_cfg, iwl9260_killer_1550_name),
|
||||
IWL_DEV_INFO(0x2526, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
|
||||
IWL_DEV_INFO(0x2526, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
|
||||
IWL_DEV_INFO(0x30DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
|
||||
IWL_DEV_INFO(0x30DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
|
||||
IWL_DEV_INFO(0x31DC, 0x1551, iwl9560_2ac_cfg_shared_clk, iwl9560_killer_1550s_name),
|
||||
IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_shared_clk, iwl9560_killer_1550i_name),
|
||||
|
||||
IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name),
|
||||
|
||||
_IWL_DEV_INFO(0x31DC, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_shared_clk, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(0x31DC, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_shared_clk, iwl9461_name),
|
||||
_IWL_DEV_INFO(0x31DC, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_shared_clk, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(0x31DC, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_shared_clk, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(0x31DC, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_shared_clk, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(0x31DC, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_shared_clk, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_soc, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_soc, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_soc, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_soc, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_soc, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg_soc, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg, iwl9461_name),
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9560_2ac_cfg, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT_GNSS,
|
||||
iwl9260_2ac_cfg, iwl9270_160_name),
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT_GNSS,
|
||||
iwl9260_2ac_cfg, iwl9270_name),
|
||||
|
||||
_IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9260_2ac_cfg, iwl9162_160_name),
|
||||
_IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9260_2ac_cfg, iwl9162_name),
|
||||
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT,
|
||||
iwl9260_2ac_cfg, iwl9260_160_name),
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT,
|
||||
iwl9260_2ac_cfg, iwl9260_name),
|
||||
|
||||
/* AX200 */
|
||||
IWL_DEV_INFO(0x2723, 0x1653, iwl_ax200_cfg_cc, iwl_ax200_killer_1650w_name),
|
||||
IWL_DEV_INFO(0x2723, 0x1654, iwl_ax200_cfg_cc, iwl_ax200_killer_1650x_name),
|
||||
IWL_DEV_INFO(0x2723, IWL_CFG_ANY, iwl_ax200_cfg_cc, iwl_ax200_name),
|
||||
|
||||
IWL_DEV_INFO(0x2526, 0x0030, iwl9560_2ac_160_cfg, iwl9560_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x0038, iwl9560_2ac_160_cfg, iwl9560_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x003C, iwl9560_2ac_160_cfg, iwl9560_160_name),
|
||||
IWL_DEV_INFO(0x2526, 0x4030, iwl9560_2ac_160_cfg, iwl9560_160_name),
|
||||
#endif /* CONFIG_IWLMVM */
|
||||
};
|
||||
|
||||
|
@ -1028,13 +975,29 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
/* the trans_cfg should never change, so set it now */
|
||||
iwl_trans->trans_cfg = trans;
|
||||
|
||||
iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(iwl_dev_info_table); i++) {
|
||||
const struct iwl_dev_info *dev_info = &iwl_dev_info_table[i];
|
||||
|
||||
if ((dev_info->device == IWL_CFG_ANY ||
|
||||
if ((dev_info->device == (u16)IWL_CFG_ANY ||
|
||||
dev_info->device == pdev->device) &&
|
||||
(dev_info->subdevice == IWL_CFG_ANY ||
|
||||
dev_info->subdevice == pdev->subsystem_device)) {
|
||||
(dev_info->subdevice == (u16)IWL_CFG_ANY ||
|
||||
dev_info->subdevice == pdev->subsystem_device) &&
|
||||
(dev_info->mac_type == (u16)IWL_CFG_ANY ||
|
||||
dev_info->mac_type ==
|
||||
CSR_HW_REV_TYPE(iwl_trans->hw_rev)) &&
|
||||
(dev_info->rf_type == (u16)IWL_CFG_ANY ||
|
||||
dev_info->rf_type ==
|
||||
CSR_HW_RFID_TYPE(iwl_trans->hw_rf_id)) &&
|
||||
(dev_info->rf_id == (u8)IWL_CFG_ANY ||
|
||||
dev_info->rf_id ==
|
||||
IWL_SUBDEVICE_RF_ID(pdev->subsystem_device)) &&
|
||||
(dev_info->no_160 == (u8)IWL_CFG_ANY ||
|
||||
dev_info->no_160 ==
|
||||
IWL_SUBDEVICE_NO_160(pdev->subsystem_device)) &&
|
||||
(dev_info->cores == (u8)IWL_CFG_ANY ||
|
||||
dev_info->cores ==
|
||||
IWL_SUBDEVICE_CORES(pdev->subsystem_device))) {
|
||||
iwl_trans->cfg = dev_info->cfg;
|
||||
iwl_trans->name = dev_info->name;
|
||||
goto found;
|
||||
|
@ -1059,8 +1022,6 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
(iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D)
|
||||
iwl_trans->cfg = cfg_7265d;
|
||||
|
||||
iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
|
||||
|
||||
if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
|
||||
if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_TY) {
|
||||
iwl_trans->cfg = &iwlax210_2ax_cfg_ty_gf_a0;
|
||||
|
|
|
@ -322,7 +322,7 @@ struct prism2_download_param {
|
|||
u32 addr; /* wlan card address */
|
||||
u32 len;
|
||||
void __user *ptr; /* pointer to data in user space */
|
||||
} data[0];
|
||||
} data[];
|
||||
};
|
||||
|
||||
#define PRISM2_MAX_DOWNLOAD_AREA_LEN 131072
|
||||
|
|
|
@ -615,7 +615,7 @@ struct prism2_download_data {
|
|||
u32 addr; /* wlan card address */
|
||||
u32 len;
|
||||
u8 *data; /* allocated data */
|
||||
} data[0];
|
||||
} data[];
|
||||
};
|
||||
|
||||
|
||||
|
|
|
@ -49,7 +49,7 @@ struct orinoco_fw_header {
|
|||
__le32 pdr_offset; /* Offset to PDR data from eof header */
|
||||
__le32 pri_offset; /* Offset to primary plug data */
|
||||
__le32 compat_offset; /* Offset to compatibility data*/
|
||||
char signature[0]; /* FW signature length headersize-20 */
|
||||
char signature[]; /* FW signature length headersize-20 */
|
||||
} __packed;
|
||||
|
||||
/* Check the range of various header entries. Return a pointer to a
|
||||
|
|
|
@ -341,7 +341,7 @@ struct agere_ext_scan_info {
|
|||
__le64 timestamp;
|
||||
__le16 beacon_interval;
|
||||
__le16 capabilities;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
#define HERMES_LINKSTATUS_NOT_CONNECTED (0x0000)
|
||||
|
|
|
@ -64,7 +64,7 @@
|
|||
struct dblock {
|
||||
__le32 addr; /* adapter address where to write the block */
|
||||
__le16 len; /* length of the data only, in bytes */
|
||||
char data[0]; /* data to be written */
|
||||
char data[]; /* data to be written */
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
|
@ -76,7 +76,7 @@ struct pdr {
|
|||
__le32 id; /* record ID */
|
||||
__le32 addr; /* adapter address where to write the data */
|
||||
__le32 len; /* expected length of the data, in bytes */
|
||||
char next[0]; /* next PDR starts here */
|
||||
char next[]; /* next PDR starts here */
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
|
@ -87,7 +87,7 @@ struct pdr {
|
|||
struct pdi {
|
||||
__le16 len; /* length of ID and data, in words */
|
||||
__le16 id; /* record ID */
|
||||
char data[0]; /* plug data */
|
||||
char data[]; /* plug data */
|
||||
} __packed;
|
||||
|
||||
/*** FW data block access functions ***/
|
||||
|
|
|
@ -202,7 +202,7 @@ struct ezusb_packet {
|
|||
__le16 crc; /* CRC up to here */
|
||||
__le16 hermes_len;
|
||||
__le16 hermes_rid;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
/* Table of devices that work or may work with this driver */
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
struct pda_entry {
|
||||
__le16 len; /* includes both code and data */
|
||||
__le16 code;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
struct eeprom_pda_wrap {
|
||||
|
@ -32,7 +32,7 @@ struct eeprom_pda_wrap {
|
|||
__le16 pad;
|
||||
__le16 len;
|
||||
__le32 arm_opcode;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
struct p54_iq_autocal_entry {
|
||||
|
@ -87,7 +87,7 @@ struct pda_pa_curve_data {
|
|||
u8 channels;
|
||||
u8 points_per_channel;
|
||||
u8 padding;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
struct pda_rssi_cal_ext_entry {
|
||||
|
@ -119,7 +119,7 @@ struct pda_custom_wrapper {
|
|||
__le16 entry_size;
|
||||
__le16 offset;
|
||||
__le16 len;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
|
|
|
@ -81,7 +81,7 @@ struct p54_hdr {
|
|||
__le16 type; /* enum p54_control_frame_types */
|
||||
u8 rts_tries;
|
||||
u8 tries;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
#define GET_REQ_ID(skb) \
|
||||
|
@ -176,7 +176,7 @@ struct p54_rx_data {
|
|||
u8 rssi_raw;
|
||||
__le32 tsf32;
|
||||
__le32 unalloc0;
|
||||
u8 align[0];
|
||||
u8 align[];
|
||||
} __packed;
|
||||
|
||||
enum p54_trap_type {
|
||||
|
@ -267,7 +267,7 @@ struct p54_tx_data {
|
|||
} __packed normal;
|
||||
} __packed;
|
||||
u8 unalloc2[2];
|
||||
u8 align[0];
|
||||
u8 align[];
|
||||
} __packed;
|
||||
|
||||
/* unit is ms */
|
||||
|
|
|
@ -126,7 +126,7 @@ struct p54_cal_database {
|
|||
size_t entry_size;
|
||||
size_t offset;
|
||||
size_t len;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
};
|
||||
|
||||
#define EEPROM_READBACK_LEN 0x3fc
|
||||
|
|
|
@ -780,17 +780,17 @@ mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
|
|||
{
|
||||
switch (isl_oid[n].flags & OID_FLAG_TYPE) {
|
||||
case OID_TYPE_U32:
|
||||
return snprintf(str, PRIV_STR_SIZE, "%u\n", r->u);
|
||||
return scnprintf(str, PRIV_STR_SIZE, "%u\n", r->u);
|
||||
case OID_TYPE_BUFFER:{
|
||||
struct obj_buffer *buff = r->ptr;
|
||||
return snprintf(str, PRIV_STR_SIZE,
|
||||
return scnprintf(str, PRIV_STR_SIZE,
|
||||
"size=%u\naddr=0x%X\n", buff->size,
|
||||
buff->addr);
|
||||
}
|
||||
break;
|
||||
case OID_TYPE_BSS:{
|
||||
struct obj_bss *bss = r->ptr;
|
||||
return snprintf(str, PRIV_STR_SIZE,
|
||||
return scnprintf(str, PRIV_STR_SIZE,
|
||||
"age=%u\nchannel=%u\n"
|
||||
"capinfo=0x%X\nrates=0x%X\n"
|
||||
"basic_rates=0x%X\n", bss->age,
|
||||
|
@ -801,9 +801,9 @@ mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
|
|||
case OID_TYPE_BSSLIST:{
|
||||
struct obj_bsslist *list = r->ptr;
|
||||
int i, k;
|
||||
k = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", list->nr);
|
||||
k = scnprintf(str, PRIV_STR_SIZE, "nr=%u\n", list->nr);
|
||||
for (i = 0; i < list->nr; i++)
|
||||
k += snprintf(str + k, PRIV_STR_SIZE - k,
|
||||
k += scnprintf(str + k, PRIV_STR_SIZE - k,
|
||||
"bss[%u] :\nage=%u\nchannel=%u\n"
|
||||
"capinfo=0x%X\nrates=0x%X\n"
|
||||
"basic_rates=0x%X\n",
|
||||
|
@ -819,23 +819,23 @@ mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
|
|||
struct obj_frequencies *freq = r->ptr;
|
||||
int i, t;
|
||||
printk("nr : %u\n", freq->nr);
|
||||
t = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", freq->nr);
|
||||
t = scnprintf(str, PRIV_STR_SIZE, "nr=%u\n", freq->nr);
|
||||
for (i = 0; i < freq->nr; i++)
|
||||
t += snprintf(str + t, PRIV_STR_SIZE - t,
|
||||
t += scnprintf(str + t, PRIV_STR_SIZE - t,
|
||||
"mhz[%u]=%u\n", i, freq->mhz[i]);
|
||||
return t;
|
||||
}
|
||||
break;
|
||||
case OID_TYPE_MLME:{
|
||||
struct obj_mlme *mlme = r->ptr;
|
||||
return snprintf(str, PRIV_STR_SIZE,
|
||||
return scnprintf(str, PRIV_STR_SIZE,
|
||||
"id=0x%X\nstate=0x%X\ncode=0x%X\n",
|
||||
mlme->id, mlme->state, mlme->code);
|
||||
}
|
||||
break;
|
||||
case OID_TYPE_MLMEEX:{
|
||||
struct obj_mlmeex *mlme = r->ptr;
|
||||
return snprintf(str, PRIV_STR_SIZE,
|
||||
return scnprintf(str, PRIV_STR_SIZE,
|
||||
"id=0x%X\nstate=0x%X\n"
|
||||
"code=0x%X\nsize=0x%X\n", mlme->id,
|
||||
mlme->state, mlme->code, mlme->size);
|
||||
|
@ -843,7 +843,7 @@ mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
|
|||
break;
|
||||
case OID_TYPE_ATTACH:{
|
||||
struct obj_attachment *attach = r->ptr;
|
||||
return snprintf(str, PRIV_STR_SIZE,
|
||||
return scnprintf(str, PRIV_STR_SIZE,
|
||||
"id=%d\nsize=%d\n",
|
||||
attach->id,
|
||||
attach->size);
|
||||
|
@ -851,7 +851,7 @@ mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
|
|||
break;
|
||||
case OID_TYPE_SSID:{
|
||||
struct obj_ssid *ssid = r->ptr;
|
||||
return snprintf(str, PRIV_STR_SIZE,
|
||||
return scnprintf(str, PRIV_STR_SIZE,
|
||||
"length=%u\noctets=%.*s\n",
|
||||
ssid->length, ssid->length,
|
||||
ssid->octets);
|
||||
|
@ -860,13 +860,13 @@ mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
|
|||
case OID_TYPE_KEY:{
|
||||
struct obj_key *key = r->ptr;
|
||||
int t, i;
|
||||
t = snprintf(str, PRIV_STR_SIZE,
|
||||
t = scnprintf(str, PRIV_STR_SIZE,
|
||||
"type=0x%X\nlength=0x%X\nkey=0x",
|
||||
key->type, key->length);
|
||||
for (i = 0; i < key->length; i++)
|
||||
t += snprintf(str + t, PRIV_STR_SIZE - t,
|
||||
t += scnprintf(str + t, PRIV_STR_SIZE - t,
|
||||
"%02X:", key->key[i]);
|
||||
t += snprintf(str + t, PRIV_STR_SIZE - t, "\n");
|
||||
t += scnprintf(str + t, PRIV_STR_SIZE - t, "\n");
|
||||
return t;
|
||||
}
|
||||
break;
|
||||
|
@ -874,11 +874,11 @@ mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
|
|||
case OID_TYPE_ADDR:{
|
||||
unsigned char *buff = r->ptr;
|
||||
int t, i;
|
||||
t = snprintf(str, PRIV_STR_SIZE, "hex data=");
|
||||
t = scnprintf(str, PRIV_STR_SIZE, "hex data=");
|
||||
for (i = 0; i < isl_oid[n].size; i++)
|
||||
t += snprintf(str + t, PRIV_STR_SIZE - t,
|
||||
t += scnprintf(str + t, PRIV_STR_SIZE - t,
|
||||
"%02X:", buff[i]);
|
||||
t += snprintf(str + t, PRIV_STR_SIZE - t, "\n");
|
||||
t += scnprintf(str + t, PRIV_STR_SIZE - t, "\n");
|
||||
return t;
|
||||
}
|
||||
break;
|
||||
|
|
|
@ -461,7 +461,7 @@ struct cmd_ds_802_11_scan {
|
|||
|
||||
uint8_t bsstype;
|
||||
uint8_t bssid[ETH_ALEN];
|
||||
uint8_t tlvbuffer[0];
|
||||
uint8_t tlvbuffer[];
|
||||
} __packed;
|
||||
|
||||
struct cmd_ds_802_11_scan_rsp {
|
||||
|
@ -469,7 +469,7 @@ struct cmd_ds_802_11_scan_rsp {
|
|||
|
||||
__le16 bssdescriptsize;
|
||||
uint8_t nr_sets;
|
||||
uint8_t bssdesc_and_tlvbuffer[0];
|
||||
uint8_t bssdesc_and_tlvbuffer[];
|
||||
} __packed;
|
||||
|
||||
struct cmd_ds_802_11_get_log {
|
||||
|
|
|
@ -103,7 +103,7 @@ MODULE_FIRMWARE("sd8688.bin");
|
|||
struct if_sdio_packet {
|
||||
struct if_sdio_packet *next;
|
||||
u16 nb;
|
||||
u8 buffer[0] __attribute__((aligned(4)));
|
||||
u8 buffer[] __aligned(4);
|
||||
};
|
||||
|
||||
struct if_sdio_card {
|
||||
|
|
|
@ -35,7 +35,7 @@
|
|||
struct if_spi_packet {
|
||||
struct list_head list;
|
||||
u16 blen;
|
||||
u8 buffer[0] __attribute__((aligned(4)));
|
||||
u8 buffer[] __aligned(4);
|
||||
};
|
||||
|
||||
struct if_spi_card {
|
||||
|
@ -235,8 +235,9 @@ static int spu_read(struct if_spi_card *card, u16 reg, u8 *buf, int len)
|
|||
spi_message_add_tail(&dummy_trans, &m);
|
||||
} else {
|
||||
/* Busy-wait while the SPU fills the FIFO */
|
||||
reg_trans.delay_usecs =
|
||||
reg_trans.delay.value =
|
||||
DIV_ROUND_UP((100 + (delay * 10)), 1000);
|
||||
reg_trans.delay.unit = SPI_DELAY_UNIT_USECS;
|
||||
}
|
||||
|
||||
/* read in data */
|
||||
|
|
|
@ -91,7 +91,7 @@ struct fwheader {
|
|||
struct fwdata {
|
||||
struct fwheader hdr;
|
||||
__le32 seqnum;
|
||||
uint8_t data[0];
|
||||
uint8_t data[];
|
||||
};
|
||||
|
||||
/* fwsyncheader */
|
||||
|
|
|
@ -81,7 +81,7 @@ struct fwheader {
|
|||
struct fwdata {
|
||||
struct fwheader hdr;
|
||||
__le32 seqnum;
|
||||
uint8_t data[0];
|
||||
uint8_t data[];
|
||||
};
|
||||
|
||||
/** fwsyncheader */
|
||||
|
|
|
@ -3052,7 +3052,7 @@ struct wireless_dev *mwifiex_add_virtual_intf(struct wiphy *wiphy,
|
|||
|
||||
dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
|
||||
dev->watchdog_timeo = MWIFIEX_DEFAULT_WATCHDOG_TIMEOUT;
|
||||
dev->hard_header_len += MWIFIEX_MIN_DATA_HEADER_LEN;
|
||||
dev->needed_headroom = MWIFIEX_MIN_DATA_HEADER_LEN;
|
||||
dev->ethtool_ops = &mwifiex_ethtool_ops;
|
||||
|
||||
mdev_priv = netdev_priv(dev);
|
||||
|
|
|
@ -846,7 +846,7 @@ struct mwifiex_ie_types_random_mac {
|
|||
|
||||
struct mwifiex_ietypes_chanstats {
|
||||
struct mwifiex_ie_types_header header;
|
||||
struct mwifiex_fw_chan_stats chanstats[0];
|
||||
struct mwifiex_fw_chan_stats chanstats[];
|
||||
} __packed;
|
||||
|
||||
struct mwifiex_ie_types_wildcard_ssid_params {
|
||||
|
@ -1082,7 +1082,7 @@ struct host_cmd_ds_get_hw_spec {
|
|||
__le32 reserved_6;
|
||||
__le32 dot_11ac_dev_cap;
|
||||
__le32 dot_11ac_mcs_support;
|
||||
u8 tlvs[0];
|
||||
u8 tlvs[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_802_11_rssi_info {
|
||||
|
@ -1140,7 +1140,7 @@ struct ieee_types_assoc_rsp {
|
|||
__le16 cap_info_bitmap;
|
||||
__le16 status_code;
|
||||
__le16 a_id;
|
||||
u8 ie_buffer[0];
|
||||
u8 ie_buffer[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_802_11_associate_rsp {
|
||||
|
@ -1455,7 +1455,7 @@ struct host_cmd_ds_chan_rpt_event {
|
|||
__le32 result;
|
||||
__le64 start_tsf;
|
||||
__le32 duration;
|
||||
u8 tlvbuf[0];
|
||||
u8 tlvbuf[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_sdio_sp_rx_aggr_cfg {
|
||||
|
@ -1625,7 +1625,7 @@ struct host_cmd_ds_802_11_bg_scan_config {
|
|||
__le32 reserved2;
|
||||
__le32 report_condition;
|
||||
__le16 reserved3;
|
||||
u8 tlv[0];
|
||||
u8 tlv[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_802_11_bg_scan_query {
|
||||
|
@ -1720,7 +1720,7 @@ struct mwifiex_ie_types_sta_info {
|
|||
|
||||
struct host_cmd_ds_sta_list {
|
||||
__le16 sta_count;
|
||||
u8 tlv[0];
|
||||
u8 tlv[];
|
||||
} __packed;
|
||||
|
||||
struct mwifiex_ie_types_pwr_capability {
|
||||
|
@ -1743,7 +1743,7 @@ struct mwifiex_ie_types_wmm_param_set {
|
|||
struct mwifiex_ie_types_mgmt_frame {
|
||||
struct mwifiex_ie_types_header header;
|
||||
__le16 frame_control;
|
||||
u8 frame_contents[0];
|
||||
u8 frame_contents[];
|
||||
};
|
||||
|
||||
struct mwifiex_ie_types_wmm_queue_status {
|
||||
|
@ -1861,7 +1861,7 @@ struct mwifiex_ie_types_2040bssco {
|
|||
|
||||
struct mwifiex_ie_types_extcap {
|
||||
struct mwifiex_ie_types_header header;
|
||||
u8 ext_capab[0];
|
||||
u8 ext_capab[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_mem_access {
|
||||
|
@ -1918,12 +1918,12 @@ struct mwifiex_assoc_event {
|
|||
__le16 frame_control;
|
||||
__le16 cap_info;
|
||||
__le16 listen_interval;
|
||||
u8 data[0];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_sys_config {
|
||||
__le16 action;
|
||||
u8 tlv[0];
|
||||
u8 tlv[];
|
||||
};
|
||||
|
||||
struct host_cmd_11ac_vht_cfg {
|
||||
|
@ -1956,7 +1956,7 @@ struct host_cmd_tlv_gwk_cipher {
|
|||
|
||||
struct host_cmd_tlv_passphrase {
|
||||
struct mwifiex_ie_types_header header;
|
||||
u8 passphrase[0];
|
||||
u8 passphrase[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_tlv_wep_key {
|
||||
|
@ -1978,12 +1978,12 @@ struct host_cmd_tlv_encrypt_protocol {
|
|||
|
||||
struct host_cmd_tlv_ssid {
|
||||
struct mwifiex_ie_types_header header;
|
||||
u8 ssid[0];
|
||||
u8 ssid[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_tlv_rates {
|
||||
struct mwifiex_ie_types_header header;
|
||||
u8 rates[0];
|
||||
u8 rates[];
|
||||
} __packed;
|
||||
|
||||
struct mwifiex_ie_types_bssid_list {
|
||||
|
@ -2100,13 +2100,13 @@ struct mwifiex_fw_mef_entry {
|
|||
u8 mode;
|
||||
u8 action;
|
||||
__le16 exprsize;
|
||||
u8 expr[0];
|
||||
u8 expr[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_mef_cfg {
|
||||
__le32 criteria;
|
||||
__le16 num_entries;
|
||||
struct mwifiex_fw_mef_entry mef_entry[0];
|
||||
struct mwifiex_fw_mef_entry mef_entry[];
|
||||
} __packed;
|
||||
|
||||
#define CONNECTION_TYPE_INFRA 0
|
||||
|
@ -2169,7 +2169,7 @@ struct mwifiex_radar_det_event {
|
|||
struct mwifiex_ie_types_multi_chan_info {
|
||||
struct mwifiex_ie_types_header header;
|
||||
__le16 status;
|
||||
u8 tlv_buffer[0];
|
||||
u8 tlv_buffer[];
|
||||
} __packed;
|
||||
|
||||
struct mwifiex_ie_types_mc_group_info {
|
||||
|
@ -2185,7 +2185,7 @@ struct mwifiex_ie_types_mc_group_info {
|
|||
u8 usb_ep_num;
|
||||
} hid_num;
|
||||
u8 intf_num;
|
||||
u8 bss_type_numlist[0];
|
||||
u8 bss_type_numlist[];
|
||||
} __packed;
|
||||
|
||||
struct meas_rpt_map {
|
||||
|
@ -2250,13 +2250,13 @@ struct coalesce_receive_filt_rule {
|
|||
u8 num_of_fields;
|
||||
u8 pkt_type;
|
||||
__le16 max_coalescing_delay;
|
||||
struct coalesce_filt_field_param params[0];
|
||||
struct coalesce_filt_field_param params[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_coalesce_cfg {
|
||||
__le16 action;
|
||||
__le16 num_of_rules;
|
||||
struct coalesce_receive_filt_rule rule[0];
|
||||
struct coalesce_receive_filt_rule rule[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_multi_chan_policy {
|
||||
|
@ -2295,7 +2295,7 @@ struct host_cmd_ds_pkt_aggr_ctrl {
|
|||
|
||||
struct host_cmd_ds_sta_configure {
|
||||
__le16 action;
|
||||
u8 tlv_buffer[0];
|
||||
u8 tlv_buffer[];
|
||||
} __packed;
|
||||
|
||||
struct host_cmd_ds_command {
|
||||
|
|
|
@ -592,7 +592,7 @@ struct mwl8k_cmd_pkt {
|
|||
__u8 seq_num;
|
||||
__u8 macid;
|
||||
__le16 result;
|
||||
char payload[0];
|
||||
char payload[];
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
|
@ -806,7 +806,7 @@ static int mwl8k_load_firmware(struct ieee80211_hw *hw)
|
|||
struct mwl8k_dma_data {
|
||||
__le16 fwlen;
|
||||
struct ieee80211_hdr wh;
|
||||
char data[0];
|
||||
char data[];
|
||||
} __packed;
|
||||
|
||||
/* Routines to add/remove DMA header from skb. */
|
||||
|
@ -2955,7 +2955,7 @@ mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
|
|||
struct mwl8k_cmd_set_beacon {
|
||||
struct mwl8k_cmd_pkt header;
|
||||
__le16 beacon_len;
|
||||
__u8 beacon[0];
|
||||
__u8 beacon[];
|
||||
};
|
||||
|
||||
static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
|
||||
|
|
|
@ -9,14 +9,16 @@ struct sk_buff *
|
|||
mt76_mcu_msg_alloc(const void *data, int head_len,
|
||||
int data_len, int tail_len)
|
||||
{
|
||||
int length = head_len + data_len + tail_len;
|
||||
struct sk_buff *skb;
|
||||
|
||||
skb = alloc_skb(head_len + data_len + tail_len,
|
||||
GFP_KERNEL);
|
||||
skb = alloc_skb(length, GFP_KERNEL);
|
||||
if (!skb)
|
||||
return NULL;
|
||||
|
||||
memset(skb->head, 0, length);
|
||||
skb_reserve(skb, head_len);
|
||||
|
||||
if (data && data_len)
|
||||
skb_put_data(skb, data, data_len);
|
||||
|
||||
|
|
|
@ -139,6 +139,8 @@ struct mt76_sw_queue {
|
|||
struct mt76_mcu_ops {
|
||||
int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data,
|
||||
int len, bool wait_resp);
|
||||
int (*mcu_skb_send_msg)(struct mt76_dev *dev, struct sk_buff *skb,
|
||||
int cmd, bool wait_resp);
|
||||
int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base,
|
||||
const struct mt76_reg_pair *rp, int len);
|
||||
int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base,
|
||||
|
@ -403,7 +405,6 @@ struct mt76_mcu {
|
|||
#define MCU_RESP_URB_SIZE 1024
|
||||
struct mt76_usb {
|
||||
struct mutex usb_ctrl_mtx;
|
||||
__le32 reg_val;
|
||||
u8 *data;
|
||||
u16 data_len;
|
||||
|
||||
|
@ -589,7 +590,9 @@ enum mt76_phy_type {
|
|||
#define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__)
|
||||
|
||||
#define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__)
|
||||
|
||||
#define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__)
|
||||
#define __mt76_mcu_skb_send_msg(dev, ...) (dev)->mcu_ops->mcu_skb_send_msg((dev), __VA_ARGS__)
|
||||
#define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76))
|
||||
#define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev))
|
||||
|
||||
|
|
|
@ -121,4 +121,8 @@ void mt7603_init_debugfs(struct mt7603_dev *dev)
|
|||
mt7603_reset_read);
|
||||
debugfs_create_devm_seqfile(dev->mt76.dev, "radio", dir,
|
||||
mt7603_radio_read);
|
||||
debugfs_create_u8("sensitivity_limit", 0600, dir,
|
||||
&dev->sensitivity_limit);
|
||||
debugfs_create_bool("dynamic_sensitivity", 0600, dir,
|
||||
&dev->dynamic_sensitivity);
|
||||
}
|
||||
|
|
|
@ -540,6 +540,8 @@ int mt7603_register_device(struct mt7603_dev *dev)
|
|||
dev->mphy.antenna_mask = 1;
|
||||
|
||||
dev->slottime = 9;
|
||||
dev->sensitivity_limit = 28;
|
||||
dev->dynamic_sensitivity = true;
|
||||
|
||||
ret = mt7603_init_hardware(dev);
|
||||
if (ret)
|
||||
|
|
|
@ -1727,6 +1727,9 @@ mt7603_false_cca_check(struct mt7603_dev *dev)
|
|||
int min_signal;
|
||||
u32 val;
|
||||
|
||||
if (!dev->dynamic_sensitivity)
|
||||
return;
|
||||
|
||||
val = mt76_rr(dev, MT_PHYCTRL_STAT_PD);
|
||||
pd_cck = FIELD_GET(MT_PHYCTRL_STAT_PD_CCK, val);
|
||||
pd_ofdm = FIELD_GET(MT_PHYCTRL_STAT_PD_OFDM, val);
|
||||
|
@ -1750,7 +1753,8 @@ mt7603_false_cca_check(struct mt7603_dev *dev)
|
|||
min_signal -= 15;
|
||||
|
||||
false_cca = dev->false_cca_ofdm + dev->false_cca_cck;
|
||||
if (false_cca > 600) {
|
||||
if (false_cca > 600 &&
|
||||
dev->sensitivity < -100 + dev->sensitivity_limit) {
|
||||
if (!dev->sensitivity)
|
||||
dev->sensitivity = -92;
|
||||
else
|
||||
|
|
|
@ -27,7 +27,6 @@ __mt7603_mcu_msg_send(struct mt7603_dev *dev, struct sk_buff *skb,
|
|||
seq = ++mdev->mcu.msg_seq & 0xf;
|
||||
|
||||
txd = (struct mt7603_mcu_txd *)skb_push(skb, hdrlen);
|
||||
memset(txd, 0, hdrlen);
|
||||
|
||||
txd->len = cpu_to_le16(skb->len);
|
||||
if (cmd == -MCU_CMD_FW_SCATTER)
|
||||
|
|
|
@ -142,7 +142,9 @@ struct mt7603_dev {
|
|||
u8 ed_strict_mode;
|
||||
u8 ed_strong_signal;
|
||||
|
||||
bool dynamic_sensitivity;
|
||||
s8 sensitivity;
|
||||
u8 sensitivity_limit;
|
||||
|
||||
u8 beacon_check;
|
||||
u8 tx_hang_check;
|
||||
|
|
|
@ -101,8 +101,12 @@ void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
|
|||
__le32 *rxd = (__le32 *)skb->data;
|
||||
__le32 *end = (__le32 *)&skb->data[skb->len];
|
||||
enum rx_pkt_type type;
|
||||
u16 flag;
|
||||
|
||||
type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0]));
|
||||
flag = FIELD_GET(MT_RXD0_PKT_FLAG, le32_to_cpu(rxd[0]));
|
||||
if (type == PKT_TYPE_RX_EVENT && flag == 0x1)
|
||||
type = PKT_TYPE_NORMAL_MCU;
|
||||
|
||||
switch (type) {
|
||||
case PKT_TYPE_TXS:
|
||||
|
@ -116,6 +120,7 @@ void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
|
|||
case PKT_TYPE_RX_EVENT:
|
||||
mt7615_mcu_rx_event(dev, skb);
|
||||
break;
|
||||
case PKT_TYPE_NORMAL_MCU:
|
||||
case PKT_TYPE_NORMAL:
|
||||
if (!mt7615_mac_fill_rx(dev, skb)) {
|
||||
mt76_rx(&dev->mt76, q, skb);
|
||||
|
@ -186,6 +191,41 @@ static void mt7622_dma_sched_init(struct mt7615_dev *dev)
|
|||
mt76_wr(dev, reg + MT_DMASHDL_SCHED_SET1, 0xedcba987);
|
||||
}
|
||||
|
||||
static void mt7663_dma_sched_init(struct mt7615_dev *dev)
|
||||
{
|
||||
int i;
|
||||
|
||||
mt76_rmw(dev, MT_DMA_SHDL(MT_DMASHDL_PKT_MAX_SIZE),
|
||||
MT_DMASHDL_PKT_MAX_SIZE_PLE | MT_DMASHDL_PKT_MAX_SIZE_PSE,
|
||||
FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |
|
||||
FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8));
|
||||
|
||||
/* enable refill control group 0, 1, 2, 4, 5 */
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffc80000);
|
||||
/* enable group 0, 1, 2, 4, 5, 15 */
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x70068037);
|
||||
|
||||
/* each group min quota must larger then PLE_PKT_MAX_SIZE_NUM */
|
||||
for (i = 0; i < 5; i++)
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)),
|
||||
FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x40) |
|
||||
FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x800));
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(5)),
|
||||
FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x40) |
|
||||
FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x40));
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(15)),
|
||||
FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x20) |
|
||||
FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x20));
|
||||
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210);
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210);
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x00050005);
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(3)), 0);
|
||||
/* ALTX0 and ALTX1 QID mapping to group 5 */
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET0), 0x6012345f);
|
||||
mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET1), 0xedcba987);
|
||||
}
|
||||
|
||||
int mt7615_dma_init(struct mt7615_dev *dev)
|
||||
{
|
||||
int rx_ring_size = MT7615_RX_RING_SIZE;
|
||||
|
@ -198,10 +238,6 @@ int mt7615_dma_init(struct mt7615_dev *dev)
|
|||
MT_WPDMA_GLO_CFG_FIFO_LITTLE_ENDIAN |
|
||||
MT_WPDMA_GLO_CFG_OMIT_TX_INFO);
|
||||
|
||||
if (!is_mt7622(&dev->mt76))
|
||||
mt76_set(dev, MT_WPDMA_GLO_CFG,
|
||||
MT_WPDMA_GLO_CFG_FIRST_TOKEN_ONLY);
|
||||
|
||||
mt76_rmw_field(dev, MT_WPDMA_GLO_CFG,
|
||||
MT_WPDMA_GLO_CFG_TX_BT_SIZE_BIT0, 0x1);
|
||||
|
||||
|
@ -215,6 +251,9 @@ int mt7615_dma_init(struct mt7615_dev *dev)
|
|||
MT_WPDMA_GLO_CFG_MULTI_DMA_EN, 0x3);
|
||||
|
||||
if (is_mt7615(&dev->mt76)) {
|
||||
mt76_set(dev, MT_WPDMA_GLO_CFG,
|
||||
MT_WPDMA_GLO_CFG_FIRST_TOKEN_ONLY);
|
||||
|
||||
mt76_wr(dev, MT_WPDMA_GLO_CFG1, 0x1);
|
||||
mt76_wr(dev, MT_WPDMA_TX_PRE_CFG, 0xf0000);
|
||||
mt76_wr(dev, MT_WPDMA_RX_PRE_CFG, 0xf7f0000);
|
||||
|
@ -271,6 +310,9 @@ int mt7615_dma_init(struct mt7615_dev *dev)
|
|||
if (is_mt7622(&dev->mt76))
|
||||
mt7622_dma_sched_init(dev);
|
||||
|
||||
if (is_mt7663(&dev->mt76))
|
||||
mt7663_dma_sched_init(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -91,11 +91,23 @@ static int mt7615_check_eeprom(struct mt76_dev *dev)
|
|||
}
|
||||
}
|
||||
|
||||
static void mt7615_eeprom_parse_hw_cap(struct mt7615_dev *dev)
|
||||
static void
|
||||
mt7615_eeprom_parse_hw_band_cap(struct mt7615_dev *dev)
|
||||
{
|
||||
u8 *eeprom = dev->mt76.eeprom.data;
|
||||
u8 tx_mask, max_nss;
|
||||
u32 val;
|
||||
u8 val, *eeprom = dev->mt76.eeprom.data;
|
||||
|
||||
if (is_mt7663(&dev->mt76)) {
|
||||
/* dual band */
|
||||
dev->mt76.cap.has_2ghz = true;
|
||||
dev->mt76.cap.has_5ghz = true;
|
||||
return;
|
||||
}
|
||||
|
||||
if (is_mt7622(&dev->mt76)) {
|
||||
/* 2GHz only */
|
||||
dev->mt76.cap.has_2ghz = true;
|
||||
return;
|
||||
}
|
||||
|
||||
val = FIELD_GET(MT_EE_NIC_WIFI_CONF_BAND_SEL,
|
||||
eeprom[MT_EE_WIFI_CONF]);
|
||||
|
@ -111,18 +123,30 @@ static void mt7615_eeprom_parse_hw_cap(struct mt7615_dev *dev)
|
|||
dev->mt76.cap.has_5ghz = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (is_mt7622(&dev->mt76))
|
||||
dev->mt76.cap.has_5ghz = false;
|
||||
static void mt7615_eeprom_parse_hw_cap(struct mt7615_dev *dev)
|
||||
{
|
||||
u8 *eeprom = dev->mt76.eeprom.data;
|
||||
u8 tx_mask;
|
||||
|
||||
/* read tx-rx mask from eeprom */
|
||||
val = mt76_rr(dev, MT_TOP_STRAP_STA);
|
||||
max_nss = val & MT_TOP_3NSS ? 3 : 4;
|
||||
mt7615_eeprom_parse_hw_band_cap(dev);
|
||||
|
||||
tx_mask = FIELD_GET(MT_EE_NIC_CONF_TX_MASK,
|
||||
eeprom[MT_EE_NIC_CONF_0]);
|
||||
if (!tx_mask || tx_mask > max_nss)
|
||||
tx_mask = max_nss;
|
||||
if (is_mt7663(&dev->mt76)) {
|
||||
tx_mask = 2;
|
||||
} else {
|
||||
u8 max_nss;
|
||||
u32 val;
|
||||
|
||||
/* read tx-rx mask from eeprom */
|
||||
val = mt76_rr(dev, MT_TOP_STRAP_STA);
|
||||
max_nss = val & MT_TOP_3NSS ? 3 : 4;
|
||||
|
||||
tx_mask = FIELD_GET(MT_EE_NIC_CONF_TX_MASK,
|
||||
eeprom[MT_EE_NIC_CONF_0]);
|
||||
if (!tx_mask || tx_mask > max_nss)
|
||||
tx_mask = max_nss;
|
||||
}
|
||||
|
||||
dev->chainmask = BIT(tx_mask) - 1;
|
||||
dev->mphy.antenna_mask = dev->chainmask;
|
||||
|
@ -229,6 +253,18 @@ static void mt7622_apply_cal_free_data(struct mt7615_dev *dev)
|
|||
}
|
||||
}
|
||||
|
||||
static void mt7615_cal_free_data(struct mt7615_dev *dev)
|
||||
{
|
||||
switch (mt76_chip(&dev->mt76)) {
|
||||
case 0x7622:
|
||||
mt7622_apply_cal_free_data(dev);
|
||||
break;
|
||||
case 0x7615:
|
||||
mt7615_apply_cal_free_data(dev);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int mt7615_eeprom_init(struct mt7615_dev *dev)
|
||||
{
|
||||
int ret;
|
||||
|
@ -241,10 +277,8 @@ int mt7615_eeprom_init(struct mt7615_dev *dev)
|
|||
if (ret && dev->mt76.otp.data)
|
||||
memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data,
|
||||
MT7615_EEPROM_SIZE);
|
||||
else if (is_mt7622(&dev->mt76))
|
||||
mt7622_apply_cal_free_data(dev);
|
||||
else
|
||||
mt7615_apply_cal_free_data(dev);
|
||||
mt7615_cal_free_data(dev);
|
||||
|
||||
mt7615_eeprom_parse_hw_cap(dev);
|
||||
memcpy(dev->mt76.macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
|
||||
|
|
|
@ -18,11 +18,13 @@ enum mt7615_eeprom_field {
|
|||
MT_EE_TX1_5G_G0_TARGET_POWER = 0x098,
|
||||
MT_EE_EXT_PA_2G_TARGET_POWER = 0x0f2,
|
||||
MT_EE_EXT_PA_5G_TARGET_POWER = 0x0f3,
|
||||
MT7663_EE_TX0_2G_TARGET_POWER = 0x123,
|
||||
MT_EE_TX2_5G_G0_TARGET_POWER = 0x142,
|
||||
MT_EE_TX3_5G_G0_TARGET_POWER = 0x16a,
|
||||
|
||||
MT7615_EE_MAX = 0x3bf,
|
||||
MT7622_EE_MAX = 0x3db,
|
||||
MT7663_EE_MAX = 0x400,
|
||||
};
|
||||
|
||||
#define MT_EE_NIC_CONF_TX_MASK GENMASK(7, 4)
|
||||
|
|
|
@ -4,6 +4,7 @@
|
|||
* Author: Roy Luo <royluo@google.com>
|
||||
* Ryder Lee <ryder.lee@mediatek.com>
|
||||
* Felix Fietkau <nbd@nbd.name>
|
||||
* Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
*/
|
||||
|
||||
#include <linux/etherdevice.h>
|
||||
|
@ -18,27 +19,65 @@ static void mt7615_phy_init(struct mt7615_dev *dev)
|
|||
mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
|
||||
}
|
||||
|
||||
static void mt7615_mac_init(struct mt7615_dev *dev)
|
||||
static void
|
||||
mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
|
||||
{
|
||||
u32 val, mask, set;
|
||||
int i;
|
||||
|
||||
if (!chain)
|
||||
val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
|
||||
else
|
||||
val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
|
||||
|
||||
/* enable band 0/1 clk */
|
||||
mt76_set(dev, MT_CFG_CCR,
|
||||
MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN |
|
||||
MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN);
|
||||
mt76_set(dev, MT_CFG_CCR, val);
|
||||
|
||||
val = mt76_rmw(dev, MT_TMAC_TRCR(0),
|
||||
MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
|
||||
FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
|
||||
FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
|
||||
mt76_wr(dev, MT_TMAC_TRCR(1), val);
|
||||
mt76_rmw(dev, MT_TMAC_TRCR(chain),
|
||||
MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
|
||||
FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
|
||||
FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
|
||||
|
||||
val = MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
|
||||
FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
|
||||
FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT);
|
||||
mt76_wr(dev, MT_AGG_ACR(0), val);
|
||||
mt76_wr(dev, MT_AGG_ACR(1), val);
|
||||
mt76_wr(dev, MT_AGG_ACR(chain),
|
||||
MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
|
||||
FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
|
||||
FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
|
||||
|
||||
mt76_wr(dev, MT_AGG_ARUCR(chain),
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
|
||||
|
||||
mt76_wr(dev, MT_AGG_ARDCR(chain),
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
|
||||
|
||||
mask = MT_DMA_RCFR0_MCU_RX_MGMT |
|
||||
MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
|
||||
MT_DMA_RCFR0_MCU_RX_CTL_BAR |
|
||||
MT_DMA_RCFR0_MCU_RX_BYPASS |
|
||||
MT_DMA_RCFR0_RX_DROPPED_UCAST |
|
||||
MT_DMA_RCFR0_RX_DROPPED_MCAST;
|
||||
set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
|
||||
FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
|
||||
mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
|
||||
}
|
||||
|
||||
static void mt7615_mac_init(struct mt7615_dev *dev)
|
||||
{
|
||||
int i;
|
||||
|
||||
mt7615_init_mac_chain(dev, 0);
|
||||
|
||||
mt76_rmw_field(dev, MT_TMAC_CTCR0,
|
||||
MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
|
||||
|
@ -56,47 +95,11 @@ static void mt7615_mac_init(struct mt7615_dev *dev)
|
|||
mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
|
||||
MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
|
||||
|
||||
mt76_wr(dev, MT_DMA_DCR0, MT_DMA_DCR0_RX_VEC_DROP |
|
||||
FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072));
|
||||
|
||||
val = FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1);
|
||||
mt76_wr(dev, MT_AGG_ARUCR(0), val);
|
||||
mt76_wr(dev, MT_AGG_ARUCR(1), val);
|
||||
|
||||
val = FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
|
||||
FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1);
|
||||
mt76_wr(dev, MT_AGG_ARDCR(0), val);
|
||||
mt76_wr(dev, MT_AGG_ARDCR(1), val);
|
||||
|
||||
mt76_wr(dev, MT_AGG_ARCR,
|
||||
(FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
|
||||
MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
|
||||
FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
|
||||
FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)));
|
||||
|
||||
mask = MT_DMA_RCFR0_MCU_RX_MGMT |
|
||||
MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
|
||||
MT_DMA_RCFR0_MCU_RX_CTL_BAR |
|
||||
MT_DMA_RCFR0_MCU_RX_BYPASS |
|
||||
MT_DMA_RCFR0_RX_DROPPED_UCAST |
|
||||
MT_DMA_RCFR0_RX_DROPPED_MCAST;
|
||||
set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
|
||||
FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
|
||||
mt76_rmw(dev, MT_DMA_RCFR0(0), mask, set);
|
||||
mt76_rmw(dev, MT_DMA_RCFR0(1), mask, set);
|
||||
FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
|
||||
MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
|
||||
FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
|
||||
FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
|
||||
|
||||
for (i = 0; i < MT7615_WTBL_SIZE; i++)
|
||||
mt7615_mac_wtbl_update(dev, i,
|
||||
|
@ -104,6 +107,19 @@ static void mt7615_mac_init(struct mt7615_dev *dev)
|
|||
|
||||
mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
|
||||
mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
|
||||
|
||||
/* disable hdr translation and hw AMSDU */
|
||||
mt76_wr(dev, MT_DMA_DCR0,
|
||||
FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
|
||||
MT_DMA_DCR0_RX_VEC_DROP);
|
||||
if (is_mt7663(&dev->mt76)) {
|
||||
mt76_wr(dev, MT_CSR(0x010), 0x8208);
|
||||
mt76_wr(dev, 0x44064, 0x2000000);
|
||||
mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
|
||||
mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
|
||||
} else {
|
||||
mt7615_init_mac_chain(dev, 1);
|
||||
}
|
||||
}
|
||||
|
||||
bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
|
||||
|
@ -350,6 +366,8 @@ mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
|
|||
else
|
||||
dev->mphy.antenna_mask = dev->chainmask >> 1;
|
||||
dev->phy.chainmask = dev->mphy.antenna_mask;
|
||||
dev->mphy.hw->wiphy->available_antennas_rx = dev->phy.chainmask;
|
||||
dev->mphy.hw->wiphy->available_antennas_tx = dev->phy.chainmask;
|
||||
mt76_set_stream_caps(&dev->mt76, true);
|
||||
}
|
||||
|
||||
|
@ -361,6 +379,8 @@ mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
|
|||
IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
|
||||
dev->mphy.antenna_mask = dev->chainmask;
|
||||
dev->phy.chainmask = dev->chainmask;
|
||||
dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
|
||||
dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
|
||||
mt76_set_stream_caps(&dev->mt76, true);
|
||||
}
|
||||
|
||||
|
@ -425,11 +445,9 @@ void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
|
|||
ieee80211_free_hw(mphy->hw);
|
||||
}
|
||||
|
||||
|
||||
int mt7615_register_device(struct mt7615_dev *dev)
|
||||
void mt7615_init_device(struct mt7615_dev *dev)
|
||||
{
|
||||
struct ieee80211_hw *hw = mt76_hw(dev);
|
||||
int ret;
|
||||
|
||||
dev->phy.dev = dev;
|
||||
dev->phy.mt76 = &dev->mt76.phy;
|
||||
|
@ -440,14 +458,6 @@ int mt7615_register_device(struct mt7615_dev *dev)
|
|||
init_waitqueue_head(&dev->reset_wait);
|
||||
INIT_WORK(&dev->reset_work, mt7615_mac_reset_work);
|
||||
|
||||
ret = mt7622_wmac_init(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = mt7615_init_hardware(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
mt7615_init_wiphy(hw);
|
||||
dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
|
||||
dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
|
||||
|
@ -456,6 +466,13 @@ int mt7615_register_device(struct mt7615_dev *dev)
|
|||
IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
|
||||
mt7615_cap_dbdc_disable(dev);
|
||||
dev->phy.dfs_state = -1;
|
||||
}
|
||||
|
||||
int mt7615_register_device(struct mt7615_dev *dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mt7615_init_device(dev);
|
||||
|
||||
/* init led callbacks */
|
||||
if (IS_ENABLED(CONFIG_MT76_LEDS)) {
|
||||
|
@ -463,6 +480,14 @@ int mt7615_register_device(struct mt7615_dev *dev)
|
|||
dev->mt76.led_cdev.blink_set = mt7615_led_set_blink;
|
||||
}
|
||||
|
||||
ret = mt7622_wmac_init(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = mt7615_init_hardware(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = mt76_register_device(&dev->mt76, true, mt7615_rates,
|
||||
ARRAY_SIZE(mt7615_rates));
|
||||
if (ret)
|
||||
|
|
|
@ -503,7 +503,7 @@ mt7615_mac_tx_rate_val(struct mt7615_dev *dev,
|
|||
int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
|
||||
struct sk_buff *skb, struct mt76_wcid *wcid,
|
||||
struct ieee80211_sta *sta, int pid,
|
||||
struct ieee80211_key_conf *key)
|
||||
struct ieee80211_key_conf *key, bool beacon)
|
||||
{
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
||||
struct ieee80211_tx_rate *rate = &info->control.rates[0];
|
||||
|
@ -541,7 +541,7 @@ int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
|
|||
q_idx = wmm_idx * MT7615_MAX_WMM_SETS +
|
||||
skb_get_queue_mapping(skb);
|
||||
p_fmt = MT_TX_TYPE_CT;
|
||||
} else if (ieee80211_is_beacon(fc)) {
|
||||
} else if (beacon) {
|
||||
if (ext_phy)
|
||||
q_idx = MT_LMAC_BCN1;
|
||||
else
|
||||
|
@ -703,9 +703,9 @@ void mt7615_txp_skb_unmap(struct mt76_dev *dev,
|
|||
mt7615_txp_skb_unmap_hw(dev, &txp->hw);
|
||||
}
|
||||
|
||||
static u32 mt7615_mac_wtbl_addr(int wcid)
|
||||
static u32 mt7615_mac_wtbl_addr(struct mt7615_dev *dev, int wcid)
|
||||
{
|
||||
return MT_WTBL_BASE + wcid * MT_WTBL_ENTRY_SIZE;
|
||||
return MT_WTBL_BASE(dev) + wcid * MT_WTBL_ENTRY_SIZE;
|
||||
}
|
||||
|
||||
bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask)
|
||||
|
@ -751,7 +751,7 @@ void mt7615_mac_sta_poll(struct mt7615_dev *dev)
|
|||
list_del_init(&msta->poll_list);
|
||||
spin_unlock_bh(&dev->sta_poll_lock);
|
||||
|
||||
addr = mt7615_mac_wtbl_addr(msta->wcid.idx) + 19 * 4;
|
||||
addr = mt7615_mac_wtbl_addr(dev, msta->wcid.idx) + 19 * 4;
|
||||
|
||||
for (i = 0; i < 4; i++, addr += 8) {
|
||||
u32 tx_last = msta->airtime_ac[i];
|
||||
|
@ -801,7 +801,7 @@ void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
|
|||
struct mt76_phy *mphy = phy->mt76;
|
||||
struct ieee80211_tx_rate *ref;
|
||||
int wcid = sta->wcid.idx;
|
||||
u32 addr = mt7615_mac_wtbl_addr(wcid);
|
||||
u32 addr = mt7615_mac_wtbl_addr(dev, wcid);
|
||||
bool stbc = false;
|
||||
int n_rates = sta->n_rates;
|
||||
u8 bw, bw_prev, bw_idx = 0;
|
||||
|
@ -966,7 +966,7 @@ mt7615_mac_wtbl_update_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
|
|||
enum mt7615_cipher_type cipher,
|
||||
enum set_key_cmd cmd)
|
||||
{
|
||||
u32 addr = mt7615_mac_wtbl_addr(wcid->idx) + 30 * 4;
|
||||
u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx) + 30 * 4;
|
||||
u8 data[32] = {};
|
||||
|
||||
if (key->keylen > sizeof(data))
|
||||
|
@ -1004,7 +1004,7 @@ mt7615_mac_wtbl_update_pk(struct mt7615_dev *dev, struct mt76_wcid *wcid,
|
|||
enum mt7615_cipher_type cipher, int keyidx,
|
||||
enum set_key_cmd cmd)
|
||||
{
|
||||
u32 addr = mt7615_mac_wtbl_addr(wcid->idx), w0, w1;
|
||||
u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx), w0, w1;
|
||||
|
||||
if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000))
|
||||
return -ETIMEDOUT;
|
||||
|
@ -1040,7 +1040,7 @@ mt7615_mac_wtbl_update_cipher(struct mt7615_dev *dev, struct mt76_wcid *wcid,
|
|||
enum mt7615_cipher_type cipher,
|
||||
enum set_key_cmd cmd)
|
||||
{
|
||||
u32 addr = mt7615_mac_wtbl_addr(wcid->idx);
|
||||
u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx);
|
||||
|
||||
if (cmd == SET_KEY) {
|
||||
if (cipher != MT_CIPHER_BIP_CMAC_128 || !wcid->cipher)
|
||||
|
@ -1208,7 +1208,7 @@ int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
|
|||
return id;
|
||||
|
||||
mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta,
|
||||
pid, key);
|
||||
pid, key, false);
|
||||
|
||||
txp = txwi + MT_TXD_SIZE;
|
||||
memset(txp, 0, sizeof(struct mt7615_txp_common));
|
||||
|
@ -1524,6 +1524,9 @@ void mt7615_mac_set_scs(struct mt7615_dev *dev, bool enable)
|
|||
if (dev->scs_en == enable)
|
||||
goto out;
|
||||
|
||||
if (is_mt7663(&dev->mt76))
|
||||
goto out;
|
||||
|
||||
if (enable) {
|
||||
mt76_set(dev, MT_WF_PHY_MIN_PRI_PWR(0),
|
||||
MT_WF_PHY_PD_BLK(0));
|
||||
|
@ -1555,6 +1558,9 @@ void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy)
|
|||
{
|
||||
u32 rxtd;
|
||||
|
||||
if (is_mt7663(&dev->mt76))
|
||||
return;
|
||||
|
||||
if (ext_phy)
|
||||
rxtd = MT_WF_PHY_RXTD2(10);
|
||||
else
|
||||
|
@ -1630,7 +1636,6 @@ mt7615_mac_adjust_sensitivity(struct mt7615_phy *phy,
|
|||
MT_WF_PHY_PD_OFDM(ext_phy, val));
|
||||
} else {
|
||||
val = *sensitivity + 256;
|
||||
if (!ext_phy)
|
||||
mt76_rmw(dev, MT_WF_PHY_RXTD_CCK_PD(ext_phy),
|
||||
MT_WF_PHY_PD_CCK_MASK(ext_phy),
|
||||
MT_WF_PHY_PD_CCK(ext_phy, val));
|
||||
|
@ -1823,8 +1828,9 @@ static void
|
|||
mt7615_update_vif_beacon(void *priv, u8 *mac, struct ieee80211_vif *vif)
|
||||
{
|
||||
struct ieee80211_hw *hw = priv;
|
||||
struct mt7615_dev *dev = mt7615_hw_dev(hw);
|
||||
|
||||
mt7615_mcu_set_bcn(hw, vif, vif->bss_conf.enable_beacon);
|
||||
mt7615_mcu_add_beacon(dev, hw, vif, vif->bss_conf.enable_beacon);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
#define MT_CT_DMA_BUF_NUM 2
|
||||
|
||||
#define MT_RXD0_LENGTH GENMASK(15, 0)
|
||||
#define MT_RXD0_PKT_FLAG GENMASK(19, 16)
|
||||
#define MT_RXD0_PKT_TYPE GENMASK(31, 29)
|
||||
|
||||
#define MT_RXD0_NORMAL_ETH_TYPE_OFS GENMASK(22, 16)
|
||||
|
@ -26,7 +27,8 @@ enum rx_pkt_type {
|
|||
PKT_TYPE_RX_TMR,
|
||||
PKT_TYPE_RETRIEVE,
|
||||
PKT_TYPE_TXRX_NOTIFY,
|
||||
PKT_TYPE_RX_EVENT
|
||||
PKT_TYPE_RX_EVENT,
|
||||
PKT_TYPE_NORMAL_MCU,
|
||||
};
|
||||
|
||||
#define MT_RXD1_NORMAL_BSSID GENMASK(31, 26)
|
||||
|
@ -229,8 +231,15 @@ enum tx_phy_bandwidth {
|
|||
#define MT_TXD6_FIXED_BW BIT(2)
|
||||
#define MT_TXD6_BW GENMASK(1, 0)
|
||||
|
||||
/* MT7663 DW7 HW-AMSDU */
|
||||
#define MT_TXD7_HW_AMSDU_CAP BIT(30)
|
||||
#define MT_TXD7_TYPE GENMASK(21, 20)
|
||||
#define MT_TXD7_SUB_TYPE GENMASK(19, 16)
|
||||
#define MT_TXD7_SPE_IDX GENMASK(15, 11)
|
||||
#define MT_TXD7_SPE_IDX_SLE BIT(10)
|
||||
|
||||
#define MT_TXD8_L_TYPE GENMASK(5, 4)
|
||||
#define MT_TXD8_L_SUB_TYPE GENMASK(3, 0)
|
||||
|
||||
#define MT_TX_RATE_STBC BIT(11)
|
||||
#define MT_TX_RATE_NSS GENMASK(10, 9)
|
||||
|
|
|
@ -39,13 +39,13 @@ static int mt7615_start(struct ieee80211_hw *hw)
|
|||
running = mt7615_dev_running(dev);
|
||||
|
||||
if (!running) {
|
||||
mt7615_mcu_ctrl_pm_state(dev, 0, 0);
|
||||
mt7615_mcu_set_pm(dev, 0, 0);
|
||||
mt7615_mcu_set_mac_enable(dev, 0, true);
|
||||
mt7615_mac_enable_nf(dev, 0);
|
||||
}
|
||||
|
||||
if (phy != &dev->phy) {
|
||||
mt7615_mcu_ctrl_pm_state(dev, 1, 0);
|
||||
mt7615_mcu_set_pm(dev, 1, 0);
|
||||
mt7615_mcu_set_mac_enable(dev, 1, true);
|
||||
mt7615_mac_enable_nf(dev, 1);
|
||||
}
|
||||
|
@ -78,14 +78,14 @@ static void mt7615_stop(struct ieee80211_hw *hw)
|
|||
clear_bit(MT76_STATE_RUNNING, &phy->mt76->state);
|
||||
|
||||
if (phy != &dev->phy) {
|
||||
mt7615_mcu_ctrl_pm_state(dev, 1, 1);
|
||||
mt7615_mcu_set_pm(dev, 1, 1);
|
||||
mt7615_mcu_set_mac_enable(dev, 1, false);
|
||||
}
|
||||
|
||||
if (!mt7615_dev_running(dev)) {
|
||||
cancel_delayed_work_sync(&dev->mt76.mac_work);
|
||||
|
||||
mt7615_mcu_ctrl_pm_state(dev, 0, 1);
|
||||
mt7615_mcu_set_pm(dev, 0, 1);
|
||||
mt7615_mcu_set_mac_enable(dev, 0, false);
|
||||
}
|
||||
|
||||
|
@ -157,7 +157,7 @@ static int mt7615_add_interface(struct ieee80211_hw *hw,
|
|||
else
|
||||
mvif->wmm_idx = mvif->idx % MT7615_MAX_WMM_SETS;
|
||||
|
||||
ret = mt7615_mcu_set_dev_info(dev, vif, 1);
|
||||
ret = mt7615_mcu_add_dev_info(dev, vif, true);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
|
@ -200,7 +200,7 @@ static void mt7615_remove_interface(struct ieee80211_hw *hw,
|
|||
|
||||
/* TODO: disable beacon for the bss */
|
||||
|
||||
mt7615_mcu_set_dev_info(dev, vif, 0);
|
||||
mt7615_mcu_add_dev_info(dev, vif, false);
|
||||
|
||||
rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
|
||||
if (vif->txq)
|
||||
|
@ -412,7 +412,7 @@ static void mt7615_bss_info_changed(struct ieee80211_hw *hw,
|
|||
mutex_lock(&dev->mt76.mutex);
|
||||
|
||||
if (changed & BSS_CHANGED_ASSOC)
|
||||
mt7615_mcu_set_bss_info(dev, vif, info->assoc);
|
||||
mt7615_mcu_add_bss_info(dev, vif, info->assoc);
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_SLOT) {
|
||||
int slottime = info->use_short_slot ? 9 : 20;
|
||||
|
@ -425,13 +425,13 @@ static void mt7615_bss_info_changed(struct ieee80211_hw *hw,
|
|||
}
|
||||
|
||||
if (changed & BSS_CHANGED_BEACON_ENABLED) {
|
||||
mt7615_mcu_set_bss_info(dev, vif, info->enable_beacon);
|
||||
mt7615_mcu_set_bmc(dev, vif, info->enable_beacon);
|
||||
mt7615_mcu_add_bss_info(dev, vif, info->enable_beacon);
|
||||
mt7615_mcu_sta_add(dev, vif, NULL, info->enable_beacon);
|
||||
}
|
||||
|
||||
if (changed & (BSS_CHANGED_BEACON |
|
||||
BSS_CHANGED_BEACON_ENABLED))
|
||||
mt7615_mcu_set_bcn(hw, vif, info->enable_beacon);
|
||||
mt7615_mcu_add_beacon(dev, hw, vif, info->enable_beacon);
|
||||
|
||||
mutex_unlock(&dev->mt76.mutex);
|
||||
}
|
||||
|
@ -444,7 +444,7 @@ mt7615_channel_switch_beacon(struct ieee80211_hw *hw,
|
|||
struct mt7615_dev *dev = mt7615_hw_dev(hw);
|
||||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
mt7615_mcu_set_bcn(hw, vif, true);
|
||||
mt7615_mcu_add_beacon(dev, hw, vif, true);
|
||||
mutex_unlock(&dev->mt76.mutex);
|
||||
}
|
||||
|
||||
|
@ -469,7 +469,7 @@ int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
|
|||
mt7615_mac_wtbl_update(dev, idx,
|
||||
MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
|
||||
|
||||
mt7615_mcu_set_sta(dev, vif, sta, 1);
|
||||
mt7615_mcu_sta_add(dev, vif, sta, true);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -480,7 +480,7 @@ void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
|
|||
struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
|
||||
struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
|
||||
|
||||
mt7615_mcu_set_sta(dev, vif, sta, 0);
|
||||
mt7615_mcu_sta_add(dev, vif, sta, false);
|
||||
mt7615_mac_wtbl_update(dev, msta->wcid.idx,
|
||||
MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
|
||||
|
||||
|
@ -578,21 +578,21 @@ mt7615_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|||
case IEEE80211_AMPDU_RX_START:
|
||||
mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn,
|
||||
params->buf_size);
|
||||
mt7615_mcu_set_rx_ba(dev, params, 1);
|
||||
mt7615_mcu_add_rx_ba(dev, params, true);
|
||||
break;
|
||||
case IEEE80211_AMPDU_RX_STOP:
|
||||
mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
|
||||
mt7615_mcu_set_rx_ba(dev, params, 0);
|
||||
mt7615_mcu_add_rx_ba(dev, params, false);
|
||||
break;
|
||||
case IEEE80211_AMPDU_TX_OPERATIONAL:
|
||||
mtxq->aggr = true;
|
||||
mtxq->send_bar = false;
|
||||
mt7615_mcu_set_tx_ba(dev, params, 1);
|
||||
mt7615_mcu_add_tx_ba(dev, params, true);
|
||||
break;
|
||||
case IEEE80211_AMPDU_TX_STOP_FLUSH:
|
||||
case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
|
||||
mtxq->aggr = false;
|
||||
mt7615_mcu_set_tx_ba(dev, params, 0);
|
||||
mt7615_mcu_add_tx_ba(dev, params, false);
|
||||
break;
|
||||
case IEEE80211_AMPDU_TX_START:
|
||||
mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
|
||||
|
@ -600,7 +600,7 @@ mt7615_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|||
break;
|
||||
case IEEE80211_AMPDU_TX_STOP_CONT:
|
||||
mtxq->aggr = false;
|
||||
mt7615_mcu_set_tx_ba(dev, params, 0);
|
||||
mt7615_mcu_add_tx_ba(dev, params, false);
|
||||
ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
|
||||
break;
|
||||
}
|
||||
|
@ -686,7 +686,13 @@ mt7615_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
|
|||
mutex_lock(&dev->mt76.mutex);
|
||||
|
||||
phy->mt76->antenna_mask = tx_ant;
|
||||
phy->chainmask = ext_phy ? tx_ant << 2 : tx_ant;
|
||||
if (ext_phy) {
|
||||
if (dev->chainmask == 0xf)
|
||||
tx_ant <<= 2;
|
||||
else
|
||||
tx_ant <<= 1;
|
||||
}
|
||||
phy->chainmask = tx_ant;
|
||||
|
||||
mt76_set_stream_caps(&dev->mt76, true);
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -23,6 +23,57 @@ struct mt7615_mcu_txd {
|
|||
u32 reserved[5];
|
||||
} __packed __aligned(4);
|
||||
|
||||
/**
|
||||
* struct mt7615_uni_txd - mcu command descriptor for firmware v3
|
||||
* @txd: hardware descriptor
|
||||
* @len: total length not including txd
|
||||
* @cid: command identifier
|
||||
* @pkt_type: must be 0xa0 (cmd packet by long format)
|
||||
* @frag_n: fragment number
|
||||
* @seq: sequence number
|
||||
* @checksum: 0 mean there is no checksum
|
||||
* @s2d_index: index for command source and destination
|
||||
* Definition | value | note
|
||||
* CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM
|
||||
* CMD_S2D_IDX_C2N | 0x01 | command from WA to WM
|
||||
* CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA
|
||||
* CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM
|
||||
*
|
||||
* @option: command option
|
||||
* BIT[0]: UNI_CMD_OPT_BIT_ACK
|
||||
* set to 1 to request a fw reply
|
||||
* if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
|
||||
* is set, mcu firmware will send response event EID = 0x01
|
||||
* (UNI_EVENT_ID_CMD_RESULT) to the host.
|
||||
* BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
|
||||
* 0: original command
|
||||
* 1: unified command
|
||||
* BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
|
||||
* 0: QUERY command
|
||||
* 1: SET command
|
||||
*/
|
||||
struct mt7615_uni_txd {
|
||||
__le32 txd[8];
|
||||
|
||||
/* DW1 */
|
||||
__le16 len;
|
||||
__le16 cid;
|
||||
|
||||
/* DW2 */
|
||||
u8 reserved;
|
||||
u8 pkt_type;
|
||||
u8 frag_n;
|
||||
u8 seq;
|
||||
|
||||
/* DW3 */
|
||||
__le16 checksum;
|
||||
u8 s2d_index;
|
||||
u8 option;
|
||||
|
||||
/* DW4 */
|
||||
u8 reserved2[4];
|
||||
} __packed __aligned(4);
|
||||
|
||||
/* event table */
|
||||
enum {
|
||||
MCU_EVENT_TARGET_ADDRESS_LEN = 0x01,
|
||||
|
@ -179,16 +230,20 @@ enum {
|
|||
MCU_S2D_H2CN
|
||||
};
|
||||
|
||||
#define MCU_FW_PREFIX BIT(31)
|
||||
#define MCU_UNI_PREFIX BIT(30)
|
||||
#define MCU_CMD_MASK ~(MCU_FW_PREFIX | MCU_UNI_PREFIX)
|
||||
|
||||
enum {
|
||||
MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01,
|
||||
MCU_CMD_FW_START_REQ = 0x02,
|
||||
MCU_CMD_TARGET_ADDRESS_LEN_REQ = MCU_FW_PREFIX | 0x01,
|
||||
MCU_CMD_FW_START_REQ = MCU_FW_PREFIX | 0x02,
|
||||
MCU_CMD_INIT_ACCESS_REG = 0x3,
|
||||
MCU_CMD_PATCH_START_REQ = 0x05,
|
||||
MCU_CMD_PATCH_FINISH_REQ = 0x07,
|
||||
MCU_CMD_PATCH_SEM_CONTROL = 0x10,
|
||||
MCU_CMD_PATCH_FINISH_REQ = MCU_FW_PREFIX | 0x07,
|
||||
MCU_CMD_PATCH_SEM_CONTROL = MCU_FW_PREFIX | 0x10,
|
||||
MCU_CMD_EXT_CID = 0xED,
|
||||
MCU_CMD_FW_SCATTER = 0xEE,
|
||||
MCU_CMD_RESTART_DL_REQ = 0xEF,
|
||||
MCU_CMD_FW_SCATTER = MCU_FW_PREFIX | 0xEE,
|
||||
MCU_CMD_RESTART_DL_REQ = MCU_FW_PREFIX | 0xEF,
|
||||
};
|
||||
|
||||
enum {
|
||||
|
@ -214,6 +269,23 @@ enum {
|
|||
MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d,
|
||||
};
|
||||
|
||||
enum {
|
||||
MCU_UNI_CMD_DEV_INFO_UPDATE = MCU_UNI_PREFIX | 0x01,
|
||||
MCU_UNI_CMD_BSS_INFO_UPDATE = MCU_UNI_PREFIX | 0x02,
|
||||
MCU_UNI_CMD_STA_REC_UPDATE = MCU_UNI_PREFIX | 0x03,
|
||||
};
|
||||
|
||||
#define MCU_CMD_ACK BIT(0)
|
||||
#define MCU_CMD_UNI BIT(1)
|
||||
#define MCU_CMD_QUERY BIT(2)
|
||||
|
||||
#define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | MCU_CMD_QUERY)
|
||||
|
||||
enum {
|
||||
UNI_BSS_INFO_BASIC = 0,
|
||||
UNI_BSS_INFO_BCN_CONTENT = 7,
|
||||
};
|
||||
|
||||
enum {
|
||||
PATCH_SEM_RELEASE = 0x0,
|
||||
PATCH_SEM_GET = 0x1
|
||||
|
@ -274,6 +346,11 @@ enum {
|
|||
__DBDC_TYPE_MAX,
|
||||
};
|
||||
|
||||
struct tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
} __packed;
|
||||
|
||||
struct bss_info_omac {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
|
@ -483,18 +560,28 @@ struct wtbl_raw {
|
|||
__le32 val;
|
||||
} __packed;
|
||||
|
||||
#define MT7615_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \
|
||||
sizeof(struct wtbl_generic) + \
|
||||
sizeof(struct wtbl_rx) + \
|
||||
sizeof(struct wtbl_ht) + \
|
||||
sizeof(struct wtbl_vht) + \
|
||||
sizeof(struct wtbl_tx_ps) + \
|
||||
sizeof(struct wtbl_hdr_trans) + \
|
||||
sizeof(struct wtbl_ba) + \
|
||||
sizeof(struct wtbl_bf) + \
|
||||
sizeof(struct wtbl_smps) + \
|
||||
sizeof(struct wtbl_pn) + \
|
||||
sizeof(struct wtbl_spe))
|
||||
#define MT7615_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \
|
||||
sizeof(struct wtbl_generic) + \
|
||||
sizeof(struct wtbl_rx) + \
|
||||
sizeof(struct wtbl_ht) + \
|
||||
sizeof(struct wtbl_vht) + \
|
||||
sizeof(struct wtbl_tx_ps) + \
|
||||
sizeof(struct wtbl_hdr_trans) +\
|
||||
sizeof(struct wtbl_ba) + \
|
||||
sizeof(struct wtbl_bf) + \
|
||||
sizeof(struct wtbl_smps) + \
|
||||
sizeof(struct wtbl_pn) + \
|
||||
sizeof(struct wtbl_spe))
|
||||
|
||||
#define MT7615_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \
|
||||
sizeof(struct sta_rec_basic) + \
|
||||
sizeof(struct sta_rec_ht) + \
|
||||
sizeof(struct sta_rec_vht) + \
|
||||
sizeof(struct tlv) + \
|
||||
MT7615_WTBL_UPDATE_MAX_SIZE)
|
||||
|
||||
#define MT7615_WTBL_UPDATE_BA_SIZE (sizeof(struct wtbl_req_hdr) + \
|
||||
sizeof(struct wtbl_ba))
|
||||
|
||||
enum {
|
||||
WTBL_GENERIC,
|
||||
|
@ -517,6 +604,11 @@ enum {
|
|||
WTBL_MAX_NUM
|
||||
};
|
||||
|
||||
struct sta_ntlv_hdr {
|
||||
u8 rsv[2];
|
||||
__le16 tlv_num;
|
||||
} __packed;
|
||||
|
||||
struct sta_req_hdr {
|
||||
u8 bss_idx;
|
||||
u8 wlan_idx;
|
||||
|
@ -526,6 +618,15 @@ struct sta_req_hdr {
|
|||
u8 rsv[2];
|
||||
} __packed;
|
||||
|
||||
struct sta_rec_state {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
u8 state;
|
||||
__le32 flags;
|
||||
u8 vhtop;
|
||||
u8 pad[2];
|
||||
} __packed;
|
||||
|
||||
struct sta_rec_basic {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
|
@ -565,11 +666,6 @@ struct sta_rec_ba {
|
|||
__le16 winsize;
|
||||
} __packed;
|
||||
|
||||
struct sta_rec_wtbl {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
} __packed;
|
||||
|
||||
enum {
|
||||
STA_REC_BASIC,
|
||||
STA_REC_RA,
|
||||
|
@ -578,7 +674,7 @@ enum {
|
|||
STA_REC_BF,
|
||||
STA_REC_AMSDU, /* for CR4 */
|
||||
STA_REC_BA,
|
||||
STA_REC_RED, /* not used */
|
||||
STA_REC_STATE,
|
||||
STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */
|
||||
STA_REC_HT,
|
||||
STA_REC_VHT,
|
||||
|
|
|
@ -2,14 +2,68 @@
|
|||
#include <linux/module.h>
|
||||
|
||||
#include "mt7615.h"
|
||||
#include "regs.h"
|
||||
#include "mac.h"
|
||||
#include "../trace.h"
|
||||
|
||||
const u32 mt7615e_reg_map[] = {
|
||||
[MT_TOP_CFG_BASE] = 0x01000,
|
||||
[MT_HW_BASE] = 0x01000,
|
||||
[MT_PCIE_REMAP_2] = 0x02504,
|
||||
[MT_ARB_BASE] = 0x20c00,
|
||||
[MT_HIF_BASE] = 0x04000,
|
||||
[MT_CSR_BASE] = 0x07000,
|
||||
[MT_PHY_BASE] = 0x10000,
|
||||
[MT_CFG_BASE] = 0x20200,
|
||||
[MT_AGG_BASE] = 0x20a00,
|
||||
[MT_TMAC_BASE] = 0x21000,
|
||||
[MT_RMAC_BASE] = 0x21200,
|
||||
[MT_DMA_BASE] = 0x21800,
|
||||
[MT_WTBL_BASE_ON] = 0x23000,
|
||||
[MT_WTBL_BASE_OFF] = 0x23400,
|
||||
[MT_LPON_BASE] = 0x24200,
|
||||
[MT_MIB_BASE] = 0x24800,
|
||||
[MT_WTBL_BASE_ADDR] = 0x30000,
|
||||
[MT_PCIE_REMAP_BASE2] = 0x80000,
|
||||
[MT_TOP_MISC_BASE] = 0xc0000,
|
||||
[MT_EFUSE_ADDR_BASE] = 0x81070000,
|
||||
};
|
||||
|
||||
const u32 mt7663e_reg_map[] = {
|
||||
[MT_TOP_CFG_BASE] = 0x01000,
|
||||
[MT_HW_BASE] = 0x02000,
|
||||
[MT_DMA_SHDL_BASE] = 0x06000,
|
||||
[MT_PCIE_REMAP_2] = 0x0700c,
|
||||
[MT_ARB_BASE] = 0x20c00,
|
||||
[MT_HIF_BASE] = 0x04000,
|
||||
[MT_CSR_BASE] = 0x07000,
|
||||
[MT_PHY_BASE] = 0x10000,
|
||||
[MT_CFG_BASE] = 0x20000,
|
||||
[MT_AGG_BASE] = 0x22000,
|
||||
[MT_TMAC_BASE] = 0x24000,
|
||||
[MT_RMAC_BASE] = 0x25000,
|
||||
[MT_DMA_BASE] = 0x27000,
|
||||
[MT_WTBL_BASE_ON] = 0x29000,
|
||||
[MT_WTBL_BASE_OFF] = 0x29800,
|
||||
[MT_LPON_BASE] = 0x2b000,
|
||||
[MT_MIB_BASE] = 0x2d000,
|
||||
[MT_WTBL_BASE_ADDR] = 0x30000,
|
||||
[MT_PCIE_REMAP_BASE2] = 0x90000,
|
||||
[MT_TOP_MISC_BASE] = 0xc0000,
|
||||
[MT_EFUSE_ADDR_BASE] = 0x78011000,
|
||||
};
|
||||
|
||||
u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr)
|
||||
{
|
||||
u32 base = addr & MT_MCU_PCIE_REMAP_2_BASE;
|
||||
u32 offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET;
|
||||
u32 base, offset;
|
||||
|
||||
if (is_mt7663(&dev->mt76)) {
|
||||
base = addr & MT7663_MCU_PCIE_REMAP_2_BASE;
|
||||
offset = addr & MT7663_MCU_PCIE_REMAP_2_OFFSET;
|
||||
} else {
|
||||
base = addr & MT_MCU_PCIE_REMAP_2_BASE;
|
||||
offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET;
|
||||
}
|
||||
mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base);
|
||||
|
||||
return MT_PCIE_REMAP_BASE_2 + offset;
|
||||
|
@ -66,7 +120,8 @@ static irqreturn_t mt7615_irq_handler(int irq, void *dev_instance)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq)
|
||||
int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
|
||||
int irq, const u32 *map)
|
||||
{
|
||||
static const struct mt76_driver_ops drv_ops = {
|
||||
/* txwi_size = txd size + txp size */
|
||||
|
@ -95,6 +150,7 @@ int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq)
|
|||
dev = container_of(mdev, struct mt7615_dev, mt76);
|
||||
mt76_mmio_init(&dev->mt76, mem_base);
|
||||
|
||||
dev->reg_map = map;
|
||||
mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) |
|
||||
(mt76_rr(dev, MT_HW_REV) & 0xff);
|
||||
dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev);
|
||||
|
@ -104,6 +160,9 @@ int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq)
|
|||
if (ret)
|
||||
goto error;
|
||||
|
||||
if (is_mt7663(mdev))
|
||||
mt76_wr(dev, MT_PCIE_IRQ_ENABLE, 1);
|
||||
|
||||
ret = mt7615_register_device(dev);
|
||||
if (ret)
|
||||
goto error;
|
||||
|
|
|
@ -38,6 +38,10 @@
|
|||
|
||||
#define MT7615_FIRMWARE_V1 1
|
||||
#define MT7615_FIRMWARE_V2 2
|
||||
#define MT7615_FIRMWARE_V3 3
|
||||
|
||||
#define MT7663_ROM_PATCH "mediatek/mt7663pr2h_v3.bin"
|
||||
#define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin"
|
||||
|
||||
#define MT7615_EEPROM_SIZE 1024
|
||||
#define MT7615_TOKEN_SIZE 4096
|
||||
|
@ -144,6 +148,33 @@ struct mt7615_phy {
|
|||
struct mib_stats mib;
|
||||
};
|
||||
|
||||
#define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
|
||||
#define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
|
||||
#define mt7615_mcu_sta_add(dev, ...) (dev)->mcu_ops->sta_add((dev), __VA_ARGS__)
|
||||
#define mt7615_mcu_add_dev_info(dev, ...) (dev)->mcu_ops->add_dev_info((dev), __VA_ARGS__)
|
||||
#define mt7615_mcu_add_bss_info(dev, ...) (dev)->mcu_ops->add_bss_info((dev), __VA_ARGS__)
|
||||
#define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__)
|
||||
#define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__)
|
||||
struct mt7615_mcu_ops {
|
||||
int (*add_tx_ba)(struct mt7615_dev *dev,
|
||||
struct ieee80211_ampdu_params *params,
|
||||
bool enable);
|
||||
int (*add_rx_ba)(struct mt7615_dev *dev,
|
||||
struct ieee80211_ampdu_params *params,
|
||||
bool enable);
|
||||
int (*sta_add)(struct mt7615_dev *dev,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, bool enable);
|
||||
int (*add_dev_info)(struct mt7615_dev *dev,
|
||||
struct ieee80211_vif *vif, bool enable);
|
||||
int (*add_bss_info)(struct mt7615_dev *dev, struct ieee80211_vif *vif,
|
||||
bool enable);
|
||||
int (*add_beacon_offload)(struct mt7615_dev *dev,
|
||||
struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif, bool enable);
|
||||
int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
|
||||
};
|
||||
|
||||
struct mt7615_dev {
|
||||
union { /* must be first */
|
||||
struct mt76_dev mt76;
|
||||
|
@ -156,7 +187,9 @@ struct mt7615_dev {
|
|||
|
||||
u16 chainmask;
|
||||
|
||||
const struct mt7615_mcu_ops *mcu_ops;
|
||||
struct regmap *infracfg;
|
||||
const u32 *reg_map;
|
||||
|
||||
struct work_struct mcu_work;
|
||||
|
||||
|
@ -257,6 +290,8 @@ mt7615_ext_phy(struct mt7615_dev *dev)
|
|||
}
|
||||
|
||||
extern const struct ieee80211_ops mt7615_ops;
|
||||
extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
|
||||
extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
|
||||
extern struct pci_driver mt7615_pci_driver;
|
||||
extern struct platform_driver mt7622_wmac_driver;
|
||||
|
||||
|
@ -269,9 +304,11 @@ static inline int mt7622_wmac_init(struct mt7615_dev *dev)
|
|||
}
|
||||
#endif
|
||||
|
||||
int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq);
|
||||
int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
|
||||
int irq, const u32 *map);
|
||||
u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
|
||||
|
||||
void mt7615_init_device(struct mt7615_dev *dev);
|
||||
int mt7615_register_device(struct mt7615_dev *dev);
|
||||
void mt7615_unregister_device(struct mt7615_dev *dev);
|
||||
int mt7615_register_ext_phy(struct mt7615_dev *dev);
|
||||
|
@ -284,29 +321,13 @@ int mt7615_dma_init(struct mt7615_dev *dev);
|
|||
void mt7615_dma_cleanup(struct mt7615_dev *dev);
|
||||
int mt7615_mcu_init(struct mt7615_dev *dev);
|
||||
bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
|
||||
int mt7615_mcu_set_dev_info(struct mt7615_dev *dev,
|
||||
struct ieee80211_vif *vif, bool enable);
|
||||
int mt7615_mcu_set_bss_info(struct mt7615_dev *dev, struct ieee80211_vif *vif,
|
||||
int en);
|
||||
void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
|
||||
struct ieee80211_tx_rate *probe_rate,
|
||||
struct ieee80211_tx_rate *rates);
|
||||
int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
|
||||
int mt7615_mcu_set_bmc(struct mt7615_dev *dev, struct ieee80211_vif *vif,
|
||||
bool en);
|
||||
int mt7615_mcu_set_sta(struct mt7615_dev *dev, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, bool en);
|
||||
int mt7615_mcu_set_bcn(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
int en);
|
||||
int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
|
||||
int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
|
||||
const struct ieee80211_tx_queue_params *params);
|
||||
int mt7615_mcu_set_tx_ba(struct mt7615_dev *dev,
|
||||
struct ieee80211_ampdu_params *params,
|
||||
bool add);
|
||||
int mt7615_mcu_set_rx_ba(struct mt7615_dev *dev,
|
||||
struct ieee80211_ampdu_params *params,
|
||||
bool add);
|
||||
void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
|
||||
int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev,
|
||||
enum mt7615_rdd_cmd cmd, u8 index,
|
||||
|
@ -327,6 +348,11 @@ static inline bool is_mt7615(struct mt76_dev *dev)
|
|||
return mt76_chip(dev) == 0x7615;
|
||||
}
|
||||
|
||||
static inline bool is_mt7663(struct mt76_dev *dev)
|
||||
{
|
||||
return mt76_chip(dev) == 0x7663;
|
||||
}
|
||||
|
||||
static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
|
||||
{
|
||||
mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);
|
||||
|
@ -347,7 +373,7 @@ void mt7615_mac_sta_poll(struct mt7615_dev *dev);
|
|||
int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
|
||||
struct sk_buff *skb, struct mt76_wcid *wcid,
|
||||
struct ieee80211_sta *sta, int pid,
|
||||
struct ieee80211_key_conf *key);
|
||||
struct ieee80211_key_conf *key, bool beacon);
|
||||
void mt7615_mac_set_timing(struct mt7615_phy *phy);
|
||||
int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb);
|
||||
void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data);
|
||||
|
@ -357,13 +383,15 @@ int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
|
|||
enum set_key_cmd cmd);
|
||||
void mt7615_mac_reset_work(struct work_struct *work);
|
||||
|
||||
int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
|
||||
int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
|
||||
int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
|
||||
int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable);
|
||||
int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val);
|
||||
int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int enter);
|
||||
int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index);
|
||||
void mt7615_mcu_exit(struct mt7615_dev *dev);
|
||||
void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
|
||||
int cmd, int *wait_seq);
|
||||
|
||||
int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
|
||||
enum mt76_txq_id qid, struct mt76_wcid *wcid,
|
||||
|
|
|
@ -13,12 +13,14 @@
|
|||
|
||||
static const struct pci_device_id mt7615_pci_device_table[] = {
|
||||
{ PCI_DEVICE(0x14c3, 0x7615) },
|
||||
{ PCI_DEVICE(0x14c3, 0x7663) },
|
||||
{ },
|
||||
};
|
||||
|
||||
static int mt7615_pci_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *id)
|
||||
{
|
||||
const u32 *map;
|
||||
int ret;
|
||||
|
||||
ret = pcim_enable_device(pdev);
|
||||
|
@ -35,7 +37,9 @@ static int mt7615_pci_probe(struct pci_dev *pdev,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
return mt7615_mmio_probe(&pdev->dev, pcim_iomap_table(pdev)[0], pdev->irq);
|
||||
map = id->device == 0x7663 ? mt7663e_reg_map : mt7615e_reg_map;
|
||||
return mt7615_mmio_probe(&pdev->dev, pcim_iomap_table(pdev)[0],
|
||||
pdev->irq, map);
|
||||
}
|
||||
|
||||
static void mt7615_pci_remove(struct pci_dev *pdev)
|
||||
|
@ -57,3 +61,5 @@ MODULE_DEVICE_TABLE(pci, mt7615_pci_device_table);
|
|||
MODULE_FIRMWARE(MT7615_FIRMWARE_CR4);
|
||||
MODULE_FIRMWARE(MT7615_FIRMWARE_N9);
|
||||
MODULE_FIRMWARE(MT7615_ROM_PATCH);
|
||||
MODULE_FIRMWARE(MT7663_FIRMWARE_N9);
|
||||
MODULE_FIRMWARE(MT7663_ROM_PATCH);
|
||||
|
|
|
@ -4,17 +4,46 @@
|
|||
#ifndef __MT7615_REGS_H
|
||||
#define __MT7615_REGS_H
|
||||
|
||||
#define MT_HW_REV 0x1000
|
||||
#define MT_HW_CHIPID 0x1008
|
||||
#define MT_TOP_STRAP_STA 0x1010
|
||||
enum mt7615_reg_base {
|
||||
MT_TOP_CFG_BASE,
|
||||
MT_HW_BASE,
|
||||
MT_DMA_SHDL_BASE,
|
||||
MT_PCIE_REMAP_2,
|
||||
MT_ARB_BASE,
|
||||
MT_HIF_BASE,
|
||||
MT_CSR_BASE,
|
||||
MT_PHY_BASE,
|
||||
MT_CFG_BASE,
|
||||
MT_AGG_BASE,
|
||||
MT_TMAC_BASE,
|
||||
MT_RMAC_BASE,
|
||||
MT_DMA_BASE,
|
||||
MT_WTBL_BASE_ON,
|
||||
MT_WTBL_BASE_OFF,
|
||||
MT_LPON_BASE,
|
||||
MT_MIB_BASE,
|
||||
MT_WTBL_BASE_ADDR,
|
||||
MT_PCIE_REMAP_BASE2,
|
||||
MT_TOP_MISC_BASE,
|
||||
MT_EFUSE_ADDR_BASE,
|
||||
__MT_BASE_MAX,
|
||||
};
|
||||
|
||||
#define MT_HW_INFO_BASE ((dev)->reg_map[MT_HW_BASE])
|
||||
#define MT_HW_INFO(ofs) (MT_HW_INFO_BASE + (ofs))
|
||||
#define MT_HW_REV MT_HW_INFO(0x000)
|
||||
#define MT_HW_CHIPID MT_HW_INFO(0x008)
|
||||
#define MT_TOP_STRAP_STA MT_HW_INFO(0x010)
|
||||
#define MT_TOP_3NSS BIT(24)
|
||||
|
||||
#define MT_TOP_OFF_RSV 0x1128
|
||||
#define MT_TOP_OFF_RSV_FW_STATE GENMASK(18, 16)
|
||||
|
||||
#define MT_TOP_MISC2 0x1134
|
||||
#define MT_TOP_MISC2 ((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134)
|
||||
#define MT_TOP_MISC2_FW_STATE GENMASK(2, 0)
|
||||
|
||||
#define MT7663_TOP_MISC2_FW_STATE GENMASK(3, 1)
|
||||
|
||||
#define MT_MCU_BASE 0x2000
|
||||
#define MT_MCU(ofs) (MT_MCU_BASE + (ofs))
|
||||
|
||||
|
@ -23,13 +52,19 @@
|
|||
#define MT_MCU_PCIE_REMAP_1_BASE GENMASK(31, 18)
|
||||
#define MT_PCIE_REMAP_BASE_1 0x40000
|
||||
|
||||
#define MT_MCU_PCIE_REMAP_2 MT_MCU(0x504)
|
||||
#define MT_MCU_PCIE_REMAP_2 ((dev)->reg_map[MT_PCIE_REMAP_2])
|
||||
#define MT_MCU_PCIE_REMAP_2_OFFSET GENMASK(18, 0)
|
||||
#define MT_MCU_PCIE_REMAP_2_BASE GENMASK(31, 19)
|
||||
#define MT_PCIE_REMAP_BASE_2 0x80000
|
||||
#define MT_PCIE_REMAP_BASE_2 ((dev)->reg_map[MT_PCIE_REMAP_BASE2])
|
||||
|
||||
#define MT_HIF_BASE 0x4000
|
||||
#define MT_HIF(ofs) (MT_HIF_BASE + (ofs))
|
||||
#define MT_HIF(ofs) ((dev)->reg_map[MT_HIF_BASE] + (ofs))
|
||||
|
||||
#define MT7663_MCU_PCIE_REMAP_2_OFFSET GENMASK(15, 0)
|
||||
#define MT7663_MCU_PCIE_REMAP_2_BASE GENMASK(31, 16)
|
||||
|
||||
#define MT_HIF2_BASE 0xf0000
|
||||
#define MT_HIF2(ofs) (MT_HIF2_BASE + (ofs))
|
||||
#define MT_PCIE_IRQ_ENABLE MT_HIF2(0x188)
|
||||
|
||||
#define MT_CFG_LPCR_HOST MT_HIF(0x1f0)
|
||||
#define MT_CFG_LPCR_HOST_FW_OWN BIT(0)
|
||||
|
@ -95,6 +130,9 @@
|
|||
#define MT_WPDMA_ABT_CFG MT_HIF(0x530)
|
||||
#define MT_WPDMA_ABT_CFG1 MT_HIF(0x534)
|
||||
|
||||
#define MT_CSR(ofs) ((dev)->reg_map[MT_CSR_BASE] + (ofs))
|
||||
#define MT_CONN_HIF_ON_LPCTL MT_CSR(0x000)
|
||||
|
||||
#define MT_PLE_BASE 0x8000
|
||||
#define MT_PLE(ofs) (MT_PLE_BASE + (ofs))
|
||||
|
||||
|
@ -106,7 +144,7 @@
|
|||
#define MT_PLE_AC_QEMPTY(ac, n) MT_PLE(0x300 + 0x10 * (ac) + \
|
||||
((n) << 2))
|
||||
|
||||
#define MT_WF_PHY_BASE 0x10000
|
||||
#define MT_WF_PHY_BASE ((dev)->reg_map[MT_PHY_BASE])
|
||||
#define MT_WF_PHY(ofs) (MT_WF_PHY_BASE + (ofs))
|
||||
|
||||
#define MT_WF_PHY_WF2_RFCTRL0(n) MT_WF_PHY(0x1900 + (n) * 0x400)
|
||||
|
@ -139,7 +177,7 @@
|
|||
#define MT_WF_PHY_RXTD2_BASE MT_WF_PHY(0x2a00)
|
||||
#define MT_WF_PHY_RXTD2(_n) (MT_WF_PHY_RXTD2_BASE + ((_n) << 2))
|
||||
|
||||
#define MT_WF_CFG_BASE 0x20200
|
||||
#define MT_WF_CFG_BASE ((dev)->reg_map[MT_CFG_BASE])
|
||||
#define MT_WF_CFG(ofs) (MT_WF_CFG_BASE + (ofs))
|
||||
|
||||
#define MT_CFG_CCR MT_WF_CFG(0x000)
|
||||
|
@ -148,7 +186,7 @@
|
|||
#define MT_CFG_CCR_MAC_D1_2X_GC_EN BIT(30)
|
||||
#define MT_CFG_CCR_MAC_D0_2X_GC_EN BIT(31)
|
||||
|
||||
#define MT_WF_AGG_BASE 0x20a00
|
||||
#define MT_WF_AGG_BASE ((dev)->reg_map[MT_AGG_BASE])
|
||||
#define MT_WF_AGG(ofs) (MT_WF_AGG_BASE + (ofs))
|
||||
|
||||
#define MT_AGG_ARCR MT_WF_AGG(0x010)
|
||||
|
@ -179,7 +217,7 @@
|
|||
#define MT_AGG_SCR MT_WF_AGG(0x0fc)
|
||||
#define MT_AGG_SCR_NLNAV_MID_PTEC_DIS BIT(3)
|
||||
|
||||
#define MT_WF_ARB_BASE 0x20c00
|
||||
#define MT_WF_ARB_BASE ((dev)->reg_map[MT_ARB_BASE])
|
||||
#define MT_WF_ARB(ofs) (MT_WF_ARB_BASE + (ofs))
|
||||
|
||||
#define MT_ARB_SCR MT_WF_ARB(0x080)
|
||||
|
@ -188,7 +226,7 @@
|
|||
#define MT_ARB_SCR_TX1_DISABLE BIT(10)
|
||||
#define MT_ARB_SCR_RX1_DISABLE BIT(11)
|
||||
|
||||
#define MT_WF_TMAC_BASE 0x21000
|
||||
#define MT_WF_TMAC_BASE ((dev)->reg_map[MT_TMAC_BASE])
|
||||
#define MT_WF_TMAC(ofs) (MT_WF_TMAC_BASE + (ofs))
|
||||
|
||||
#define MT_TMAC_CDTR MT_WF_TMAC(0x090)
|
||||
|
@ -212,7 +250,7 @@
|
|||
#define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17)
|
||||
#define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18)
|
||||
|
||||
#define MT_WF_RMAC_BASE 0x21200
|
||||
#define MT_WF_RMAC_BASE ((dev)->reg_map[MT_RMAC_BASE])
|
||||
#define MT_WF_RMAC(ofs) (MT_WF_RMAC_BASE + (ofs))
|
||||
|
||||
#define MT_WF_RFCR(_band) MT_WF_RMAC((_band) ? 0x100 : 0x000)
|
||||
|
@ -257,7 +295,7 @@
|
|||
#define MT_WF_RMAC_MIB_TIME6 MT_WF_RMAC(0x03dc)
|
||||
#define MT_MIB_OBSSTIME_MASK GENMASK(23, 0)
|
||||
|
||||
#define MT_WF_DMA_BASE 0x21800
|
||||
#define MT_WF_DMA_BASE ((dev)->reg_map[MT_DMA_BASE])
|
||||
#define MT_WF_DMA(ofs) (MT_WF_DMA_BASE + (ofs))
|
||||
|
||||
#define MT_DMA_DCR0 MT_WF_DMA(0x000)
|
||||
|
@ -272,10 +310,10 @@
|
|||
#define MT_DMA_RCFR0_RX_DROPPED_UCAST GENMASK(25, 24)
|
||||
#define MT_DMA_RCFR0_RX_DROPPED_MCAST GENMASK(27, 26)
|
||||
|
||||
#define MT_WTBL_BASE 0x30000
|
||||
#define MT_WTBL_BASE(dev) ((dev)->reg_map[MT_WTBL_BASE_ADDR])
|
||||
#define MT_WTBL_ENTRY_SIZE 256
|
||||
|
||||
#define MT_WTBL_OFF_BASE 0x23400
|
||||
#define MT_WTBL_OFF_BASE ((dev)->reg_map[MT_WTBL_BASE_OFF])
|
||||
#define MT_WTBL_OFF(n) (MT_WTBL_OFF_BASE + (n))
|
||||
|
||||
#define MT_WTBL_W0_KEY_IDX GENMASK(24, 23)
|
||||
|
@ -292,7 +330,11 @@
|
|||
#define MT_WTBL_UPDATE_TX_COUNT_CLEAR BIT(14)
|
||||
#define MT_WTBL_UPDATE_BUSY BIT(31)
|
||||
|
||||
#define MT_WTBL_ON_BASE 0x23000
|
||||
#define MT_TOP_MISC(ofs) ((dev)->reg_map[MT_TOP_MISC_BASE] + (ofs))
|
||||
#define MT_CONN_ON_MISC MT_TOP_MISC(0x1140)
|
||||
#define MT_TOP_MISC2_FW_N9_RDY BIT(2)
|
||||
|
||||
#define MT_WTBL_ON_BASE ((dev)->reg_map[MT_WTBL_BASE_ON])
|
||||
#define MT_WTBL_ON(_n) (MT_WTBL_ON_BASE + (_n))
|
||||
|
||||
#define MT_WTBL_RICR0 MT_WTBL_ON(0x010)
|
||||
|
@ -328,8 +370,7 @@
|
|||
|
||||
#define MT_WTBL_W27_CC_BW_SEL GENMASK(6, 5)
|
||||
|
||||
#define MT_LPON_BASE 0x24200
|
||||
#define MT_LPON(_n) (MT_LPON_BASE + (_n))
|
||||
#define MT_LPON(_n) ((dev)->reg_map[MT_LPON_BASE] + (_n))
|
||||
|
||||
#define MT_LPON_T0CR MT_LPON(0x010)
|
||||
#define MT_LPON_T0CR_MODE GENMASK(1, 0)
|
||||
|
@ -337,7 +378,7 @@
|
|||
#define MT_LPON_UTTR0 MT_LPON(0x018)
|
||||
#define MT_LPON_UTTR1 MT_LPON(0x01c)
|
||||
|
||||
#define MT_WF_MIB_BASE 0x24800
|
||||
#define MT_WF_MIB_BASE (dev->reg_map[MT_MIB_BASE])
|
||||
#define MT_WF_MIB(ofs) (MT_WF_MIB_BASE + (ofs))
|
||||
|
||||
#define MT_MIB_M0_MISC_CR MT_WF_MIB(0x00c)
|
||||
|
@ -367,6 +408,8 @@
|
|||
|
||||
#define MT_TX_AGG_CNT(n) MT_WF_MIB(0xa8 + ((n) << 2))
|
||||
|
||||
#define MT_DMA_SHDL(ofs) (dev->reg_map[MT_DMA_SHDL_BASE] + (ofs))
|
||||
|
||||
#define MT_DMASHDL_BASE 0x5000a000
|
||||
#define MT_DMASHDL_OPTIONAL 0x008
|
||||
#define MT_DMASHDL_PAGE 0x00c
|
||||
|
@ -406,7 +449,7 @@
|
|||
#define MT_LED_STATUS_ON GENMASK(23, 16)
|
||||
#define MT_LED_STATUS_DURATION GENMASK(15, 0)
|
||||
|
||||
#define MT_EFUSE_BASE 0x81070000
|
||||
#define MT_EFUSE_BASE ((dev)->reg_map[MT_EFUSE_ADDR_BASE])
|
||||
#define MT_EFUSE_BASE_CTRL 0x000
|
||||
#define MT_EFUSE_BASE_CTRL_EMPTY BIT(30)
|
||||
|
||||
|
|
|
@ -47,7 +47,7 @@ static int mt7622_wmac_probe(struct platform_device *pdev)
|
|||
return PTR_ERR(mem_base);
|
||||
}
|
||||
|
||||
return mt7615_mmio_probe(&pdev->dev, mem_base, irq);
|
||||
return mt7615_mmio_probe(&pdev->dev, mem_base, irq, mt7615e_reg_map);
|
||||
}
|
||||
|
||||
static int mt7622_wmac_remove(struct platform_device *pdev)
|
||||
|
|
|
@ -1155,7 +1155,6 @@ static void mt76x0_rf_patch_reg_array(struct mt76x02_dev *dev,
|
|||
static void mt76x0_phy_rf_init(struct mt76x02_dev *dev)
|
||||
{
|
||||
int i;
|
||||
u8 val;
|
||||
|
||||
mt76x0_rf_patch_reg_array(dev, mt76x0_rf_central_tab,
|
||||
ARRAY_SIZE(mt76x0_rf_central_tab));
|
||||
|
@ -1188,7 +1187,7 @@ static void mt76x0_phy_rf_init(struct mt76x02_dev *dev)
|
|||
*/
|
||||
mt76x0_rf_wr(dev, MT_RF(0, 22),
|
||||
min_t(u8, dev->cal.rx.freq_offset, 0xbf));
|
||||
val = mt76x0_rf_rr(dev, MT_RF(0, 22));
|
||||
mt76x0_rf_rr(dev, MT_RF(0, 22));
|
||||
|
||||
/* Reset procedure DAC during power-up:
|
||||
* - set B0.R73<7>
|
||||
|
|
|
@ -461,6 +461,7 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev)
|
|||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
|
||||
dev->mcu_timeout = 0;
|
||||
if (restart)
|
||||
mt76x02_reset_state(dev);
|
||||
|
||||
|
@ -544,10 +545,6 @@ static void mt76x02_check_tx_hang(struct mt76x02_dev *dev)
|
|||
restart:
|
||||
mt76x02_watchdog_reset(dev);
|
||||
|
||||
mutex_lock(&dev->mt76.mcu.mutex);
|
||||
dev->mcu_timeout = 0;
|
||||
mutex_unlock(&dev->mt76.mcu.mutex);
|
||||
|
||||
dev->tx_hang_reset++;
|
||||
dev->tx_hang_check = 0;
|
||||
memset(dev->mt76.tx_dma_idx, 0xff,
|
||||
|
|
|
@ -70,10 +70,10 @@ static u32 ___mt76u_rr(struct mt76_dev *dev, u8 req, u32 addr)
|
|||
|
||||
ret = __mt76u_vendor_request(dev, req,
|
||||
USB_DIR_IN | USB_TYPE_VENDOR,
|
||||
addr >> 16, addr, &usb->reg_val,
|
||||
addr >> 16, addr, usb->data,
|
||||
sizeof(__le32));
|
||||
if (ret == sizeof(__le32))
|
||||
data = le32_to_cpu(usb->reg_val);
|
||||
data = get_unaligned_le32(usb->data);
|
||||
trace_usb_reg_rr(dev, addr, data);
|
||||
|
||||
return data;
|
||||
|
@ -125,10 +125,10 @@ static void ___mt76u_wr(struct mt76_dev *dev, u8 req,
|
|||
{
|
||||
struct mt76_usb *usb = &dev->usb;
|
||||
|
||||
usb->reg_val = cpu_to_le32(val);
|
||||
put_unaligned_le32(val, usb->data);
|
||||
__mt76u_vendor_request(dev, req,
|
||||
USB_DIR_OUT | USB_TYPE_VENDOR,
|
||||
addr >> 16, addr, &usb->reg_val,
|
||||
addr >> 16, addr, usb->data,
|
||||
sizeof(__le32));
|
||||
trace_usb_reg_wr(dev, addr, val);
|
||||
}
|
||||
|
@ -672,10 +672,17 @@ mt76u_process_rx_queue(struct mt76_dev *dev, struct mt76_queue *q)
|
|||
static void mt76u_rx_tasklet(unsigned long data)
|
||||
{
|
||||
struct mt76_dev *dev = (struct mt76_dev *)data;
|
||||
struct mt76_queue *q = &dev->q_rx[MT_RXQ_MAIN];
|
||||
struct mt76_queue *q;
|
||||
int i;
|
||||
|
||||
rcu_read_lock();
|
||||
mt76u_process_rx_queue(dev, q);
|
||||
for (i = 0; i < __MT_RXQ_MAX; i++) {
|
||||
q = &dev->q_rx[i];
|
||||
if (!q->ndesc)
|
||||
continue;
|
||||
|
||||
mt76u_process_rx_queue(dev, q);
|
||||
}
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
|
@ -1150,6 +1157,7 @@ int mt76u_init(struct mt76_dev *dev,
|
|||
};
|
||||
struct usb_device *udev = interface_to_usbdev(intf);
|
||||
struct mt76_usb *usb = &dev->usb;
|
||||
int err = -ENOMEM;
|
||||
|
||||
mt76u_ops.rr = ext ? mt76u_rr_ext : mt76u_rr;
|
||||
mt76u_ops.wr = ext ? mt76u_wr_ext : mt76u_wr;
|
||||
|
@ -1169,10 +1177,8 @@ int mt76u_init(struct mt76_dev *dev,
|
|||
usb->data_len = 32;
|
||||
|
||||
usb->data = devm_kmalloc(dev->dev, usb->data_len, GFP_KERNEL);
|
||||
if (!usb->data) {
|
||||
mt76u_deinit(dev);
|
||||
return -ENOMEM;
|
||||
}
|
||||
if (!usb->data)
|
||||
goto error;
|
||||
|
||||
mutex_init(&usb->usb_ctrl_mtx);
|
||||
dev->bus = &mt76u_ops;
|
||||
|
@ -1182,7 +1188,15 @@ int mt76u_init(struct mt76_dev *dev,
|
|||
|
||||
usb->sg_en = mt76u_check_sg(dev);
|
||||
|
||||
return mt76u_set_endpoints(intf, usb);
|
||||
err = mt76u_set_endpoints(intf, usb);
|
||||
if (err < 0)
|
||||
goto error;
|
||||
|
||||
return 0;
|
||||
|
||||
error:
|
||||
mt76u_deinit(dev);
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mt76u_init);
|
||||
|
||||
|
|
|
@ -60,7 +60,8 @@ qtnf_mgmt_stypes[NUM_NL80211_IFTYPES] = {
|
|||
BIT(IEEE80211_STYPE_AUTH >> 4),
|
||||
},
|
||||
[NL80211_IFTYPE_AP] = {
|
||||
.tx = BIT(IEEE80211_STYPE_ACTION >> 4),
|
||||
.tx = BIT(IEEE80211_STYPE_ACTION >> 4) |
|
||||
BIT(IEEE80211_STYPE_AUTH >> 4),
|
||||
.rx = BIT(IEEE80211_STYPE_ACTION >> 4) |
|
||||
BIT(IEEE80211_STYPE_PROBE_REQ >> 4) |
|
||||
BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) |
|
||||
|
@ -101,6 +102,21 @@ qtnf_validate_iface_combinations(struct wiphy *wiphy,
|
|||
|
||||
ret = cfg80211_check_combinations(wiphy, ¶ms);
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Check repeater interface combination: primary VIF should be STA only.
|
||||
* STA (primary) + AP (secondary) is OK.
|
||||
* AP (primary) + STA (secondary) is not supported.
|
||||
*/
|
||||
vif = qtnf_mac_get_base_vif(mac);
|
||||
if (vif && vif->wdev.iftype == NL80211_IFTYPE_AP &&
|
||||
vif != change_vif && new_type == NL80211_IFTYPE_STATION) {
|
||||
ret = -EINVAL;
|
||||
pr_err("MAC%u invalid combination: AP as primary repeater interface is not supported\n",
|
||||
mac->macid);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -679,10 +695,8 @@ qtnf_external_auth(struct wiphy *wiphy, struct net_device *dev,
|
|||
struct qtnf_vif *vif = qtnf_netdev_get_priv(dev);
|
||||
int ret;
|
||||
|
||||
if (vif->wdev.iftype != NL80211_IFTYPE_STATION)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (!ether_addr_equal(vif->bssid, auth->bssid))
|
||||
if (vif->wdev.iftype == NL80211_IFTYPE_STATION &&
|
||||
!ether_addr_equal(vif->bssid, auth->bssid))
|
||||
pr_warn("unexpected bssid: %pM", auth->bssid);
|
||||
|
||||
ret = qtnf_cmd_send_external_auth(vif, auth);
|
||||
|
@ -909,6 +923,26 @@ static int qtnf_set_tx_power(struct wiphy *wiphy, struct wireless_dev *wdev,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int qtnf_update_owe_info(struct wiphy *wiphy, struct net_device *dev,
|
||||
struct cfg80211_update_owe_info *owe_info)
|
||||
{
|
||||
struct qtnf_vif *vif = qtnf_netdev_get_priv(dev);
|
||||
int ret;
|
||||
|
||||
if (vif->wdev.iftype != NL80211_IFTYPE_AP)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
ret = qtnf_cmd_send_update_owe(vif, owe_info);
|
||||
if (ret) {
|
||||
pr_err("VIF%u.%u: failed to update owe info\n",
|
||||
vif->mac->macid, vif->vifid);
|
||||
goto out;
|
||||
}
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int qtnf_suspend(struct wiphy *wiphy, struct cfg80211_wowlan *wowlan)
|
||||
{
|
||||
|
@ -1005,6 +1039,7 @@ static struct cfg80211_ops qtn_cfg80211_ops = {
|
|||
.set_power_mgmt = qtnf_set_power_mgmt,
|
||||
.get_tx_power = qtnf_get_tx_power,
|
||||
.set_tx_power = qtnf_set_tx_power,
|
||||
.update_owe_info = qtnf_update_owe_info,
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = qtnf_suspend,
|
||||
.resume = qtnf_resume,
|
||||
|
@ -1041,7 +1076,8 @@ static void qtnf_cfg80211_reg_notifier(struct wiphy *wiphy,
|
|||
}
|
||||
}
|
||||
|
||||
struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus)
|
||||
struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus,
|
||||
struct platform_device *pdev)
|
||||
{
|
||||
struct wiphy *wiphy;
|
||||
|
||||
|
@ -1056,7 +1092,10 @@ struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus)
|
|||
if (!wiphy)
|
||||
return NULL;
|
||||
|
||||
set_wiphy_dev(wiphy, bus->dev);
|
||||
if (pdev)
|
||||
set_wiphy_dev(wiphy, &pdev->dev);
|
||||
else
|
||||
set_wiphy_dev(wiphy, bus->dev);
|
||||
|
||||
return wiphy;
|
||||
}
|
||||
|
|
|
@ -2211,7 +2211,7 @@ int qtnf_cmd_send_external_auth(struct qtnf_vif *vif,
|
|||
|
||||
cmd = (struct qlink_cmd_external_auth *)cmd_skb->data;
|
||||
|
||||
ether_addr_copy(cmd->bssid, auth->bssid);
|
||||
ether_addr_copy(cmd->peer, auth->bssid);
|
||||
cmd->status = cpu_to_le16(auth->status);
|
||||
|
||||
qtnf_bus_lock(vif->mac->bus);
|
||||
|
@ -2791,3 +2791,39 @@ int qtnf_cmd_netdev_changeupper(const struct qtnf_vif *vif, int br_domain)
|
|||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int qtnf_cmd_send_update_owe(struct qtnf_vif *vif,
|
||||
struct cfg80211_update_owe_info *owe)
|
||||
{
|
||||
struct qlink_cmd_update_owe *cmd;
|
||||
struct sk_buff *cmd_skb;
|
||||
int ret;
|
||||
|
||||
if (sizeof(*cmd) + owe->ie_len > QTNF_MAX_CMD_BUF_SIZE) {
|
||||
pr_warn("VIF%u.%u: OWE update IEs too big: %zu\n",
|
||||
vif->mac->macid, vif->vifid, owe->ie_len);
|
||||
return -E2BIG;
|
||||
}
|
||||
|
||||
cmd_skb = qtnf_cmd_alloc_new_cmdskb(vif->mac->macid, vif->vifid,
|
||||
QLINK_CMD_UPDATE_OWE,
|
||||
sizeof(*cmd));
|
||||
if (!cmd_skb)
|
||||
return -ENOMEM;
|
||||
|
||||
cmd = (struct qlink_cmd_update_owe *)cmd_skb->data;
|
||||
ether_addr_copy(cmd->peer, owe->peer);
|
||||
cmd->status = cpu_to_le16(owe->status);
|
||||
if (owe->ie_len && owe->ie)
|
||||
qtnf_cmd_skb_put_buffer(cmd_skb, owe->ie, owe->ie_len);
|
||||
|
||||
qtnf_bus_lock(vif->mac->bus);
|
||||
ret = qtnf_cmd_send(vif->mac->bus, cmd_skb);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
out:
|
||||
qtnf_bus_unlock(vif->mac->bus);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -76,5 +76,7 @@ int qtnf_cmd_set_tx_power(const struct qtnf_vif *vif,
|
|||
int qtnf_cmd_send_wowlan_set(const struct qtnf_vif *vif,
|
||||
const struct cfg80211_wowlan *wowl);
|
||||
int qtnf_cmd_netdev_changeupper(const struct qtnf_vif *vif, int br_domain);
|
||||
int qtnf_cmd_send_update_owe(struct qtnf_vif *vif,
|
||||
struct cfg80211_update_owe_info *owe);
|
||||
|
||||
#endif /* QLINK_COMMANDS_H_ */
|
||||
|
|
|
@ -431,18 +431,28 @@ static void qtnf_vif_send_data_high_pri(struct work_struct *work)
|
|||
static struct qtnf_wmac *qtnf_core_mac_alloc(struct qtnf_bus *bus,
|
||||
unsigned int macid)
|
||||
{
|
||||
struct platform_device *pdev = NULL;
|
||||
struct qtnf_wmac *mac;
|
||||
struct qtnf_vif *vif;
|
||||
struct wiphy *wiphy;
|
||||
struct qtnf_wmac *mac;
|
||||
unsigned int i;
|
||||
|
||||
wiphy = qtnf_wiphy_allocate(bus);
|
||||
if (bus->hw_info.num_mac > 1) {
|
||||
pdev = platform_device_register_data(bus->dev,
|
||||
dev_name(bus->dev),
|
||||
macid, NULL, 0);
|
||||
if (IS_ERR(pdev))
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
wiphy = qtnf_wiphy_allocate(bus, pdev);
|
||||
if (!wiphy)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
mac = wiphy_priv(wiphy);
|
||||
|
||||
mac->macid = macid;
|
||||
mac->pdev = pdev;
|
||||
mac->bus = bus;
|
||||
mutex_init(&mac->mac_lock);
|
||||
INIT_DELAYED_WORK(&mac->scan_timeout, qtnf_mac_scan_timeout);
|
||||
|
@ -493,7 +503,6 @@ int qtnf_core_net_attach(struct qtnf_wmac *mac, struct qtnf_vif *vif,
|
|||
dev_net_set(dev, wiphy_net(wiphy));
|
||||
dev->ieee80211_ptr = &vif->wdev;
|
||||
ether_addr_copy(dev->dev_addr, vif->mac_addr);
|
||||
SET_NETDEV_DEV(dev, wiphy_dev(wiphy));
|
||||
dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
|
||||
dev->watchdog_timeo = QTNF_DEF_WDOG_TIMEOUT;
|
||||
dev->tx_queue_len = 100;
|
||||
|
@ -505,7 +514,7 @@ int qtnf_core_net_attach(struct qtnf_wmac *mac, struct qtnf_vif *vif,
|
|||
qdev_vif = netdev_priv(dev);
|
||||
*((void **)qdev_vif) = vif;
|
||||
|
||||
SET_NETDEV_DEV(dev, mac->bus->dev);
|
||||
SET_NETDEV_DEV(dev, wiphy_dev(wiphy));
|
||||
|
||||
ret = register_netdevice(dev);
|
||||
if (ret) {
|
||||
|
@ -561,6 +570,7 @@ static void qtnf_core_mac_detach(struct qtnf_bus *bus, unsigned int macid)
|
|||
wiphy->bands[band] = NULL;
|
||||
}
|
||||
|
||||
platform_device_unregister(mac->pdev);
|
||||
qtnf_mac_iface_comb_free(mac);
|
||||
qtnf_mac_ext_caps_free(mac);
|
||||
kfree(mac->macinfo.wowlan);
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/ctype.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include "qlink.h"
|
||||
#include "trans.h"
|
||||
|
@ -107,6 +108,7 @@ struct qtnf_wmac {
|
|||
struct mutex mac_lock; /* lock during wmac speicific ops */
|
||||
struct delayed_work scan_timeout;
|
||||
struct ieee80211_regdomain *rd;
|
||||
struct platform_device *pdev;
|
||||
};
|
||||
|
||||
struct qtnf_hw_info {
|
||||
|
@ -127,7 +129,8 @@ void qtnf_mac_iface_comb_free(struct qtnf_wmac *mac);
|
|||
void qtnf_mac_ext_caps_free(struct qtnf_wmac *mac);
|
||||
bool qtnf_slave_radar_get(void);
|
||||
bool qtnf_dfs_offload_get(void);
|
||||
struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus);
|
||||
struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus,
|
||||
struct platform_device *pdev);
|
||||
int qtnf_core_net_attach(struct qtnf_wmac *mac, struct qtnf_vif *priv,
|
||||
const char *name, unsigned char name_assign_type);
|
||||
void qtnf_main_work_queue(struct work_struct *work);
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue