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xtensa: fix ATOMCTL register documentation

Make the WT entry match table 4-52 of the Xtensa ISA RM (RD-2012.5).

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
hifive-unleashed-5.1
Baruch Siach 2013-11-11 17:15:17 +02:00 committed by Max Filippov
parent abf0ea65e0
commit 5f42146e75
1 changed files with 1 additions and 1 deletions

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@ -40,5 +40,5 @@ See Section 4.3.12.4 of ISA; Bits:
--------- --------------- ----------------- ----------------
0 Exception Exception Exception
1 RCW Transaction RCW Transaction RCW Transaction
2 Internal Operation Exception Reserved
2 Internal Operation Internal Operation Reserved
3 Reserved Reserved Reserved