drm/i915/skl: Update DDI buffer translation programming.
SKL-Y can now use the same programming for all VccIO values after an adjustment to I_boost. SKL-U DP table adjustments. 1. Remove SKL Y 0.95V from "SKL H and S" columns in all tables. The other SKL Y column removes the "0.85V VccIO" so it now applies to all voltages. 2. DP table changes SKL U 400mV+0db dword 0 value from 2016h to 201Bh. 3. DP table changes SKL U 600mv+0db dword 0 value from 2016h to 201Bh. 4. DP table increases I_boost to level 3 for SKL Y 400mv+9.5db. v2: Fix compilation warnings as pointed by Paulo. Reference: Graphics Spec Change r97962 Cc: Arthur Runyan <arthur.j.runyan@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> [Jani: reformatted commit message for shorter lines.] Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -128,7 +128,7 @@ static const struct ddi_buf_trans bdw_ddi_translations_hdmi[] = {
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{ 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */
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{ 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */
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};
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};
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/* Skylake H, S, and Skylake Y with 0.95V VccIO */
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/* Skylake H and S */
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static const struct ddi_buf_trans skl_ddi_translations_dp[] = {
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static const struct ddi_buf_trans skl_ddi_translations_dp[] = {
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{ 0x00002016, 0x000000A0, 0x0 },
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{ 0x00002016, 0x000000A0, 0x0 },
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{ 0x00005012, 0x0000009B, 0x0 },
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{ 0x00005012, 0x0000009B, 0x0 },
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@ -143,23 +143,23 @@ static const struct ddi_buf_trans skl_ddi_translations_dp[] = {
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/* Skylake U */
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/* Skylake U */
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static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = {
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static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = {
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{ 0x00002016, 0x000000A2, 0x0 },
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{ 0x0000201B, 0x000000A2, 0x0 },
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{ 0x00005012, 0x00000088, 0x0 },
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{ 0x00005012, 0x00000088, 0x0 },
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{ 0x00007011, 0x00000087, 0x0 },
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{ 0x00007011, 0x00000087, 0x0 },
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{ 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost */
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{ 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost level 0x1 */
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{ 0x00002016, 0x0000009D, 0x0 },
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{ 0x0000201B, 0x0000009D, 0x0 },
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{ 0x00005012, 0x000000C7, 0x0 },
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{ 0x00005012, 0x000000C7, 0x0 },
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{ 0x00007011, 0x000000C7, 0x0 },
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{ 0x00007011, 0x000000C7, 0x0 },
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{ 0x00002016, 0x00000088, 0x0 },
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{ 0x00002016, 0x00000088, 0x0 },
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{ 0x00005012, 0x000000C7, 0x0 },
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{ 0x00005012, 0x000000C7, 0x0 },
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};
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};
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/* Skylake Y with 0.85V VccIO */
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/* Skylake Y */
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static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = {
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static const struct ddi_buf_trans skl_y_ddi_translations_dp[] = {
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{ 0x00000018, 0x000000A2, 0x0 },
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{ 0x00000018, 0x000000A2, 0x0 },
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{ 0x00005012, 0x00000088, 0x0 },
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{ 0x00005012, 0x00000088, 0x0 },
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{ 0x00007011, 0x00000087, 0x0 },
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{ 0x00007011, 0x00000087, 0x0 },
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{ 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost */
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{ 0x80009010, 0x000000C7, 0x3 }, /* Uses I_boost level 0x3 */
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{ 0x00000018, 0x0000009D, 0x0 },
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{ 0x00000018, 0x0000009D, 0x0 },
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{ 0x00005012, 0x000000C7, 0x0 },
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{ 0x00005012, 0x000000C7, 0x0 },
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{ 0x00007011, 0x000000C7, 0x0 },
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{ 0x00007011, 0x000000C7, 0x0 },
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@ -168,7 +168,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = {
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};
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};
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/*
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/*
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* Skylake H and S, and Skylake Y with 0.95V VccIO
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* Skylake H and S
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* eDP 1.4 low vswing translation parameters
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* eDP 1.4 low vswing translation parameters
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*/
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*/
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static const struct ddi_buf_trans skl_ddi_translations_edp[] = {
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static const struct ddi_buf_trans skl_ddi_translations_edp[] = {
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@ -202,10 +202,10 @@ static const struct ddi_buf_trans skl_u_ddi_translations_edp[] = {
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};
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};
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/*
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/*
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* Skylake Y with 0.95V VccIO
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* Skylake Y
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* eDP 1.4 low vswing translation parameters
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* eDP 1.4 low vswing translation parameters
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*/
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*/
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static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = {
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static const struct ddi_buf_trans skl_y_ddi_translations_edp[] = {
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{ 0x00000018, 0x000000A8, 0x0 },
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{ 0x00000018, 0x000000A8, 0x0 },
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{ 0x00004013, 0x000000AB, 0x0 },
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{ 0x00004013, 0x000000AB, 0x0 },
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{ 0x00007011, 0x000000A4, 0x0 },
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{ 0x00007011, 0x000000A4, 0x0 },
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@ -218,7 +218,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = {
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{ 0x00000018, 0x0000008A, 0x0 },
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{ 0x00000018, 0x0000008A, 0x0 },
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};
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};
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/* Skylake H, S and U, and Skylake Y with 0.95V VccIO */
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/* Skylake U, H and S */
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static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = {
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static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = {
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{ 0x00000018, 0x000000AC, 0x0 },
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{ 0x00000018, 0x000000AC, 0x0 },
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{ 0x00005012, 0x0000009D, 0x0 },
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{ 0x00005012, 0x0000009D, 0x0 },
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@ -233,8 +233,8 @@ static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = {
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{ 0x00000018, 0x000000C7, 0x0 },
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{ 0x00000018, 0x000000C7, 0x0 },
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};
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};
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/* Skylake Y with 0.85V VccIO */
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/* Skylake Y */
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static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = {
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static const struct ddi_buf_trans skl_y_ddi_translations_hdmi[] = {
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{ 0x00000018, 0x000000A1, 0x0 },
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{ 0x00000018, 0x000000A1, 0x0 },
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{ 0x00005012, 0x000000DF, 0x0 },
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{ 0x00005012, 0x000000DF, 0x0 },
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{ 0x00007011, 0x00000084, 0x0 },
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{ 0x00007011, 0x00000084, 0x0 },
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@ -244,7 +244,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = {
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{ 0x00006013, 0x000000C7, 0x0 },
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{ 0x00006013, 0x000000C7, 0x0 },
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{ 0x00000018, 0x0000008A, 0x0 },
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{ 0x00000018, 0x0000008A, 0x0 },
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{ 0x00003015, 0x000000C7, 0x0 }, /* Default */
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{ 0x00003015, 0x000000C7, 0x0 }, /* Default */
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{ 0x80003015, 0x000000C7, 0x7 }, /* Uses I_boost */
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{ 0x80003015, 0x000000C7, 0x7 }, /* Uses I_boost level 0x7 */
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{ 0x00000018, 0x000000C7, 0x0 },
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{ 0x00000018, 0x000000C7, 0x0 },
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};
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};
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@ -335,19 +335,11 @@ intel_dig_port_supports_hdmi(const struct intel_digital_port *intel_dig_port)
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static const struct ddi_buf_trans *skl_get_buf_trans_dp(struct drm_device *dev,
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static const struct ddi_buf_trans *skl_get_buf_trans_dp(struct drm_device *dev,
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int *n_entries)
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int *n_entries)
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{
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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const struct ddi_buf_trans *ddi_translations;
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const struct ddi_buf_trans *ddi_translations;
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static int is_095v = -1;
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if (is_095v == -1) {
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if (IS_SKL_ULX(dev)) {
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u32 spr1 = I915_READ(UAIMI_SPR1);
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ddi_translations = skl_y_ddi_translations_dp;
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*n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp);
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is_095v = spr1 & SKL_VCCIO_MASK;
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}
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if (IS_SKL_ULX(dev) && !is_095v) {
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ddi_translations = skl_y_085v_ddi_translations_dp;
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*n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_dp);
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} else if (IS_SKL_ULT(dev)) {
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} else if (IS_SKL_ULT(dev)) {
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ddi_translations = skl_u_ddi_translations_dp;
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ddi_translations = skl_u_ddi_translations_dp;
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*n_entries = ARRAY_SIZE(skl_u_ddi_translations_dp);
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*n_entries = ARRAY_SIZE(skl_u_ddi_translations_dp);
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@ -364,23 +356,14 @@ static const struct ddi_buf_trans *skl_get_buf_trans_edp(struct drm_device *dev,
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{
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_private *dev_priv = dev->dev_private;
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const struct ddi_buf_trans *ddi_translations;
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const struct ddi_buf_trans *ddi_translations;
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static int is_095v = -1;
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if (is_095v == -1) {
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if (IS_SKL_ULX(dev)) {
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u32 spr1 = I915_READ(UAIMI_SPR1);
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is_095v = spr1 & SKL_VCCIO_MASK;
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}
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if (IS_SKL_ULX(dev) && !is_095v) {
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if (dev_priv->edp_low_vswing) {
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if (dev_priv->edp_low_vswing) {
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ddi_translations = skl_y_085v_ddi_translations_edp;
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ddi_translations = skl_y_ddi_translations_edp;
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*n_entries =
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*n_entries = ARRAY_SIZE(skl_y_ddi_translations_edp);
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ARRAY_SIZE(skl_y_085v_ddi_translations_edp);
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} else {
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} else {
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ddi_translations = skl_y_085v_ddi_translations_dp;
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ddi_translations = skl_y_ddi_translations_dp;
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*n_entries =
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*n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp);
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ARRAY_SIZE(skl_y_085v_ddi_translations_dp);
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}
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}
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} else if (IS_SKL_ULT(dev)) {
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} else if (IS_SKL_ULT(dev)) {
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if (dev_priv->edp_low_vswing) {
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if (dev_priv->edp_low_vswing) {
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@ -407,19 +390,11 @@ static const struct ddi_buf_trans *
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skl_get_buf_trans_hdmi(struct drm_device *dev,
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skl_get_buf_trans_hdmi(struct drm_device *dev,
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int *n_entries)
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int *n_entries)
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{
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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const struct ddi_buf_trans *ddi_translations;
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const struct ddi_buf_trans *ddi_translations;
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static int is_095v = -1;
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if (is_095v == -1) {
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if (IS_SKL_ULX(dev)) {
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u32 spr1 = I915_READ(UAIMI_SPR1);
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ddi_translations = skl_y_ddi_translations_hdmi;
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*n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
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is_095v = spr1 & SKL_VCCIO_MASK;
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}
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if (IS_SKL_ULX(dev) && !is_095v) {
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ddi_translations = skl_y_085v_ddi_translations_hdmi;
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*n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_hdmi);
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} else {
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} else {
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ddi_translations = skl_ddi_translations_hdmi;
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ddi_translations = skl_ddi_translations_hdmi;
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*n_entries = ARRAY_SIZE(skl_ddi_translations_hdmi);
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*n_entries = ARRAY_SIZE(skl_ddi_translations_hdmi);
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