drm/i915: Fix incorrect definition of ADPA HSYNC and VSYNC bits
Disable bits for ADPA HSYNC and VSYNC where mixed up resulting in suspend becoming standby and vice versa. Fixed by swapping their bit position. Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1613,9 +1613,9 @@
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#define ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1<<16)
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#define ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1<<16)
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#define ADPA_USE_VGA_HVPOLARITY (1<<15)
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#define ADPA_USE_VGA_HVPOLARITY (1<<15)
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#define ADPA_SETS_HVPOLARITY 0
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#define ADPA_SETS_HVPOLARITY 0
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#define ADPA_VSYNC_CNTL_DISABLE (1<<11)
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#define ADPA_VSYNC_CNTL_DISABLE (1<<10)
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#define ADPA_VSYNC_CNTL_ENABLE 0
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#define ADPA_VSYNC_CNTL_ENABLE 0
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#define ADPA_HSYNC_CNTL_DISABLE (1<<10)
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#define ADPA_HSYNC_CNTL_DISABLE (1<<11)
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#define ADPA_HSYNC_CNTL_ENABLE 0
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#define ADPA_HSYNC_CNTL_ENABLE 0
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#define ADPA_VSYNC_ACTIVE_HIGH (1<<4)
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#define ADPA_VSYNC_ACTIVE_HIGH (1<<4)
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#define ADPA_VSYNC_ACTIVE_LOW 0
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#define ADPA_VSYNC_ACTIVE_LOW 0
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