mmc: core: Fix select power class after resume
Use the saved values in card->ext_csd when selecting power class. By doing this the power class will be selected even if mmc_init_card is called with oldcard != NULL, which is the case after a suspend/resume. Today ext_csd is NULL if mmc_init_card is called with oldcard != NULL and power class will not be selected. According to the eMMC specification the POWER_CLASS value is reset after power failure, H/W reset assertion and any CMD0 reset. Signed-off-by: Fredrik Soderstedt <fredrik.soderstedt@stericsson.com> Reviewed-by: Johan Rudholm <jrudholm@gmail.com> Acked By: Girish K S <girish.shivananjappa@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
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07a6821608
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6044371219
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@ -461,6 +461,24 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd)
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*/
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*/
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card->ext_csd.boot_ro_lock = ext_csd[EXT_CSD_BOOT_WP];
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card->ext_csd.boot_ro_lock = ext_csd[EXT_CSD_BOOT_WP];
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card->ext_csd.boot_ro_lockable = true;
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card->ext_csd.boot_ro_lockable = true;
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/* Save power class values */
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card->ext_csd.raw_pwr_cl_52_195 =
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ext_csd[EXT_CSD_PWR_CL_52_195];
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card->ext_csd.raw_pwr_cl_26_195 =
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ext_csd[EXT_CSD_PWR_CL_26_195];
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card->ext_csd.raw_pwr_cl_52_360 =
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ext_csd[EXT_CSD_PWR_CL_52_360];
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card->ext_csd.raw_pwr_cl_26_360 =
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ext_csd[EXT_CSD_PWR_CL_26_360];
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card->ext_csd.raw_pwr_cl_200_195 =
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ext_csd[EXT_CSD_PWR_CL_200_195];
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card->ext_csd.raw_pwr_cl_200_360 =
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ext_csd[EXT_CSD_PWR_CL_200_360];
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card->ext_csd.raw_pwr_cl_ddr_52_195 =
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ext_csd[EXT_CSD_PWR_CL_DDR_52_195];
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card->ext_csd.raw_pwr_cl_ddr_52_360 =
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ext_csd[EXT_CSD_PWR_CL_DDR_52_360];
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}
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}
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if (card->ext_csd.rev >= 5) {
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if (card->ext_csd.rev >= 5) {
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@ -607,7 +625,23 @@ static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width)
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(card->ext_csd.raw_sectors[2] ==
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(card->ext_csd.raw_sectors[2] ==
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bw_ext_csd[EXT_CSD_SEC_CNT + 2]) &&
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bw_ext_csd[EXT_CSD_SEC_CNT + 2]) &&
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(card->ext_csd.raw_sectors[3] ==
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(card->ext_csd.raw_sectors[3] ==
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bw_ext_csd[EXT_CSD_SEC_CNT + 3]));
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bw_ext_csd[EXT_CSD_SEC_CNT + 3]) &&
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(card->ext_csd.raw_pwr_cl_52_195 ==
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bw_ext_csd[EXT_CSD_PWR_CL_52_195]) &&
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(card->ext_csd.raw_pwr_cl_26_195 ==
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bw_ext_csd[EXT_CSD_PWR_CL_26_195]) &&
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(card->ext_csd.raw_pwr_cl_52_360 ==
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bw_ext_csd[EXT_CSD_PWR_CL_52_360]) &&
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(card->ext_csd.raw_pwr_cl_26_360 ==
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bw_ext_csd[EXT_CSD_PWR_CL_26_360]) &&
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(card->ext_csd.raw_pwr_cl_200_195 ==
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bw_ext_csd[EXT_CSD_PWR_CL_200_195]) &&
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(card->ext_csd.raw_pwr_cl_200_360 ==
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bw_ext_csd[EXT_CSD_PWR_CL_200_360]) &&
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(card->ext_csd.raw_pwr_cl_ddr_52_195 ==
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bw_ext_csd[EXT_CSD_PWR_CL_DDR_52_195]) &&
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(card->ext_csd.raw_pwr_cl_ddr_52_360 ==
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bw_ext_csd[EXT_CSD_PWR_CL_DDR_52_360]));
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if (err)
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if (err)
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err = -EINVAL;
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err = -EINVAL;
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@ -676,11 +710,10 @@ static struct device_type mmc_type = {
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* mmc_switch command.
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* mmc_switch command.
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*/
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*/
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static int mmc_select_powerclass(struct mmc_card *card,
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static int mmc_select_powerclass(struct mmc_card *card,
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unsigned int bus_width, u8 *ext_csd)
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unsigned int bus_width)
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{
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{
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int err = 0;
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int err = 0;
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unsigned int pwrclass_val;
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unsigned int pwrclass_val = 0;
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unsigned int index = 0;
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struct mmc_host *host;
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struct mmc_host *host;
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BUG_ON(!card);
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BUG_ON(!card);
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@ -688,9 +721,6 @@ static int mmc_select_powerclass(struct mmc_card *card,
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host = card->host;
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host = card->host;
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BUG_ON(!host);
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BUG_ON(!host);
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if (ext_csd == NULL)
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return 0;
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/* Power class selection is supported for versions >= 4.0 */
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/* Power class selection is supported for versions >= 4.0 */
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if (card->csd.mmca_vsn < CSD_SPEC_VER_4)
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if (card->csd.mmca_vsn < CSD_SPEC_VER_4)
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return 0;
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return 0;
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@ -702,13 +732,13 @@ static int mmc_select_powerclass(struct mmc_card *card,
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switch (1 << host->ios.vdd) {
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switch (1 << host->ios.vdd) {
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case MMC_VDD_165_195:
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case MMC_VDD_165_195:
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if (host->ios.clock <= 26000000)
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if (host->ios.clock <= 26000000)
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index = EXT_CSD_PWR_CL_26_195;
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pwrclass_val = card->ext_csd.raw_pwr_cl_26_195;
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else if (host->ios.clock <= 52000000)
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else if (host->ios.clock <= 52000000)
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index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
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pwrclass_val = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
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EXT_CSD_PWR_CL_52_195 :
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card->ext_csd.raw_pwr_cl_52_195 :
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EXT_CSD_PWR_CL_DDR_52_195;
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card->ext_csd.raw_pwr_cl_ddr_52_195;
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else if (host->ios.clock <= 200000000)
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else if (host->ios.clock <= 200000000)
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index = EXT_CSD_PWR_CL_200_195;
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pwrclass_val = card->ext_csd.raw_pwr_cl_200_195;
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break;
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break;
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case MMC_VDD_27_28:
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case MMC_VDD_27_28:
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case MMC_VDD_28_29:
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case MMC_VDD_28_29:
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@ -720,13 +750,13 @@ static int mmc_select_powerclass(struct mmc_card *card,
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case MMC_VDD_34_35:
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case MMC_VDD_34_35:
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case MMC_VDD_35_36:
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case MMC_VDD_35_36:
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if (host->ios.clock <= 26000000)
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if (host->ios.clock <= 26000000)
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index = EXT_CSD_PWR_CL_26_360;
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pwrclass_val = card->ext_csd.raw_pwr_cl_26_360;
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else if (host->ios.clock <= 52000000)
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else if (host->ios.clock <= 52000000)
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index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
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pwrclass_val = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
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EXT_CSD_PWR_CL_52_360 :
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card->ext_csd.raw_pwr_cl_52_360 :
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EXT_CSD_PWR_CL_DDR_52_360;
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card->ext_csd.raw_pwr_cl_ddr_52_360;
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else if (host->ios.clock <= 200000000)
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else if (host->ios.clock <= 200000000)
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index = EXT_CSD_PWR_CL_200_360;
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pwrclass_val = card->ext_csd.raw_pwr_cl_200_360;
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break;
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break;
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default:
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default:
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pr_warning("%s: Voltage range not supported "
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pr_warning("%s: Voltage range not supported "
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@ -734,8 +764,6 @@ static int mmc_select_powerclass(struct mmc_card *card,
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return -EINVAL;
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return -EINVAL;
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}
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}
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pwrclass_val = ext_csd[index];
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if (bus_width & (EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_BUS_WIDTH_8))
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if (bus_width & (EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_BUS_WIDTH_8))
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pwrclass_val = (pwrclass_val & EXT_CSD_PWR_CL_8BIT_MASK) >>
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pwrclass_val = (pwrclass_val & EXT_CSD_PWR_CL_8BIT_MASK) >>
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EXT_CSD_PWR_CL_8BIT_SHIFT;
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EXT_CSD_PWR_CL_8BIT_SHIFT;
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@ -1131,7 +1159,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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ext_csd_bits = (bus_width == MMC_BUS_WIDTH_8) ?
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ext_csd_bits = (bus_width == MMC_BUS_WIDTH_8) ?
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EXT_CSD_BUS_WIDTH_8 : EXT_CSD_BUS_WIDTH_4;
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EXT_CSD_BUS_WIDTH_8 : EXT_CSD_BUS_WIDTH_4;
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err = mmc_select_powerclass(card, ext_csd_bits, ext_csd);
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err = mmc_select_powerclass(card, ext_csd_bits);
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if (err)
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if (err)
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pr_warning("%s: power class selection to bus width %d"
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pr_warning("%s: power class selection to bus width %d"
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" failed\n", mmc_hostname(card->host),
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" failed\n", mmc_hostname(card->host),
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@ -1164,8 +1192,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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bus_width = bus_widths[idx];
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bus_width = bus_widths[idx];
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if (bus_width == MMC_BUS_WIDTH_1)
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if (bus_width == MMC_BUS_WIDTH_1)
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ddr = 0; /* no DDR for 1-bit width */
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ddr = 0; /* no DDR for 1-bit width */
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err = mmc_select_powerclass(card, ext_csd_bits[idx][0],
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err = mmc_select_powerclass(card, ext_csd_bits[idx][0]);
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ext_csd);
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if (err)
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if (err)
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pr_warning("%s: power class selection to "
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pr_warning("%s: power class selection to "
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"bus width %d failed\n",
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"bus width %d failed\n",
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@ -1195,8 +1222,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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}
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}
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if (!err && ddr) {
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if (!err && ddr) {
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err = mmc_select_powerclass(card, ext_csd_bits[idx][1],
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err = mmc_select_powerclass(card, ext_csd_bits[idx][1]);
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ext_csd);
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if (err)
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if (err)
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pr_warning("%s: power class selection to "
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pr_warning("%s: power class selection to "
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"bus width %d ddr %d failed\n",
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"bus width %d ddr %d failed\n",
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@ -94,7 +94,11 @@ struct mmc_ext_csd {
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u8 raw_ext_csd_structure; /* 194 */
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u8 raw_ext_csd_structure; /* 194 */
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u8 raw_card_type; /* 196 */
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u8 raw_card_type; /* 196 */
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u8 out_of_int_time; /* 198 */
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u8 out_of_int_time; /* 198 */
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u8 raw_s_a_timeout; /* 217 */
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u8 raw_pwr_cl_52_195; /* 200 */
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u8 raw_pwr_cl_26_195; /* 201 */
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u8 raw_pwr_cl_52_360; /* 202 */
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u8 raw_pwr_cl_26_360; /* 203 */
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u8 raw_s_a_timeout; /* 217 */
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u8 raw_hc_erase_gap_size; /* 221 */
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u8 raw_hc_erase_gap_size; /* 221 */
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u8 raw_erase_timeout_mult; /* 223 */
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u8 raw_erase_timeout_mult; /* 223 */
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u8 raw_hc_erase_grp_size; /* 224 */
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u8 raw_hc_erase_grp_size; /* 224 */
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@ -102,6 +106,10 @@ struct mmc_ext_csd {
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u8 raw_sec_erase_mult; /* 230 */
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u8 raw_sec_erase_mult; /* 230 */
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u8 raw_sec_feature_support;/* 231 */
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u8 raw_sec_feature_support;/* 231 */
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u8 raw_trim_mult; /* 232 */
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u8 raw_trim_mult; /* 232 */
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u8 raw_pwr_cl_200_195; /* 236 */
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u8 raw_pwr_cl_200_360; /* 237 */
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u8 raw_pwr_cl_ddr_52_195; /* 238 */
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u8 raw_pwr_cl_ddr_52_360; /* 239 */
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u8 raw_bkops_status; /* 246 */
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u8 raw_bkops_status; /* 246 */
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u8 raw_sectors[4]; /* 212 - 4 bytes */
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u8 raw_sectors[4]; /* 212 - 4 bytes */
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