ASoC: da7210: Minor bugfix for non pll slave mode
This patch fixes a bug discovered during testing of non pll slave mode. Due to the bug chip was not getting correctly configured and as a result there was no sound output while playback. After applying this patch, both pll and non pll modes work fine. Signed-off-by: Ashish Chavan <ashish.chavan@kpitcummins.com> Signed-off-by: David Dajun Chen <dchen@diasemi.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -1159,8 +1159,9 @@ static int da7210_probe(struct snd_soc_codec *codec)
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/* Enable Aux2 */
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snd_soc_write(codec, DA7210_AUX2, DA7210_AUX2_EN);
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/* Set PLL Master clock range 10-20 MHz */
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snd_soc_write(codec, DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ);
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/* Set PLL Master clock range 10-20 MHz, enable PLL bypass */
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snd_soc_write(codec, DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ |
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DA7210_PLL_BYP);
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/* Diable PLL and bypass it */
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snd_soc_write(codec, DA7210_PLL, DA7210_PLL_FS_48000);
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@ -1191,8 +1192,8 @@ static struct reg_default da7210_regmap_i2c_patch[] = {
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/* System controller master disable */
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{ DA7210_STARTUP1, 0x00 },
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/* make sure that DA7210 use bypass mode before start up */
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{ DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ | DA7210_PLL_BYP },
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/* Set PLL Master clock range 10-20 MHz */
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{ DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ },
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/* to unlock */
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{ DA7210_A_HID_UNLOCK, 0x8B},
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@ -1290,8 +1291,8 @@ static struct reg_default da7210_regmap_spi_patch[] = {
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/* System controller master disable */
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{ DA7210_STARTUP1, 0x00 },
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/* make sure that DA7210 use bypass mode before start up */
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{ DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ | DA7210_PLL_BYP },
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/* Set PLL Master clock range 10-20 MHz */
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{ DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ },
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/* to set PAGE1 of SPI register space */
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{ DA7210_PAGE_CONTROL, 0x80 },
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