drm/amdgpu: add DCE golden setting for ELM/BAF
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -132,6 +132,22 @@ static const u32 stoney_golden_settings_a11[] =
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mmFBC_MISC, 0x1f311fff, 0x14302000,
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mmFBC_MISC, 0x1f311fff, 0x14302000,
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};
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};
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static const u32 baffin_golden_settings_a11[] =
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{
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mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
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mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
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mmFBC_DEBUG1, 0xffffffff, 0x00000008,
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mmFBC_MISC, 0x9f313fff, 0x14300008,
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mmHDMI_CONTROL, 0x313f031f, 0x00000011,
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};
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static const u32 ellesmere_golden_settings_a11[] =
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{
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mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
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mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
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mmFBC_MISC, 0x9f313fff, 0x14300008,
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mmHDMI_CONTROL, 0x313f031f, 0x00000011,
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};
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static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev)
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static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev)
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{
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{
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@ -149,6 +165,16 @@ static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev)
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stoney_golden_settings_a11,
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stoney_golden_settings_a11,
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(const u32)ARRAY_SIZE(stoney_golden_settings_a11));
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(const u32)ARRAY_SIZE(stoney_golden_settings_a11));
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break;
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break;
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case CHIP_BAFFIN:
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amdgpu_program_register_sequence(adev,
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baffin_golden_settings_a11,
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(const u32)ARRAY_SIZE(baffin_golden_settings_a11));
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break;
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case CHIP_ELLESMERE:
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amdgpu_program_register_sequence(adev,
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ellesmere_golden_settings_a11,
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(const u32)ARRAY_SIZE(ellesmere_golden_settings_a11));
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break;
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default:
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default:
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break;
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break;
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}
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}
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