drm/i915: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg
This patch Removes the VS_TIMER_DISPATCH bit enable in MI MODE reg for platforms > Gen6. VS_TIMER_DISPATCH bit enable was earlier required as a part of WA 'WaTimedSingleVertexDispatch', which is now applicable only to platforms < Gen7. v2: Enhancing the scope of the patch to full Gen7 (Chris) v3: Modifying the WA condition to the cover the applicable platforms, and adding the WA name in comments. (Ville) Signed-off-by: Akash Goel <akash.goel@intel.com> Signed-off-by: Sourab Gupta <sourab.gupta@intel.com> Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # ivb, hsw -Chris Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -566,7 +566,8 @@ static int init_render_ring(struct intel_ring_buffer *ring)
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struct drm_i915_private *dev_priv = dev->dev_private;
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int ret = init_ring_common(ring);
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if (INTEL_INFO(dev)->gen > 3)
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/* WaTimedSingleVertexDispatch:cl,bw,ctg,elk,ilk,snb */
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if (INTEL_INFO(dev)->gen >= 4 && INTEL_INFO(dev)->gen < 7)
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I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));
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/* We need to disable the AsyncFlip performance optimisations in order
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