drm/nouveau/fuse: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>hifive-unleashed-5.1
parent
639c308eff
commit
630ec6c0d3
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@ -237,5 +237,6 @@
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#define nouveau_fb nvkm_fb
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#define nouveau_fb nvkm_fb
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#define nouveau_fb_tile nvkm_fb_tile
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#define nouveau_fb_tile nvkm_fb_tile
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#define nvc0_pte_storage_type_map gf100_pte_storage_type_map
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#define nvc0_pte_storage_type_map gf100_pte_storage_type_map
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#define nouveau_fuse nvkm_fuse
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#endif
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#endif
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@ -1,30 +1,28 @@
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#ifndef __NOUVEAU_FUSE_H__
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#ifndef __NVKM_FUSE_H__
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#define __NOUVEAU_FUSE_H__
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#define __NVKM_FUSE_H__
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#include <core/subdev.h>
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#include <core/subdev.h>
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#include <core/device.h>
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#include <core/device.h>
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struct nouveau_fuse {
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struct nvkm_fuse {
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struct nouveau_subdev base;
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struct nvkm_subdev base;
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};
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};
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static inline struct nouveau_fuse *
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static inline struct nvkm_fuse *
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nouveau_fuse(void *obj)
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nvkm_fuse(void *obj)
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{
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{
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return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_FUSE);
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return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_FUSE);
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}
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}
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#define nouveau_fuse_create(p, e, o, d) \
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#define nvkm_fuse_create(p, e, o, d) \
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nouveau_fuse_create_((p), (e), (o), sizeof(**d), (void **)d)
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nvkm_fuse_create_((p), (e), (o), sizeof(**d), (void **)d)
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int nouveau_fuse_create_(struct nouveau_object *, struct nouveau_object *,
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int nvkm_fuse_create_(struct nvkm_object *, struct nvkm_object *,
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struct nouveau_oclass *, int, void **);
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struct nvkm_oclass *, int, void **);
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void _nouveau_fuse_dtor(struct nouveau_object *);
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void _nvkm_fuse_dtor(struct nvkm_object *);
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int _nouveau_fuse_init(struct nouveau_object *);
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int _nvkm_fuse_init(struct nvkm_object *);
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#define _nouveau_fuse_fini _nouveau_subdev_fini
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#define _nvkm_fuse_fini _nvkm_subdev_fini
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extern struct nouveau_oclass g80_fuse_oclass;
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extern struct nouveau_oclass gf100_fuse_oclass;
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extern struct nouveau_oclass gm107_fuse_oclass;
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extern struct nvkm_oclass nv50_fuse_oclass;
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extern struct nvkm_oclass gf100_fuse_oclass;
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extern struct nvkm_oclass gm107_fuse_oclass;
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#endif
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#endif
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@ -66,7 +66,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = nv50_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = nv50_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -92,7 +92,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -121,7 +121,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -150,7 +150,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -179,7 +179,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -208,7 +208,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -237,7 +237,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -266,7 +266,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -295,7 +295,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -324,7 +324,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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@ -444,7 +444,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass;
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device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
|
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||||
|
|
|
@ -1,4 +1,4 @@
|
||||||
nvkm-y += nvkm/subdev/fuse/base.o
|
nvkm-y += nvkm/subdev/fuse/base.o
|
||||||
nvkm-y += nvkm/subdev/fuse/g80.o
|
nvkm-y += nvkm/subdev/fuse/nv50.o
|
||||||
nvkm-y += nvkm/subdev/fuse/gf100.o
|
nvkm-y += nvkm/subdev/fuse/gf100.o
|
||||||
nvkm-y += nvkm/subdev/fuse/gm107.o
|
nvkm-y += nvkm/subdev/fuse/gm107.o
|
||||||
|
|
|
@ -21,34 +21,31 @@
|
||||||
*
|
*
|
||||||
* Authors: Martin Peres
|
* Authors: Martin Peres
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <subdev/fuse.h>
|
#include <subdev/fuse.h>
|
||||||
|
|
||||||
int
|
int
|
||||||
_nouveau_fuse_init(struct nouveau_object *object)
|
_nvkm_fuse_init(struct nvkm_object *object)
|
||||||
{
|
{
|
||||||
struct nouveau_fuse *fuse = (void *)object;
|
struct nvkm_fuse *fuse = (void *)object;
|
||||||
return nouveau_subdev_init(&fuse->base);
|
return nvkm_subdev_init(&fuse->base);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
_nouveau_fuse_dtor(struct nouveau_object *object)
|
_nvkm_fuse_dtor(struct nvkm_object *object)
|
||||||
{
|
{
|
||||||
struct nouveau_fuse *fuse = (void *)object;
|
struct nvkm_fuse *fuse = (void *)object;
|
||||||
nouveau_subdev_destroy(&fuse->base);
|
nvkm_subdev_destroy(&fuse->base);
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nouveau_fuse_create_(struct nouveau_object *parent,
|
nvkm_fuse_create_(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||||
struct nouveau_object *engine,
|
struct nvkm_oclass *oclass, int length, void **pobject)
|
||||||
struct nouveau_oclass *oclass, int length, void **pobject)
|
|
||||||
{
|
{
|
||||||
struct nouveau_fuse *fuse;
|
struct nvkm_fuse *fuse;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = nouveau_subdev_create_(parent, engine, oclass, 0, "FUSE",
|
ret = nvkm_subdev_create_(parent, engine, oclass, 0, "FUSE",
|
||||||
"fuse", length, pobject);
|
"fuse", length, pobject);
|
||||||
fuse = *pobject;
|
fuse = *pobject;
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -21,63 +21,58 @@
|
||||||
*
|
*
|
||||||
* Authors: Martin Peres
|
* Authors: Martin Peres
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "priv.h"
|
#include "priv.h"
|
||||||
|
|
||||||
struct gf100_fuse_priv {
|
struct gf100_fuse_priv {
|
||||||
struct nouveau_fuse base;
|
struct nvkm_fuse base;
|
||||||
|
|
||||||
spinlock_t fuse_enable_lock;
|
spinlock_t fuse_enable_lock;
|
||||||
};
|
};
|
||||||
|
|
||||||
static u32
|
static u32
|
||||||
gf100_fuse_rd32(struct nouveau_object *object, u64 addr)
|
gf100_fuse_rd32(struct nvkm_object *object, u64 addr)
|
||||||
{
|
{
|
||||||
struct gf100_fuse_priv *priv = (void *)object;
|
struct gf100_fuse_priv *priv = (void *)object;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
u32 fuse_enable, unk, val;
|
u32 fuse_enable, unk, val;
|
||||||
|
|
||||||
|
/* racy if another part of nvkm start writing to these regs */
|
||||||
spin_lock_irqsave(&priv->fuse_enable_lock, flags);
|
spin_lock_irqsave(&priv->fuse_enable_lock, flags);
|
||||||
|
|
||||||
/* racy if another part of nouveau start writing to these regs */
|
|
||||||
fuse_enable = nv_mask(priv, 0x22400, 0x800, 0x800);
|
fuse_enable = nv_mask(priv, 0x22400, 0x800, 0x800);
|
||||||
unk = nv_mask(priv, 0x21000, 0x1, 0x1);
|
unk = nv_mask(priv, 0x21000, 0x1, 0x1);
|
||||||
val = nv_rd32(priv, 0x21100 + addr);
|
val = nv_rd32(priv, 0x21100 + addr);
|
||||||
nv_wr32(priv, 0x21000, unk);
|
nv_wr32(priv, 0x21000, unk);
|
||||||
nv_wr32(priv, 0x22400, fuse_enable);
|
nv_wr32(priv, 0x22400, fuse_enable);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&priv->fuse_enable_lock, flags);
|
spin_unlock_irqrestore(&priv->fuse_enable_lock, flags);
|
||||||
|
|
||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static int
|
static int
|
||||||
gf100_fuse_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
|
gf100_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||||
struct nouveau_oclass *oclass, void *data, u32 size,
|
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||||
struct nouveau_object **pobject)
|
struct nvkm_object **pobject)
|
||||||
{
|
{
|
||||||
struct gf100_fuse_priv *priv;
|
struct gf100_fuse_priv *priv;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = nouveau_fuse_create(parent, engine, oclass, &priv);
|
ret = nvkm_fuse_create(parent, engine, oclass, &priv);
|
||||||
*pobject = nv_object(priv);
|
*pobject = nv_object(priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
spin_lock_init(&priv->fuse_enable_lock);
|
spin_lock_init(&priv->fuse_enable_lock);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct nouveau_oclass
|
struct nvkm_oclass
|
||||||
gf100_fuse_oclass = {
|
gf100_fuse_oclass = {
|
||||||
.handle = NV_SUBDEV(FUSE, 0xC0),
|
.handle = NV_SUBDEV(FUSE, 0xC0),
|
||||||
.ofuncs = &(struct nouveau_ofuncs) {
|
.ofuncs = &(struct nvkm_ofuncs) {
|
||||||
.ctor = gf100_fuse_ctor,
|
.ctor = gf100_fuse_ctor,
|
||||||
.dtor = _nouveau_fuse_dtor,
|
.dtor = _nvkm_fuse_dtor,
|
||||||
.init = _nouveau_fuse_init,
|
.init = _nvkm_fuse_init,
|
||||||
.fini = _nouveau_fuse_fini,
|
.fini = _nvkm_fuse_fini,
|
||||||
.rd32 = gf100_fuse_rd32,
|
.rd32 = gf100_fuse_rd32,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -21,31 +21,29 @@
|
||||||
*
|
*
|
||||||
* Authors: Martin Peres
|
* Authors: Martin Peres
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "priv.h"
|
#include "priv.h"
|
||||||
|
|
||||||
struct gm107_fuse_priv {
|
struct gm107_fuse_priv {
|
||||||
struct nouveau_fuse base;
|
struct nvkm_fuse base;
|
||||||
};
|
};
|
||||||
|
|
||||||
static u32
|
static u32
|
||||||
gm107_fuse_rd32(struct nouveau_object *object, u64 addr)
|
gm107_fuse_rd32(struct nvkm_object *object, u64 addr)
|
||||||
{
|
{
|
||||||
struct gf100_fuse_priv *priv = (void *)object;
|
struct gf100_fuse_priv *priv = (void *)object;
|
||||||
|
|
||||||
return nv_rd32(priv, 0x21100 + addr);
|
return nv_rd32(priv, 0x21100 + addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static int
|
static int
|
||||||
gm107_fuse_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
|
gm107_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||||
struct nouveau_oclass *oclass, void *data, u32 size,
|
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||||
struct nouveau_object **pobject)
|
struct nvkm_object **pobject)
|
||||||
{
|
{
|
||||||
struct gm107_fuse_priv *priv;
|
struct gm107_fuse_priv *priv;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = nouveau_fuse_create(parent, engine, oclass, &priv);
|
ret = nvkm_fuse_create(parent, engine, oclass, &priv);
|
||||||
*pobject = nv_object(priv);
|
*pobject = nv_object(priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -53,14 +51,14 @@ gm107_fuse_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct nouveau_oclass
|
struct nvkm_oclass
|
||||||
gm107_fuse_oclass = {
|
gm107_fuse_oclass = {
|
||||||
.handle = NV_SUBDEV(FUSE, 0x117),
|
.handle = NV_SUBDEV(FUSE, 0x117),
|
||||||
.ofuncs = &(struct nouveau_ofuncs) {
|
.ofuncs = &(struct nvkm_ofuncs) {
|
||||||
.ctor = gm107_fuse_ctor,
|
.ctor = gm107_fuse_ctor,
|
||||||
.dtor = _nouveau_fuse_dtor,
|
.dtor = _nvkm_fuse_dtor,
|
||||||
.init = _nouveau_fuse_init,
|
.init = _nvkm_fuse_init,
|
||||||
.fini = _nouveau_fuse_fini,
|
.fini = _nvkm_fuse_fini,
|
||||||
.rd32 = gm107_fuse_rd32,
|
.rd32 = gm107_fuse_rd32,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -21,61 +21,56 @@
|
||||||
*
|
*
|
||||||
* Authors: Martin Peres
|
* Authors: Martin Peres
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "priv.h"
|
#include "priv.h"
|
||||||
|
|
||||||
struct g80_fuse_priv {
|
struct nv50_fuse_priv {
|
||||||
struct nouveau_fuse base;
|
struct nvkm_fuse base;
|
||||||
|
|
||||||
spinlock_t fuse_enable_lock;
|
spinlock_t fuse_enable_lock;
|
||||||
};
|
};
|
||||||
|
|
||||||
static u32
|
static u32
|
||||||
g80_fuse_rd32(struct nouveau_object *object, u64 addr)
|
nv50_fuse_rd32(struct nvkm_object *object, u64 addr)
|
||||||
{
|
{
|
||||||
struct g80_fuse_priv *priv = (void *)object;
|
struct nv50_fuse_priv *priv = (void *)object;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
u32 fuse_enable, val;
|
u32 fuse_enable, val;
|
||||||
|
|
||||||
|
/* racy if another part of nvkm start writing to this reg */
|
||||||
spin_lock_irqsave(&priv->fuse_enable_lock, flags);
|
spin_lock_irqsave(&priv->fuse_enable_lock, flags);
|
||||||
|
|
||||||
/* racy if another part of nouveau start writing to this reg */
|
|
||||||
fuse_enable = nv_mask(priv, 0x1084, 0x800, 0x800);
|
fuse_enable = nv_mask(priv, 0x1084, 0x800, 0x800);
|
||||||
val = nv_rd32(priv, 0x21000 + addr);
|
val = nv_rd32(priv, 0x21000 + addr);
|
||||||
nv_wr32(priv, 0x1084, fuse_enable);
|
nv_wr32(priv, 0x1084, fuse_enable);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&priv->fuse_enable_lock, flags);
|
spin_unlock_irqrestore(&priv->fuse_enable_lock, flags);
|
||||||
|
|
||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static int
|
static int
|
||||||
g80_fuse_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
|
nv50_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||||
struct nouveau_oclass *oclass, void *data, u32 size,
|
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||||
struct nouveau_object **pobject)
|
struct nvkm_object **pobject)
|
||||||
{
|
{
|
||||||
struct g80_fuse_priv *priv;
|
struct nv50_fuse_priv *priv;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = nouveau_fuse_create(parent, engine, oclass, &priv);
|
ret = nvkm_fuse_create(parent, engine, oclass, &priv);
|
||||||
*pobject = nv_object(priv);
|
*pobject = nv_object(priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
spin_lock_init(&priv->fuse_enable_lock);
|
spin_lock_init(&priv->fuse_enable_lock);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct nouveau_oclass
|
struct nvkm_oclass
|
||||||
g80_fuse_oclass = {
|
nv50_fuse_oclass = {
|
||||||
.handle = NV_SUBDEV(FUSE, 0x50),
|
.handle = NV_SUBDEV(FUSE, 0x50),
|
||||||
.ofuncs = &(struct nouveau_ofuncs) {
|
.ofuncs = &(struct nvkm_ofuncs) {
|
||||||
.ctor = g80_fuse_ctor,
|
.ctor = nv50_fuse_ctor,
|
||||||
.dtor = _nouveau_fuse_dtor,
|
.dtor = _nvkm_fuse_dtor,
|
||||||
.init = _nouveau_fuse_init,
|
.init = _nvkm_fuse_init,
|
||||||
.fini = _nouveau_fuse_fini,
|
.fini = _nvkm_fuse_fini,
|
||||||
.rd32 = g80_fuse_rd32,
|
.rd32 = nv50_fuse_rd32,
|
||||||
},
|
},
|
||||||
};
|
};
|
|
@ -1,9 +1,7 @@
|
||||||
#ifndef __NVKM_FUSE_PRIV_H__
|
#ifndef __NVKM_FUSE_PRIV_H__
|
||||||
#define __NVKM_FUSE_PRIV_H__
|
#define __NVKM_FUSE_PRIV_H__
|
||||||
|
|
||||||
#include <subdev/fuse.h>
|
#include <subdev/fuse.h>
|
||||||
|
|
||||||
int _nouveau_fuse_init(struct nouveau_object *object);
|
int _nvkm_fuse_init(struct nvkm_object *object);
|
||||||
void _nouveau_fuse_dtor(struct nouveau_object *object);
|
void _nvkm_fuse_dtor(struct nvkm_object *object);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in New Issue