gpio: pcf857x: Add OF support
Add DT bindings for the pcf857x-compatible chips and parse the device tree node in the driver. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>hifive-unleashed-5.1
Laurent Pinchart
Linus Walleij
parent
e5304db8d7
commit
63f57cd45b
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@ -0,0 +1,71 @@
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* PCF857x-compatible I/O expanders
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The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
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driven high by a pull-up current source or driven low to ground. This combines
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the direction and output level into a single bit per line, which can't be read
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back. We can't actually know at initialization time whether a line is configured
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(a) as output and driving the signal low/high, or (b) as input and reporting a
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low/high value, without knowing the last value written since the chip came out
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of reset (if any). The only reliable solution for setting up line direction is
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thus to do it explicitly.
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Required Properties:
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- compatible: should be one of the following.
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- "maxim,max7328": For the Maxim MAX7378
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- "maxim,max7329": For the Maxim MAX7329
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- "nxp,pca8574": For the NXP PCA8574
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- "nxp,pca8575": For the NXP PCA8575
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- "nxp,pca9670": For the NXP PCA9670
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- "nxp,pca9671": For the NXP PCA9671
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- "nxp,pca9672": For the NXP PCA9672
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- "nxp,pca9673": For the NXP PCA9673
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- "nxp,pca9674": For the NXP PCA9674
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- "nxp,pca9675": For the NXP PCA9675
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- "nxp,pcf8574": For the NXP PCF8574
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- "nxp,pcf8574a": For the NXP PCF8574A
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- "nxp,pcf8575": For the NXP PCF8575
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- "ti,tca9554": For the TI TCA9554
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- reg: I2C slave address.
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- gpio-controller: Marks the device node as a gpio controller.
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- #gpio-cells: Should be 2. The first cell is the GPIO number and the second
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cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
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GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
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Optional Properties:
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- lines-initial-states: Bitmask that specifies the initial state of each
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line. When a bit is set to zero, the corresponding line will be initialized to
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the input (pulled-up) state. When the bit is set to one, the line will be
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initialized the the low-level output state. If the property is not specified
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all lines will be initialized to the input state.
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The I/O expander can detect input state changes, and thus optionally act as
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an interrupt controller. When the expander interrupt line is connected all the
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following properties must be set. For more information please see the
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interrupt controller device tree bindings documentation available at
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Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
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- interrupt-controller: Identifies the node as an interrupt controller.
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- #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
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- interrupt-parent: phandle of the parent interrupt controller.
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- interrupts: Interrupt specifier for the controllers interrupt.
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Please refer to gpio.txt in this directory for details of the common GPIO
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bindings used by client devices.
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Example: PCF8575 I/O expander node
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pcf8575: gpio@20 {
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compatible = "nxp,pcf8575";
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reg = <0x20>;
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interrupt-parent = <&irqpin2>;
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interrupts = <3 0>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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@ -26,6 +26,8 @@
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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@ -49,6 +51,27 @@ static const struct i2c_device_id pcf857x_id[] = {
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};
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MODULE_DEVICE_TABLE(i2c, pcf857x_id);
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#ifdef CONFIG_OF
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static const struct of_device_id pcf857x_of_table[] = {
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{ .compatible = "nxp,pcf8574" },
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{ .compatible = "nxp,pcf8574a" },
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{ .compatible = "nxp,pca8574" },
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{ .compatible = "nxp,pca9670" },
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{ .compatible = "nxp,pca9672" },
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{ .compatible = "nxp,pca9674" },
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{ .compatible = "nxp,pcf8575" },
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{ .compatible = "nxp,pca8575" },
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{ .compatible = "nxp,pca9671" },
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{ .compatible = "nxp,pca9673" },
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{ .compatible = "nxp,pca9675" },
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{ .compatible = "maxim,max7328" },
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{ .compatible = "maxim,max7329" },
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{ .compatible = "ti,tca9554" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, pcf857x_of_table);
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#endif
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/*
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* The pcf857x, pca857x, and pca967x chips only expose one read and one
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* write register. Writing a "one" bit (to match the reset state) lets
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@ -260,14 +283,18 @@ fail:
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static int pcf857x_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct pcf857x_platform_data *pdata;
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struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
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struct device_node *np = client->dev.of_node;
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struct pcf857x *gpio;
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unsigned int n_latch = 0;
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int status;
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pdata = dev_get_platdata(&client->dev);
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if (!pdata) {
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if (IS_ENABLED(CONFIG_OF) && np)
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of_property_read_u32(np, "lines-initial-states", &n_latch);
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else if (pdata)
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n_latch = pdata->n_latch;
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else
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dev_dbg(&client->dev, "no platform data\n");
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}
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/* Allocate, initialize, and register this gpio_chip. */
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gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
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@ -360,11 +387,11 @@ static int pcf857x_probe(struct i2c_client *client,
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* may cause transient glitching since it can't know the last value
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* written (some pins may need to be driven low).
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*
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* Using pdata->n_latch avoids that trouble. When left initialized
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* to zero, our software copy of the "latch" then matches the chip's
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* all-ones reset state. Otherwise it flags pins to be driven low.
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* Using n_latch avoids that trouble. When left initialized to zero,
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* our software copy of the "latch" then matches the chip's all-ones
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* reset state. Otherwise it flags pins to be driven low.
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*/
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gpio->out = pdata ? ~pdata->n_latch : ~0;
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gpio->out = ~n_latch;
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gpio->status = gpio->out;
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status = gpiochip_add(&gpio->chip);
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@ -426,6 +453,7 @@ static struct i2c_driver pcf857x_driver = {
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.driver = {
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.name = "pcf857x",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(pcf857x_of_table),
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},
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.probe = pcf857x_probe,
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.remove = pcf857x_remove,
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