mmc: sdhci-esdhc-imx: fix the mask for tuning start point
According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is TUNING_START_TAP, bit[7] of this register is to disable the command CRC check for standard tuning. So fix it here. Fixes:5.4-rM2-2.2.x-imx-squashedd87fc96636
("mmc: sdhci-esdhc-imx: support setting tuning start point") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/1590488522-9292-1-git-send-email-haibo.chen@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> (cherry picked from commit1194be8c94
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@ -99,7 +99,7 @@
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#define ESDHC_STD_TUNING_EN (1 << 24)
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/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
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#define ESDHC_TUNING_START_TAP_DEFAULT 0x1
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#define ESDHC_TUNING_START_TAP_MASK 0xff
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#define ESDHC_TUNING_START_TAP_MASK 0x7f
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#define ESDHC_TUNING_STEP_MASK 0x00070000
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#define ESDHC_TUNING_STEP_SHIFT 16
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