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ARM: sunxi: dts: Split USB PHY cells into an array 

Even though it doesn't make any difference at the binary level, the reg
property is an array of cells, and should be represented as such.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
hifive-unleashed-5.2
Maxime Ripard 2019-03-25 14:52:43 +01:00
parent 939b665434
commit 655c0f429f
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
3 changed files with 3 additions and 3 deletions
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2
arch/arm/boot/dts/sun4i-a10.dtsi
View File

@ -502,7 +502,7 @@
usbphy: phy@1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun4i-a10-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
reg-names = "phy_ctrl", "pmu1", "pmu2";
clocks = <&ccu CLK_USB_PHY>;
clock-names = "usb_phy";

2
arch/arm/boot/dts/sun5i.dtsi
View File

@ -366,7 +366,7 @@
usbphy: phy@1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun5i-a13-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4>;
reg = <0x01c13400 0x10>, <0x01c14800 0x4>;
reg-names = "phy_ctrl", "pmu1";
clocks = <&ccu CLK_USB_PHY0>;
clock-names = "usb_phy";

2
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -594,7 +594,7 @@
usbphy: phy@1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun7i-a20-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
reg-names = "phy_ctrl", "pmu1", "pmu2";
clocks = <&ccu CLK_USB_PHY>;
clock-names = "usb_phy";