hwmon/w83627ehf: Add support for the W83627DHG chip
Signed-off-by: David Hubbard <david.c.hubbard@gmail.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>hifive-unleashed-5.1
David Hubbard
Jean Delvare
parent
37f54ee546
commit
657c93b10f
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@ -2,26 +2,29 @@ Kernel driver w83627ehf
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=======================
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Supported chips:
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* Winbond W83627EHF/EHG (ISA access ONLY)
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* Winbond W83627EHF/EHG/DHG (ISA access ONLY)
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Prefix: 'w83627ehf'
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Addresses scanned: ISA address retrieved from Super I/O registers
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Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83627EHF_%20W83627EHGb.pdf
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Datasheet:
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http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83627EHF_%20W83627EHGb.pdf
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DHG datasheet confidential.
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Authors:
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Jean Delvare <khali@linux-fr.org>
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Yuan Mu (Winbond)
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Rudolf Marek <r.marek@assembler.cz>
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David Hubbard <david.c.hubbard@gmail.com>
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Description
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-----------
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This driver implements support for the Winbond W83627EHF and W83627EHG
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super I/O chips. We will refer to them collectively as Winbond chips.
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This driver implements support for the Winbond W83627EHF, W83627EHG, and
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W83627DHG super I/O chips. We will refer to them collectively as Winbond chips.
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The chips implement three temperature sensors, five fan rotation
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speed sensors, ten analog voltage sensors, alarms with beep warnings (control
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unimplemented), and some automatic fan regulation strategies (plus manual
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fan control mode).
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speed sensors, ten analog voltage sensors (only nine for the 627DHG), alarms
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with beep warnings (control unimplemented), and some automatic fan regulation
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strategies (plus manual fan control mode).
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Temperatures are measured in degrees Celsius and measurement resolution is 1
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degC for temp1 and 0.5 degC for temp2 and temp3. An alarm is triggered when
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@ -55,6 +58,9 @@ prog -> pwm4 (the programmable setting is not supported by the driver)
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/sys files
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----------
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name - this is a standard hwmon device entry. For the W83627EHF and W83627EHG,
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it is set to "w83627ehf" and for the W83627DHG it is set to "w83627dhg"
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pwm[1-4] - this file stores PWM duty cycle or DC value (fan speed) in range:
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0 (stop) to 255 (full)
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@ -83,3 +89,37 @@ pwm[1-4]_stop_time - how many milliseconds [ms] must elapse to switch
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Note: last two functions are influenced by other control bits, not yet exported
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by the driver, so a change might not have any effect.
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Implementation Details
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----------------------
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Future driver development should bear in mind that the following registers have
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different functions on the 627EHF and the 627DHG. Some registers also have
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different power-on default values, but BIOS should already be loading
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appropriate defaults. Note that bank selection must be performed as is currently
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done in the driver for all register addresses.
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0x49: only on DHG, selects temperature source for AUX fan, CPU fan0
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0x4a: not completely documented for the EHF and the DHG documentation assigns
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different behavior to bits 7 and 6, including extending the temperature
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input selection to SmartFan I, not just SmartFan III. Testing on the EHF
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will reveal whether they are compatible or not.
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0x58: Chip ID: 0xa1=EHF 0xc1=DHG
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0x5e: only on DHG, has bits to enable "current mode" temperature detection and
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critical temperature protection
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0x45b: only on EHF, bit 3, vin4 alarm (EHF supports 10 inputs, only 9 on DHG)
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0x552: only on EHF, vin4
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0x558: only on EHF, vin4 high limit
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0x559: only on EHF, vin4 low limit
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0x6b: only on DHG, SYS fan critical temperature
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0x6c: only on DHG, CPU fan0 critical temperature
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0x6d: only on DHG, AUX fan critical temperature
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0x6e: only on DHG, CPU fan1 critical temperature
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0x50-0x55 and 0x650-0x657 are marked "Test Register" for the EHF, but "Reserved
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Register" for the DHG
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The DHG also supports PECI, where the DHG queries Intel CPU temperatures, and
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the ICH8 southbridge gets that data via PECI from the DHG, so that the
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southbridge drives the fans. And the DHG supports SST, a one-wire serial bus.
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@ -32,8 +32,10 @@
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Supports the following chips:
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Chip #vin #fan #pwm #temp chip_id man_id
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w83627ehf 10 5 4 3 0x88,0xa1 0x5ca3
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Chip #vin #fan #pwm #temp chip IDs man ID
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w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
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0x8860 0xa1
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w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
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*/
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#include <linux/module.h>
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@ -55,8 +57,18 @@ static unsigned short address;
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* Super-I/O constants and functions
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*/
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/*
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* The three following globals are initialized in w83627ehf_find(), before
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* the i2c-isa device is created. Otherwise, they could be stored in
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* w83627ehf_data. This is ugly, but necessary, and when the driver is next
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* updated to become a platform driver, the globals will disappear.
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*/
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static int REG; /* The register to read/write */
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static int VAL; /* The value to read/write */
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/* The w83627ehf/ehg have 10 voltage inputs, but the w83627dhg has 9. This
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* value is also used in w83627ehf_detect() to export a device name in sysfs
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* (e.g. w83627ehf or w83627dhg) */
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static int w83627ehf_num_in;
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#define W83627EHF_LD_HWM 0x0b
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@ -65,8 +77,10 @@ static int VAL; /* The value to read/write */
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#define SIO_REG_ENABLE 0x30 /* Logical device enable */
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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
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#define SIO_W83627EHF_ID 0x8840
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#define SIO_ID_MASK 0xFFC0
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#define SIO_W83627EHF_ID 0x8850
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#define SIO_W83627EHG_ID 0x8860
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#define SIO_W83627DHG_ID 0xa020
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#define SIO_ID_MASK 0xFFF0
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static inline void
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superio_outb(int reg, int val)
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@ -115,8 +129,12 @@ superio_exit(void)
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#define W83627EHF_REG_BANK 0x4E
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#define W83627EHF_REG_CONFIG 0x40
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#define W83627EHF_REG_CHIP_ID 0x49
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#define W83627EHF_REG_MAN_ID 0x4F
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/* Not currently used:
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* REG_MAN_ID has the value 0x5ca3 for all supported chips.
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* REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
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* REG_MAN_ID is at port 0x4f
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* REG_CHIP_ID is at port 0x58 */
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static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
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static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
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@ -429,7 +447,7 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
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}
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/* Measured voltages and limits */
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for (i = 0; i < 10; i++) {
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for (i = 0; i < w83627ehf_num_in; i++) {
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data->in[i] = w83627ehf_read_value(client,
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W83627EHF_REG_IN(i));
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data->in_min[i] = w83627ehf_read_value(client,
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@ -1121,7 +1139,7 @@ static void w83627ehf_device_remove_files(struct device *dev)
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device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
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for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
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device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
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for (i = 0; i < 10; i++) {
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for (i = 0; i < w83627ehf_num_in; i++) {
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device_remove_file(dev, &sda_in_input[i].dev_attr);
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device_remove_file(dev, &sda_in_alarm[i].dev_attr);
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device_remove_file(dev, &sda_in_min[i].dev_attr);
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@ -1196,7 +1214,11 @@ static int w83627ehf_detect(struct i2c_adapter *adapter)
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client->flags = 0;
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dev = &client->dev;
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strlcpy(client->name, "w83627ehf", I2C_NAME_SIZE);
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if (w83627ehf_num_in == 9)
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strlcpy(client->name, "w83627dhg", I2C_NAME_SIZE);
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else /* just say ehf. 627EHG is 627EHF in lead-free packaging. */
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strlcpy(client->name, "w83627ehf", I2C_NAME_SIZE);
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data->valid = 0;
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mutex_init(&data->update_lock);
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@ -1246,7 +1268,7 @@ static int w83627ehf_detect(struct i2c_adapter *adapter)
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goto exit_remove;
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}
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for (i = 0; i < 10; i++)
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for (i = 0; i < w83627ehf_num_in; i++)
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if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
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|| (err = device_create_file(dev,
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&sda_in_alarm[i].dev_attr))
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@ -1340,7 +1362,17 @@ static int __init w83627ehf_find(int sioaddr, unsigned short *addr)
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val = (superio_inb(SIO_REG_DEVID) << 8)
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| superio_inb(SIO_REG_DEVID + 1);
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if ((val & SIO_ID_MASK) != SIO_W83627EHF_ID) {
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switch (val & SIO_ID_MASK) {
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case SIO_W83627DHG_ID:
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w83627ehf_num_in = 9;
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break;
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case SIO_W83627EHF_ID:
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case SIO_W83627EHG_ID:
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w83627ehf_num_in = 10;
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break;
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default:
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printk(KERN_WARNING "w83627ehf: unsupported chip ID: 0x%04x\n",
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val);
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superio_exit();
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return -ENODEV;
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}
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