ARM: clps711x: Add support for SYSCON driver
This patch adds support for SYSCON driver for CLPS711X targets. At this time there are no users for this driver, but it is will be used as start point to use in CLPS711X drivers and remove <mach/xx> dependencies. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Olof Johansson <olof@lixom.net>hifive-unleashed-5.1
Alexander Shiyan
Olof Johansson
parent
e337d724e8
commit
6597619f9c
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@ -370,6 +370,7 @@ config ARCH_CLPS711X
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select COMMON_CLK
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select CPU_ARM720T
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select GENERIC_CLOCKEVENTS
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select MFD_SYSCON
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select MULTI_IRQ_HANDLER
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select SPARSE_IRQ
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help
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@ -10,6 +10,7 @@
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*/
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#include <linux/platform_device.h>
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#include <linux/sizes.h>
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#include <mach/hardware.h>
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@ -42,7 +43,26 @@ static void __init clps711x_add_gpio(void)
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}
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}
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const struct resource clps711x_syscon_res[] __initconst = {
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/* SYSCON1, SYSFLG1 */
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON1, SZ_128),
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/* SYSCON2, SYSFLG2 */
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON2, SZ_128),
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/* SYSCON3 */
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON3, SZ_64),
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};
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static void __init clps711x_add_syscon(void)
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{
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unsigned i;
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for (i = 0; i < ARRAY_SIZE(clps711x_syscon_res); i++)
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platform_device_register_simple("clps711x-syscon", i + 1,
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&clps711x_syscon_res[i], 1);
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}
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void __init clps711x_devices_init(void)
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{
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clps711x_add_gpio();
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clps711x_add_syscon();
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}
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@ -21,6 +21,8 @@
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#ifndef __MACH_CLPS711X_H
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#define __MACH_CLPS711X_H
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#include <linux/mfd/syscon/clps711x.h>
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#define CLPS711X_PHYS_BASE (0x80000000)
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#define PADR (0x0000)
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@ -96,83 +98,9 @@
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#define RANDID2 (0x2708)
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#define RANDID3 (0x270c)
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/* common bits: SYSCON1 / SYSCON2 */
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#define SYSCON_UARTEN (1 << 8)
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#define SYSCON1_KBDSCAN(x) ((x) & 15)
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#define SYSCON1_KBDSCANMASK (15)
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#define SYSCON1_TC1M (1 << 4)
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#define SYSCON1_TC1S (1 << 5)
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#define SYSCON1_TC2M (1 << 6)
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#define SYSCON1_TC2S (1 << 7)
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#define SYSCON1_UART1EN SYSCON_UARTEN
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#define SYSCON1_BZTOG (1 << 9)
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#define SYSCON1_BZMOD (1 << 10)
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#define SYSCON1_DBGEN (1 << 11)
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#define SYSCON1_LCDEN (1 << 12)
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#define SYSCON1_CDENTX (1 << 13)
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#define SYSCON1_CDENRX (1 << 14)
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#define SYSCON1_SIREN (1 << 15)
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#define SYSCON1_ADCKSEL(x) (((x) & 3) << 16)
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#define SYSCON1_ADCKSEL_MASK (3 << 16)
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#define SYSCON1_EXCKEN (1 << 18)
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#define SYSCON1_WAKEDIS (1 << 19)
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#define SYSCON1_IRTXM (1 << 20)
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/* common bits: SYSFLG1 / SYSFLG2 */
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#define SYSFLG_UBUSY (1 << 11)
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#define SYSFLG_URXFE (1 << 22)
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#define SYSFLG_UTXFF (1 << 23)
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#define SYSFLG1_MCDR (1 << 0)
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#define SYSFLG1_DCDET (1 << 1)
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#define SYSFLG1_WUDR (1 << 2)
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#define SYSFLG1_WUON (1 << 3)
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#define SYSFLG1_CTS (1 << 8)
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#define SYSFLG1_DSR (1 << 9)
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#define SYSFLG1_DCD (1 << 10)
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#define SYSFLG1_UBUSY SYSFLG_UBUSY
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#define SYSFLG1_NBFLG (1 << 12)
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#define SYSFLG1_RSTFLG (1 << 13)
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#define SYSFLG1_PFFLG (1 << 14)
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#define SYSFLG1_CLDFLG (1 << 15)
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#define SYSFLG1_URXFE SYSFLG_URXFE
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#define SYSFLG1_UTXFF SYSFLG_UTXFF
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#define SYSFLG1_CRXFE (1 << 24)
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#define SYSFLG1_CTXFF (1 << 25)
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#define SYSFLG1_SSIBUSY (1 << 26)
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#define SYSFLG1_ID (1 << 29)
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#define SYSFLG1_VERID(x) (((x) >> 30) & 3)
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#define SYSFLG1_VERID_MASK (3 << 30)
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#define SYSFLG2_SSRXOF (1 << 0)
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#define SYSFLG2_RESVAL (1 << 1)
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#define SYSFLG2_RESFRM (1 << 2)
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#define SYSFLG2_SS2RXFE (1 << 3)
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#define SYSFLG2_SS2TXFF (1 << 4)
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#define SYSFLG2_SS2TXUF (1 << 5)
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#define SYSFLG2_CKMODE (1 << 6)
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#define SYSFLG2_UBUSY SYSFLG_UBUSY
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#define SYSFLG2_URXFE SYSFLG_URXFE
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#define SYSFLG2_UTXFF SYSFLG_UTXFF
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#define LCDCON_GSEN (1 << 30)
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#define LCDCON_GSMD (1 << 31)
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#define SYSCON2_SERSEL (1 << 0)
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#define SYSCON2_KBD6 (1 << 1)
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#define SYSCON2_DRAMZ (1 << 2)
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#define SYSCON2_KBWEN (1 << 3)
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#define SYSCON2_SS2TXEN (1 << 4)
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#define SYSCON2_PCCARD1 (1 << 5)
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#define SYSCON2_PCCARD2 (1 << 6)
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#define SYSCON2_SS2RXEN (1 << 7)
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#define SYSCON2_UART2EN SYSCON_UARTEN
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#define SYSCON2_SS2MAEN (1 << 9)
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#define SYSCON2_OSTB (1 << 12)
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#define SYSCON2_CLKENSL (1 << 13)
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#define SYSCON2_BUZFREQ (1 << 14)
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/* common bits: UARTDR1 / UARTDR2 */
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#define UARTDR_FRMERR (1 << 8)
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#define UARTDR_PARERR (1 << 9)
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@ -228,18 +156,6 @@
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#define DAI64FS_MCLK256EN (1 << 3)
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#define DAI64FS_LOOPBACK (1 << 5)
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#define SYSCON3_ADCCON (1 << 0)
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#define SYSCON3_CLKCTL0 (1 << 1)
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#define SYSCON3_CLKCTL1 (1 << 2)
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#define SYSCON3_DAISEL (1 << 3)
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#define SYSCON3_ADCCKNSEN (1 << 4)
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#define SYSCON3_VERSN(x) (((x) >> 5) & 7)
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#define SYSCON3_VERSN_MASK (7 << 5)
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#define SYSCON3_FASTWAKE (1 << 8)
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#define SYSCON3_DAIEN (1 << 9)
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#define SYSCON3_128FS SYSCON3_DAIEN
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#define SYSCON3_ENPD67 (1 << 10)
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#define SDCONF_ACTIVE (1 << 10)
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#define SDCONF_CLKCTL (1 << 9)
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#define SDCONF_WIDTH_4 (0 << 7)
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@ -159,6 +159,9 @@ static int syscon_probe(struct platform_device *pdev)
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static const struct platform_device_id syscon_ids[] = {
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{ "syscon", },
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#ifdef CONFIG_ARCH_CLPS711X
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{ "clps711x-syscon", },
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#endif
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{ }
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};
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@ -0,0 +1,94 @@
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/*
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* CLPS711X system register bits definitions
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*
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* Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _LINUX_MFD_SYSCON_CLPS711X_H_
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#define _LINUX_MFD_SYSCON_CLPS711X_H_
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#define SYSCON_OFFSET (0x00)
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#define SYSFLG_OFFSET (0x40)
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#define SYSCON1_KBDSCAN(x) ((x) & 15)
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#define SYSCON1_KBDSCAN_MASK (15)
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#define SYSCON1_TC1M (1 << 4)
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#define SYSCON1_TC1S (1 << 5)
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#define SYSCON1_TC2M (1 << 6)
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#define SYSCON1_TC2S (1 << 7)
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#define SYSCON1_BZTOG (1 << 9)
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#define SYSCON1_BZMOD (1 << 10)
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#define SYSCON1_DBGEN (1 << 11)
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#define SYSCON1_LCDEN (1 << 12)
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#define SYSCON1_CDENTX (1 << 13)
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#define SYSCON1_CDENRX (1 << 14)
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#define SYSCON1_SIREN (1 << 15)
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#define SYSCON1_ADCKSEL(x) (((x) & 3) << 16)
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#define SYSCON1_ADCKSEL_MASK (3 << 16)
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#define SYSCON1_EXCKEN (1 << 18)
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#define SYSCON1_WAKEDIS (1 << 19)
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#define SYSCON1_IRTXM (1 << 20)
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#define SYSCON2_SERSEL (1 << 0)
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#define SYSCON2_KBD6 (1 << 1)
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#define SYSCON2_DRAMZ (1 << 2)
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#define SYSCON2_KBWEN (1 << 3)
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#define SYSCON2_SS2TXEN (1 << 4)
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#define SYSCON2_PCCARD1 (1 << 5)
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#define SYSCON2_PCCARD2 (1 << 6)
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#define SYSCON2_SS2RXEN (1 << 7)
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#define SYSCON2_SS2MAEN (1 << 9)
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#define SYSCON2_OSTB (1 << 12)
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#define SYSCON2_CLKENSL (1 << 13)
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#define SYSCON2_BUZFREQ (1 << 14)
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#define SYSCON3_ADCCON (1 << 0)
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#define SYSCON3_CLKCTL0 (1 << 1)
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#define SYSCON3_CLKCTL1 (1 << 2)
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#define SYSCON3_DAISEL (1 << 3)
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#define SYSCON3_ADCCKNSEN (1 << 4)
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#define SYSCON3_VERSN(x) (((x) >> 5) & 7)
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#define SYSCON3_VERSN_MASK (7 << 5)
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#define SYSCON3_FASTWAKE (1 << 8)
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#define SYSCON3_DAIEN (1 << 9)
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#define SYSCON3_128FS SYSCON3_DAIEN
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#define SYSCON3_ENPD67 (1 << 10)
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#define SYSCON_UARTEN (1 << 8)
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#define SYSFLG1_MCDR (1 << 0)
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#define SYSFLG1_DCDET (1 << 1)
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#define SYSFLG1_WUDR (1 << 2)
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#define SYSFLG1_WUON (1 << 3)
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#define SYSFLG1_CTS (1 << 8)
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#define SYSFLG1_DSR (1 << 9)
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#define SYSFLG1_DCD (1 << 10)
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#define SYSFLG1_NBFLG (1 << 12)
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#define SYSFLG1_RSTFLG (1 << 13)
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#define SYSFLG1_PFFLG (1 << 14)
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#define SYSFLG1_CLDFLG (1 << 15)
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#define SYSFLG1_CRXFE (1 << 24)
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#define SYSFLG1_CTXFF (1 << 25)
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#define SYSFLG1_SSIBUSY (1 << 26)
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#define SYSFLG1_ID (1 << 29)
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#define SYSFLG1_VERID(x) (((x) >> 30) & 3)
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#define SYSFLG1_VERID_MASK (3 << 30)
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#define SYSFLG2_SSRXOF (1 << 0)
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#define SYSFLG2_RESVAL (1 << 1)
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#define SYSFLG2_RESFRM (1 << 2)
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#define SYSFLG2_SS2RXFE (1 << 3)
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#define SYSFLG2_SS2TXFF (1 << 4)
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#define SYSFLG2_SS2TXUF (1 << 5)
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#define SYSFLG2_CKMODE (1 << 6)
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#define SYSFLG_UBUSY (1 << 11)
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#define SYSFLG_URXFE (1 << 22)
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#define SYSFLG_UTXFF (1 << 23)
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#endif
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