drm/amd/powerplay: add GFX per cu powergating support through SMU/powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -267,7 +267,20 @@ static int pp_set_clockgating_state(void *handle,
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static int pp_set_powergating_state(void *handle,
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static int pp_set_powergating_state(void *handle,
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enum amd_powergating_state state)
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enum amd_powergating_state state)
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{
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{
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return 0;
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struct pp_hwmgr *hwmgr;
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if (handle == NULL)
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return -EINVAL;
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
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hwmgr->hwmgr_func->enable_per_cu_power_gating == NULL)
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return -EINVAL;
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/* Enable/disable GFX per cu powergating through SMU */
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return hwmgr->hwmgr_func->enable_per_cu_power_gating(hwmgr,
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state == AMD_PG_STATE_GATE ? true : false);
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}
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}
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static int pp_suspend(void *handle)
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static int pp_suspend(void *handle)
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@ -337,6 +337,7 @@ struct pp_hwmgr_func {
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int (*set_pp_table)(struct pp_hwmgr *hwmgr, const char *buf, size_t size);
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int (*set_pp_table)(struct pp_hwmgr *hwmgr, const char *buf, size_t size);
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int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, int level);
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int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, int level);
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int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf);
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int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf);
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int (*enable_per_cu_power_gating)(struct pp_hwmgr *hwmgr, bool enable);
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};
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};
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struct pp_table_func {
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struct pp_table_func {
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