drm/bridge: tc358767: fix timing calculations
Fields in HTIM01 and HTIM02 regs should be even. Recomended thresh_dly value is max_tu_symbol. Remove set of VPCTRL0.VSDELAY as it is related to DSI input interface. Currently driver supports only DPI. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/1510073785-16108-5-git-send-email-andrey.gusakov@cogentembedded.com
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@ -659,6 +659,14 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
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int lower_margin = mode->vsync_start - mode->vdisplay;
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int vsync_len = mode->vsync_end - mode->vsync_start;
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/*
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* Recommended maximum number of symbols transferred in a transfer unit:
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* DIV_ROUND_UP((input active video bandwidth in bytes) * tu_size,
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* (output active video bandwidth in bytes))
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* Must be less than tu_size.
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*/
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max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
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dev_dbg(tc->dev, "set mode %dx%d\n",
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mode->hdisplay, mode->vdisplay);
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dev_dbg(tc->dev, "H margin %d,%d sync %d\n",
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@ -668,13 +676,18 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
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dev_dbg(tc->dev, "total: %dx%d\n", mode->htotal, mode->vtotal);
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/* LCD Ctl Frame Size */
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tc_write(VPCTRL0, (0x40 << 20) /* VSDELAY */ |
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/*
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* LCD Ctl Frame Size
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* datasheet is not clear of vsdelay in case of DPI
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* assume we do not need any delay when DPI is a source of
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* sync signals
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*/
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tc_write(VPCTRL0, (0 << 20) /* VSDELAY */ |
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OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED);
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tc_write(HTIM01, (left_margin << 16) | /* H back porch */
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(hsync_len << 0)); /* Hsync */
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tc_write(HTIM02, (right_margin << 16) | /* H front porch */
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(mode->hdisplay << 0)); /* width */
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tc_write(HTIM01, (ALIGN(left_margin, 2) << 16) | /* H back porch */
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(ALIGN(hsync_len, 2) << 0)); /* Hsync */
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tc_write(HTIM02, (ALIGN(right_margin, 2) << 16) | /* H front porch */
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(ALIGN(mode->hdisplay, 2) << 0)); /* width */
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tc_write(VTIM01, (upper_margin << 16) | /* V back porch */
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(vsync_len << 0)); /* Vsync */
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tc_write(VTIM02, (lower_margin << 16) | /* V front porch */
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@ -693,7 +706,7 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
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/* DP Main Stream Attributes */
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vid_sync_dly = hsync_len + left_margin + mode->hdisplay;
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tc_write(DP0_VIDSYNCDELAY,
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(0x003e << 16) | /* thresh_dly */
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(max_tu_symbol << 16) | /* thresh_dly */
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(vid_sync_dly << 0));
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tc_write(DP0_TOTALVAL, (mode->vtotal << 16) | (mode->htotal));
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@ -709,13 +722,6 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
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tc_write(DPIPXLFMT, VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW |
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DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | DPI_BPP_RGB888);
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/*
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* Recommended maximum number of symbols transferred in a transfer unit:
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* DIV_ROUND_UP((input active video bandwidth in bytes) * tu_size,
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* (output active video bandwidth in bytes))
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* Must be less than tu_size.
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*/
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max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
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tc_write(DP0_MISC, (max_tu_symbol << 23) | (TU_SIZE_RECOMMENDED << 16) |
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BPC_8);
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