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[ARM] Merge individual ARM sub-trees 

Merge:
 Atmel AT91RM9200 and AT91SAM9260 changes
 General ARM developments
 Disconfiguous memory cleanups
 64-bit/32-bit division and sched_clock extension patches
 EP93xx support changes
 IOP support changes

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
hifive-unleashed-5.1
Russell King 2006-12-07 23:07:26 +00:00 committed by Russell King
parent 0215ffb08c 208a49f086 d4f3e084ad 05f96ef118 2dc20a51dc 47d7e524b7 285f5fa7e9
commit 6705cda24f
290 changed files with 13141 additions and 1986 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
MAINTAINERS
View File

@ -348,6 +348,13 @@ P: Ian Molton
M: spyro@f2s.com
S: Maintained
ARM/ATMEL AT91RM9200 ARM ARCHITECTURE
P: Andrew Victor
M: andrew@sanpeople.com
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://maxim.org.za/at91_26.html
S: Maintained
ARM/CORGI MACHINE SUPPORT
P: Richard Purdie
M: rpurdie@rpsys.net

18
arch/arm/Kconfig
View File

@ -223,6 +223,12 @@ config ARCH_IOP33X
help
Support for Intel's IOP33X (XScale) family of processors.
config ARCH_IOP13XX
bool "IOP13xx-based"
select PCI
help
Support for Intel's IOP13XX (XScale) family of processors.
config ARCH_IXP4XX
bool "IXP4xx-based"
depends on MMU
@ -331,6 +337,8 @@ source "arch/arm/mach-iop32x/Kconfig"
source "arch/arm/mach-iop33x/Kconfig"
source "arch/arm/mach-iop13xx/Kconfig"
source "arch/arm/mach-ixp4xx/Kconfig"
source "arch/arm/mach-ixp2000/Kconfig"
@ -374,6 +382,14 @@ config PLAT_IOP
source arch/arm/mm/Kconfig
config IWMMXT
bool "Enable iWMMXt support"
depends CPU_XSCALE || CPU_XSC3
default y if PXA27x
help
Enable support for iWMMXt context switching at run time if
running on a CPU that supports it.
# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
config XSCALE_PMU
bool
@ -583,7 +599,7 @@ config LEDS
ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
ARCH_AT91RM9200 || MACH_TRIZEPS4
ARCH_AT91 || MACH_TRIZEPS4
help
If you say Y here, the LEDs on your machine will be used
to provide useful information about your current system status.

4
arch/arm/Kconfig.debug
View File

@ -32,10 +32,6 @@ config DEBUG_USER
8 - SIGSEGV faults
16 - SIGBUS faults
config DEBUG_WAITQ
bool "Wait queue debugging"
depends on DEBUG_KERNEL
config DEBUG_ERRORS
bool "Verbose kernel error messages"
depends on DEBUG_KERNEL

3
arch/arm/Makefile
View File

@ -15,6 +15,8 @@ CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
OBJCOPYFLAGS :=-O binary -R .note -R .comment -S
GZFLAGS :=-9
#CFLAGS +=-pipe
# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
CFLAGS +=$(call cc-option,-marm,)
# Do not use arch/arm/defconfig - it's always outdated.
# Select a platform tht is kept up-to-date
@ -108,6 +110,7 @@ endif
machine-$(CONFIG_ARCH_CLPS711X) := clps711x
machine-$(CONFIG_ARCH_IOP32X) := iop32x
machine-$(CONFIG_ARCH_IOP33X) := iop33x
machine-$(CONFIG_ARCH_IOP13XX) := iop13xx
machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx
machine-$(CONFIG_ARCH_IXP2000) := ixp2000
machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx

2
arch/arm/common/gic.c
View File

@ -160,7 +160,7 @@ void __init gic_dist_init(void __iomem *base)
*/
for (i = 29; i < max_irq; i++) {
set_irq_chip(i, &gic_chip);
set_irq_handler(i, do_level_IRQ);
set_irq_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}

84
arch/arm/common/locomo.c
View File

@ -163,11 +163,11 @@ static struct locomo_dev_info locomo_devices[] = {
#define LOCOMO_IRQ_LT_START (IRQ_LOCOMO_LT)
#define LOCOMO_IRQ_SPI_START (IRQ_LOCOMO_SPI_RFR)
static void locomo_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_handler(unsigned int irq, struct irq_desc *desc)
{
int req, i;
struct irqdesc *d;
void __iomem *mapbase = get_irq_chipdata(irq);
struct irq_desc *d;
void __iomem *mapbase = get_irq_chip_data(irq);
/* Acknowledge the parent IRQ */
desc->chip->ack(irq);
@ -194,7 +194,7 @@ static void locomo_ack_irq(unsigned int irq)
static void locomo_mask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_ICR);
r &= ~(0x0010 << (irq - LOCOMO_IRQ_START));
@ -203,7 +203,7 @@ static void locomo_mask_irq(unsigned int irq)
static void locomo_unmask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_ICR);
r |= (0x0010 << (irq - LOCOMO_IRQ_START));
@ -217,10 +217,10 @@ static struct irq_chip locomo_chip = {
.unmask = locomo_unmask_irq,
};
static void locomo_key_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_key_handler(unsigned int irq, struct irq_desc *desc)
{
struct irqdesc *d;
void __iomem *mapbase = get_irq_chipdata(irq);
struct irq_desc *d;
void __iomem *mapbase = get_irq_chip_data(irq);
if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
d = irq_desc + LOCOMO_IRQ_KEY_START;
@ -230,7 +230,7 @@ static void locomo_key_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_key_ack_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
r &= ~(0x0100 << (irq - LOCOMO_IRQ_KEY_START));
@ -239,7 +239,7 @@ static void locomo_key_ack_irq(unsigned int irq)
static void locomo_key_mask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
r &= ~(0x0010 << (irq - LOCOMO_IRQ_KEY_START));
@ -248,7 +248,7 @@ static void locomo_key_mask_irq(unsigned int irq)
static void locomo_key_unmask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
r |= (0x0010 << (irq - LOCOMO_IRQ_KEY_START));
@ -262,11 +262,11 @@ static struct irq_chip locomo_key_chip = {
.unmask = locomo_key_unmask_irq,
};
static void locomo_gpio_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
{
int req, i;
struct irqdesc *d;
void __iomem *mapbase = get_irq_chipdata(irq);
struct irq_desc *d;
void __iomem *mapbase = get_irq_chip_data(irq);
req = locomo_readl(mapbase + LOCOMO_GIR) &
locomo_readl(mapbase + LOCOMO_GPD) &
@ -285,7 +285,7 @@ static void locomo_gpio_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_gpio_ack_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_GWE);
r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
@ -302,7 +302,7 @@ static void locomo_gpio_ack_irq(unsigned int irq)
static void locomo_gpio_mask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_GIE);
r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
@ -311,7 +311,7 @@ static void locomo_gpio_mask_irq(unsigned int irq)
static void locomo_gpio_unmask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_GIE);
r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
@ -325,10 +325,10 @@ static struct irq_chip locomo_gpio_chip = {
.unmask = locomo_gpio_unmask_irq,
};
static void locomo_lt_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
{
struct irqdesc *d;
void __iomem *mapbase = get_irq_chipdata(irq);
struct irq_desc *d;
void __iomem *mapbase = get_irq_chip_data(irq);
if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
d = irq_desc + LOCOMO_IRQ_LT_START;
@ -338,7 +338,7 @@ static void locomo_lt_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_lt_ack_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_LTINT);
r &= ~(0x0100 << (irq - LOCOMO_IRQ_LT_START));
@ -347,7 +347,7 @@ static void locomo_lt_ack_irq(unsigned int irq)
static void locomo_lt_mask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_LTINT);
r &= ~(0x0010 << (irq - LOCOMO_IRQ_LT_START));
@ -356,7 +356,7 @@ static void locomo_lt_mask_irq(unsigned int irq)
static void locomo_lt_unmask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_LTINT);
r |= (0x0010 << (irq - LOCOMO_IRQ_LT_START));
@ -370,11 +370,11 @@ static struct irq_chip locomo_lt_chip = {
.unmask = locomo_lt_unmask_irq,
};
static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc)
{
int req, i;
struct irqdesc *d;
void __iomem *mapbase = get_irq_chipdata(irq);
struct irq_desc *d;
void __iomem *mapbase = get_irq_chip_data(irq);
req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F;
if (req) {
@ -391,7 +391,7 @@ static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc)
static void locomo_spi_ack_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
@ -408,7 +408,7 @@ static void locomo_spi_ack_irq(unsigned int irq)
static void locomo_spi_mask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
@ -417,7 +417,7 @@ static void locomo_spi_mask_irq(unsigned int irq)
static void locomo_spi_unmask_irq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
@ -440,55 +440,55 @@ static void locomo_setup_irq(struct locomo *lchip)
* Install handler for IRQ_LOCOMO_HW.
*/
set_irq_type(lchip->irq, IRQT_FALLING);
set_irq_chipdata(lchip->irq, irqbase);
set_irq_chip_data(lchip->irq, irqbase);
set_irq_chained_handler(lchip->irq, locomo_handler);
/* Install handlers for IRQ_LOCOMO_*_BASE */
set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip);
set_irq_chipdata(IRQ_LOCOMO_KEY_BASE, irqbase);
set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase);
set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler);
set_irq_flags(IRQ_LOCOMO_KEY_BASE, IRQF_VALID | IRQF_PROBE);
set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip);
set_irq_chipdata(IRQ_LOCOMO_GPIO_BASE, irqbase);
set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase);
set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler);
set_irq_flags(IRQ_LOCOMO_GPIO_BASE, IRQF_VALID | IRQF_PROBE);
set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip);
set_irq_chipdata(IRQ_LOCOMO_LT_BASE, irqbase);
set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase);
set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler);
set_irq_flags(IRQ_LOCOMO_LT_BASE, IRQF_VALID | IRQF_PROBE);
set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip);
set_irq_chipdata(IRQ_LOCOMO_SPI_BASE, irqbase);
set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase);
set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler);
set_irq_flags(IRQ_LOCOMO_SPI_BASE, IRQF_VALID | IRQF_PROBE);
/* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */
set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip);
set_irq_chipdata(LOCOMO_IRQ_KEY_START, irqbase);
set_irq_handler(LOCOMO_IRQ_KEY_START, do_edge_IRQ);
set_irq_chip_data(LOCOMO_IRQ_KEY_START, irqbase);
set_irq_handler(LOCOMO_IRQ_KEY_START, handle_edge_irq);
set_irq_flags(LOCOMO_IRQ_KEY_START, IRQF_VALID | IRQF_PROBE);
/* install handlers for IRQ_LOCOMO_GPIO_BASE generated interrupts */
for (irq = LOCOMO_IRQ_GPIO_START; irq < LOCOMO_IRQ_GPIO_START + 16; irq++) {
set_irq_chip(irq, &locomo_gpio_chip);
set_irq_chipdata(irq, irqbase);
set_irq_handler(irq, do_edge_IRQ);
set_irq_chip_data(irq, irqbase);
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
/* install handlers for IRQ_LOCOMO_LT_BASE generated interrupts */
set_irq_chip(LOCOMO_IRQ_LT_START, &locomo_lt_chip);
set_irq_chipdata(LOCOMO_IRQ_LT_START, irqbase);
set_irq_handler(LOCOMO_IRQ_LT_START, do_edge_IRQ);
set_irq_chip_data(LOCOMO_IRQ_LT_START, irqbase);
set_irq_handler(LOCOMO_IRQ_LT_START, handle_edge_irq);
set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE);
/* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */
for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 3; irq++) {
set_irq_chip(irq, &locomo_spi_chip);
set_irq_chipdata(irq, irqbase);
set_irq_handler(irq, do_edge_IRQ);
set_irq_chip_data(irq, irqbase);
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}

30
arch/arm/common/sa1111.c
View File

@ -147,7 +147,7 @@ void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *ho
* will call us again if there are more interrupts to process.
*/
static void
sa1111_irq_handler(unsigned int irq, struct irqdesc *desc)
sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned int stat0, stat1, i;
void __iomem *base = get_irq_data(irq);
@ -187,7 +187,7 @@ static void sa1111_ack_irq(unsigned int irq)
static void sa1111_mask_lowirq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ie0;
ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@ -197,7 +197,7 @@ static void sa1111_mask_lowirq(unsigned int irq)
static void sa1111_unmask_lowirq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ie0;
ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@ -215,7 +215,7 @@ static void sa1111_unmask_lowirq(unsigned int irq)
static int sa1111_retrigger_lowirq(unsigned int irq)
{
unsigned int mask = SA1111_IRQMASK_LO(irq);
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip0;
int i;
@ -236,7 +236,7 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
{
unsigned int mask = SA1111_IRQMASK_LO(irq);
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip0;
if (flags == IRQT_PROBE)
@ -259,7 +259,7 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
{
unsigned int mask = SA1111_IRQMASK_LO(irq);
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long we0;
we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@ -284,7 +284,7 @@ static struct irq_chip sa1111_low_chip = {
static void sa1111_mask_highirq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ie1;
ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@ -294,7 +294,7 @@ static void sa1111_mask_highirq(unsigned int irq)
static void sa1111_unmask_highirq(unsigned int irq)
{
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ie1;
ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@ -312,7 +312,7 @@ static void sa1111_unmask_highirq(unsigned int irq)
static int sa1111_retrigger_highirq(unsigned int irq)
{
unsigned int mask = SA1111_IRQMASK_HI(irq);
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip1;
int i;
@ -333,7 +333,7 @@ static int sa1111_retrigger_highirq(unsigned int irq)
static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
{
unsigned int mask = SA1111_IRQMASK_HI(irq);
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip1;
if (flags == IRQT_PROBE)
@ -356,7 +356,7 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
{
unsigned int mask = SA1111_IRQMASK_HI(irq);
void __iomem *mapbase = get_irq_chipdata(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long we1;
we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@ -410,15 +410,15 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
set_irq_chip(irq, &sa1111_low_chip);
set_irq_chipdata(irq, irqbase);
set_irq_handler(irq, do_edge_IRQ);
set_irq_chip_data(irq, irqbase);
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
set_irq_chip(irq, &sa1111_high_chip);
set_irq_chipdata(irq, irqbase);
set_irq_handler(irq, do_edge_IRQ);
set_irq_chip_data(irq, irqbase);
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}

8
arch/arm/common/vic.c
View File

@ -27,14 +27,14 @@
static void vic_mask_irq(unsigned int irq)
{
void __iomem *base = get_irq_chipdata(irq);
void __iomem *base = get_irq_chip_data(irq);
irq &= 31;
writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
}
static void vic_unmask_irq(unsigned int irq)
{
void __iomem *base = get_irq_chipdata(irq);
void __iomem *base = get_irq_chip_data(irq);
irq &= 31;
writel(1 << irq, base + VIC_INT_ENABLE);
}
@ -88,10 +88,10 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
unsigned int irq = irq_start + i;
set_irq_chip(irq, &vic_chip);
set_irq_chipdata(irq, base);
set_irq_chip_data(irq, base);
if (vic_sources & (1 << i)) {
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}

11
arch/arm/configs/at91rm9200dk_defconfig
View File

@ -357,9 +357,9 @@ CONFIG_MTD_CFI_UTIL=y
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0x10000000
CONFIG_MTD_PHYSMAP_LEN=0x200000
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
CONFIG_MTD_PHYSMAP_START=0
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_BANKWIDTH=0
# CONFIG_MTD_ARM_INTEGRATOR is not set
# CONFIG_MTD_IMPA7 is not set
# CONFIG_MTD_PLATRAM is not set
@ -585,7 +585,9 @@ CONFIG_AT91RM9200_WATCHDOG=y
# CONFIG_USBPCWATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
CONFIG_AT91_RTC=y
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91RM9200=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
@ -979,7 +981,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

11
arch/arm/configs/at91rm9200ek_defconfig
View File

@ -348,9 +348,9 @@ CONFIG_MTD_CFI_UTIL=y
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0x10000000
CONFIG_MTD_PHYSMAP_LEN=0x800000
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
CONFIG_MTD_PHYSMAP_START=0
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_BANKWIDTH=0
# CONFIG_MTD_ARM_INTEGRATOR is not set
# CONFIG_MTD_IMPA7 is not set
# CONFIG_MTD_PLATRAM is not set
@ -566,7 +566,9 @@ CONFIG_AT91RM9200_WATCHDOG=y
# CONFIG_USBPCWATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
CONFIG_AT91_RTC=y
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91RM9200=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
@ -968,7 +970,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

950
arch/arm/configs/at91sam9260ek_defconfig 100644
View File

@ -0,0 +1,950 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.19-rc6
# Fri Nov 17 18:42:21 2006
#
CONFIG_ARM=y
# CONFIG_GENERIC_TIME is not set
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
# CONFIG_EMBEDDED is not set
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# System Type
#
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
CONFIG_ARCH_AT91=y
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
#
# Atmel AT91 System-on-Chip
#
# CONFIG_ARCH_AT91RM9200 is not set
CONFIG_ARCH_AT91SAM9260=y
# CONFIG_ARCH_AT91SAM9261 is not set
#
# AT91SAM9260 Board Type
#
CONFIG_MACH_AT91SAM9260EK=y
#
# AT91 Board Options
#
# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
#
# AT91 Feature Selections
#
# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
#
# Bus support
#
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# Kernel Features
#
# CONFIG_PREEMPT is not set
# CONFIG_NO_IDLE_HZ is not set
CONFIG_HZ=100
# CONFIG_AEABI is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
# CONFIG_RESOURCES_64BIT is not set
# CONFIG_LEDS is not set
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
# CONFIG_XIP_KERNEL is not set
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
# CONFIG_VFP is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
# CONFIG_BINFMT_MISC is not set
# CONFIG_ARTHUR is not set
#
# Power management options
#
# CONFIG_PM is not set
# CONFIG_APM is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_UB is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
#
# SCSI low-level drivers
#
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_DEBUG is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Network device support
#
# CONFIG_NETDEVICES is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
# CONFIG_SERIAL_ATMEL_TTYAT is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
#
# USB-based Watchdog Cards
#
# CONFIG_USBPCWATCHDOG is not set
CONFIG_HW_RANDOM=y
# CONFIG_NVRAM is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Misc devices
#
# CONFIG_TIFM_CORE is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
# CONFIG_USB_DABUSB is not set
#
# Graphics support
#
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set
#
# Miscellaneous USB options
#
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
#
# USB Host Controller Drivers
#
# CONFIG_USB_ISP116X_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_BIG_ENDIAN is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_SL811_HCD is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# may also be needed; see USB_STORAGE Help for more information
#
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DEBUG=y
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_LIBUSUAL is not set
#
# USB Input Devices
#
# CONFIG_USB_HID is not set
#
# USB HID Boot Protocol drivers
#
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
# CONFIG_USB_AIPTEK is not set
# CONFIG_USB_WACOM is not set
# CONFIG_USB_ACECAD is not set
# CONFIG_USB_KBTAB is not set
# CONFIG_USB_POWERMATE is not set
# CONFIG_USB_TOUCHSCREEN is not set
# CONFIG_USB_YEALINK is not set
# CONFIG_USB_XPAD is not set
# CONFIG_USB_ATI_REMOTE is not set
# CONFIG_USB_ATI_REMOTE2 is not set
# CONFIG_USB_KEYSPAN_REMOTE is not set
# CONFIG_USB_APPLETOUCH is not set
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
#
# USB Network Adapters
#
# CONFIG_USB_CATC is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_USBNET_MII is not set
# CONFIG_USB_USBNET is not set
CONFIG_USB_MON=y
#
# USB port drivers
#
#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_AUERSWALD is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_LED is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_PHIDGET is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_TEST is not set
#
# USB DSL modem support
#
#
# USB Gadget Support
#
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG_FILES is not set
CONFIG_USB_GADGET_SELECTED=y
# CONFIG_USB_GADGET_NET2280 is not set
# CONFIG_USB_GADGET_PXA2XX is not set
# CONFIG_USB_GADGET_GOKU is not set
# CONFIG_USB_GADGET_LH7A40X is not set
# CONFIG_USB_GADGET_OMAP is not set
CONFIG_USB_GADGET_AT91=y
CONFIG_USB_AT91=y
# CONFIG_USB_GADGET_DUMMY_HCD is not set
# CONFIG_USB_GADGET_DUALSPEED is not set
CONFIG_USB_ZERO=m
# CONFIG_USB_ETH is not set
CONFIG_USB_GADGETFS=m
CONFIG_USB_FILE_STORAGE=m
# CONFIG_USB_FILE_STORAGE_TEST is not set
CONFIG_USB_G_SERIAL=m
# CONFIG_USB_MIDI_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# Real Time Clock
#
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_CRAMFS=y
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
CONFIG_NLS_CODEPAGE_850=y
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_KERNEL=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_RWSEMS is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_PLIST=y

1106
arch/arm/configs/at91sam9261ek_defconfig 100644
View File

File diff suppressed because it is too large Load Diff

1
arch/arm/configs/badge4_defconfig
View File

@ -1216,7 +1216,6 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

2
arch/arm/configs/carmeva_defconfig
View File

@ -474,7 +474,7 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_AT91_RTC is not set
# CONFIG_AT91RM9200_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set

1
arch/arm/configs/cerfcube_defconfig
View File

@ -851,7 +851,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/collie_defconfig
View File

@ -934,7 +934,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/corgi_defconfig
View File

@ -1513,7 +1513,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/csb337_defconfig
View File

@ -1113,7 +1113,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

3
arch/arm/configs/csb637_defconfig
View File

@ -623,7 +623,7 @@ CONFIG_AT91RM9200_WATCHDOG=y
# CONFIG_USBPCWATCHDOG is not set
# CONFIG_NVRAM is not set
CONFIG_RTC=y
# CONFIG_AT91_RTC is not set
# CONFIG_AT91RM9200_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
@ -1062,7 +1062,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

2
arch/arm/configs/ep93xx_defconfig
View File

@ -125,6 +125,7 @@ CONFIG_CRUNCH=y
#
# EP93xx Platforms
#
CONFIG_MACH_ADSSPHERE=y
CONFIG_MACH_EDB9302=y
CONFIG_MACH_EDB9312=y
CONFIG_MACH_EDB9315=y
@ -1134,7 +1135,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_WAITQ=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/h7202_defconfig
View File

@ -702,7 +702,6 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/hackkit_defconfig
View File

@ -740,7 +740,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_WAITQ=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/integrator_defconfig
View File

@ -835,7 +835,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_LL is not set

1134
arch/arm/configs/iop13xx_defconfig 100644
View File

File diff suppressed because it is too large Load Diff

1
arch/arm/configs/iop32x_defconfig
View File

@ -1204,7 +1204,6 @@ CONFIG_FRAME_POINTER=y
# CONFIG_FORCED_INLINING is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/iop33x_defconfig
View File

@ -1051,7 +1051,6 @@ CONFIG_FRAME_POINTER=y
# CONFIG_FORCED_INLINING is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/ixp2000_defconfig
View File

@ -1026,7 +1026,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/ixp23xx_defconfig
View File

@ -1305,7 +1305,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/ixp4xx_defconfig
View File

@ -1243,7 +1243,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/jornada720_defconfig
View File

@ -889,7 +889,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

3
arch/arm/configs/kb9202_defconfig
View File

@ -437,7 +437,7 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_AT91_RTC is not set
# CONFIG_AT91RM9200_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
@ -753,7 +753,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/lpd270_defconfig
View File

@ -949,7 +949,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/lpd7a400_defconfig
View File

@ -850,7 +850,6 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/lpd7a404_defconfig
View File

@ -1100,7 +1100,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/lubbock_defconfig
View File

@ -772,7 +772,6 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/mainstone_defconfig
View File

@ -766,7 +766,6 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/mx1ads_defconfig
View File

@ -691,7 +691,6 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/neponset_defconfig
View File

@ -1115,7 +1115,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/netwinder_defconfig
View File

@ -994,7 +994,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/netx_defconfig
View File

@ -872,7 +872,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/onearm_defconfig
View File

@ -1045,7 +1045,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/pleb_defconfig
View File

@ -721,7 +721,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/pnx4008_defconfig
View File

@ -1604,7 +1604,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/pxa255-idp_defconfig
View File

@ -768,7 +768,6 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/realview-smp_defconfig
View File

@ -967,7 +967,6 @@ CONFIG_FORCED_INLINING=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/realview_defconfig
View File

@ -759,7 +759,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/rpc_defconfig
View File

@ -910,7 +910,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/s3c2410_defconfig
View File

@ -1319,7 +1319,6 @@ CONFIG_FORCED_INLINING=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/shark_defconfig
View File

@ -965,7 +965,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_LL is not set

1
arch/arm/configs/simpad_defconfig
View File

@ -934,7 +934,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/spitz_defconfig
View File

@ -1406,7 +1406,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

1
arch/arm/configs/versatile_defconfig
View File

@ -972,7 +972,6 @@ CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set

4
arch/arm/kernel/Makefile
View File

@ -24,7 +24,9 @@ obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
obj-$(CONFIG_IWMMXT) += iwmmxt.o iwmmxt-notifier.o
obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
obj-$(CONFIG_IWMMXT) += iwmmxt.o
AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
ifneq ($(CONFIG_ARCH_EBSA110),y)

195
arch/arm/kernel/apm.c
View File

@ -12,7 +12,6 @@
*/
#include <linux/module.h>
#include <linux/poll.h>
#include <linux/timer.h>
#include <linux/slab.h>
#include <linux/proc_fs.h>
#include <linux/miscdevice.h>
@ -26,6 +25,7 @@
#include <linux/init.h>
#include <linux/completion.h>
#include <linux/kthread.h>
#include <linux/delay.h>
#include <asm/apm.h> /* apm_power_info */
#include <asm/system.h>
@ -71,7 +71,8 @@ struct apm_user {
#define SUSPEND_PENDING 1 /* suspend pending read */
#define SUSPEND_READ 2 /* suspend read, pending ack */
#define SUSPEND_ACKED 3 /* suspend acked */
#define SUSPEND_DONE 4 /* suspend completed */
#define SUSPEND_WAIT 4 /* waiting for suspend */
#define SUSPEND_DONE 5 /* suspend completed */
struct apm_queue queue;
};
@ -101,6 +102,7 @@ static DECLARE_WAIT_QUEUE_HEAD(kapmd_wait);
static DEFINE_SPINLOCK(kapmd_queue_lock);
static struct apm_queue kapmd_queue;
static DEFINE_MUTEX(state_lock);
static const char driver_version[] = "1.13"; /* no spaces */
@ -148,40 +150,62 @@ static void queue_add_event(struct apm_queue *q, apm_event_t event)
q->events[q->event_head] = event;
}
static void queue_event_one_user(struct apm_user *as, apm_event_t event)
{
if (as->suser && as->writer) {
switch (event) {
case APM_SYS_SUSPEND:
case APM_USER_SUSPEND:
/*
* If this user already has a suspend pending,
* don't queue another one.
*/
if (as->suspend_state != SUSPEND_NONE)
return;
as->suspend_state = SUSPEND_PENDING;
suspends_pending++;
break;
}
}
queue_add_event(&as->queue, event);
}
static void queue_event(apm_event_t event, struct apm_user *sender)
static void queue_event(apm_event_t event)
{
struct apm_user *as;
down_read(&user_list_lock);
list_for_each_entry(as, &apm_user_list, list) {
if (as != sender && as->reader)
queue_event_one_user(as, event);
if (as->reader)
queue_add_event(&as->queue, event);
}
up_read(&user_list_lock);
wake_up_interruptible(&apm_waitqueue);
}
/*
* queue_suspend_event - queue an APM suspend event.
*
* Check that we're in a state where we can suspend. If not,
* return -EBUSY. Otherwise, queue an event to all "writer"
* users. If there are no "writer" users, return '1' to
* indicate that we can immediately suspend.
*/
static int queue_suspend_event(apm_event_t event, struct apm_user *sender)
{
struct apm_user *as;
int ret = 1;
mutex_lock(&state_lock);
down_read(&user_list_lock);
/*
* If a thread is still processing, we can't suspend, so reject
* the request.
*/
list_for_each_entry(as, &apm_user_list, list) {
if (as != sender && as->reader && as->writer && as->suser &&
as->suspend_state != SUSPEND_NONE) {
ret = -EBUSY;
goto out;
}
}
list_for_each_entry(as, &apm_user_list, list) {
if (as != sender && as->reader && as->writer && as->suser) {
as->suspend_state = SUSPEND_PENDING;
suspends_pending++;
queue_add_event(&as->queue, event);
ret = 0;
}
}
out:
up_read(&user_list_lock);
mutex_unlock(&state_lock);
wake_up_interruptible(&apm_waitqueue);
return ret;
}
static void apm_suspend(void)
{
struct apm_user *as;
@ -191,17 +215,22 @@ static void apm_suspend(void)
* Anyone on the APM queues will think we're still suspended.
* Send a message so everyone knows we're now awake again.
*/
queue_event(APM_NORMAL_RESUME, NULL);
queue_event(APM_NORMAL_RESUME);
/*
* Finally, wake up anyone who is sleeping on the suspend.
*/
mutex_lock(&state_lock);
down_read(&user_list_lock);
list_for_each_entry(as, &apm_user_list, list) {
as->suspend_result = err;
as->suspend_state = SUSPEND_DONE;
if (as->suspend_state == SUSPEND_WAIT ||
as->suspend_state == SUSPEND_ACKED) {
as->suspend_result = err;
as->suspend_state = SUSPEND_DONE;
}
}
up_read(&user_list_lock);
mutex_unlock(&state_lock);
wake_up(&apm_suspend_waitqueue);
}
@ -227,8 +256,11 @@ static ssize_t apm_read(struct file *fp, char __user *buf, size_t count, loff_t
if (copy_to_user(buf, &event, sizeof(event)))
break;
if (event == APM_SYS_SUSPEND || event == APM_USER_SUSPEND)
mutex_lock(&state_lock);
if (as->suspend_state == SUSPEND_PENDING &&
(event == APM_SYS_SUSPEND || event == APM_USER_SUSPEND))
as->suspend_state = SUSPEND_READ;
mutex_unlock(&state_lock);
buf += sizeof(event);
i -= sizeof(event);
@ -270,9 +302,13 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
switch (cmd) {
case APM_IOC_SUSPEND:
mutex_lock(&state_lock);
as->suspend_result = -EINTR;
if (as->suspend_state == SUSPEND_READ) {
int pending;
/*
* If we read a suspend command from /dev/apm_bios,
* then the corresponding APM_IOC_SUSPEND ioctl is
@ -280,47 +316,73 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
*/
as->suspend_state = SUSPEND_ACKED;
suspends_pending--;
pending = suspends_pending == 0;
mutex_unlock(&state_lock);
/*
* If there are no further acknowledges required,
* suspend the system.
*/
if (pending)
apm_suspend();
/*
* Wait for the suspend/resume to complete. If there
* are pending acknowledges, we wait here for them.
*
* Note: we need to ensure that the PM subsystem does
* not kick us out of the wait when it suspends the
* threads.
*/
flags = current->flags;
current->flags |= PF_NOFREEZE;
wait_event(apm_suspend_waitqueue,
as->suspend_state == SUSPEND_DONE);
} else {
as->suspend_state = SUSPEND_WAIT;
mutex_unlock(&state_lock);
/*
* Otherwise it is a request to suspend the system.
* Queue an event for all readers, and expect an
* acknowledge from all writers who haven't already
* acknowledged.
*/
queue_event(APM_USER_SUSPEND, as);
}
err = queue_suspend_event(APM_USER_SUSPEND, as);
if (err < 0) {
/*
* Avoid taking the lock here - this
* should be fine.
*/
as->suspend_state = SUSPEND_NONE;
break;
}
/*
* If there are no further acknowledges required, suspend
* the system.
*/
if (suspends_pending == 0)
apm_suspend();
if (err > 0)
apm_suspend();
/*
* Wait for the suspend/resume to complete. If there are
* pending acknowledges, we wait here for them.
*
* Note that we need to ensure that the PM subsystem does
* not kick us out of the wait when it suspends the threads.
*/
flags = current->flags;
current->flags |= PF_NOFREEZE;
/*
* Wait for the suspend/resume to complete. If there
* are pending acknowledges, we wait here for them.
*
* Note: we need to ensure that the PM subsystem does
* not kick us out of the wait when it suspends the
* threads.
*/
flags = current->flags;
current->flags |= PF_NOFREEZE;
/*
* Note: do not allow a thread which is acking the suspend
* to escape until the resume is complete.
*/
if (as->suspend_state == SUSPEND_ACKED)
wait_event(apm_suspend_waitqueue,
as->suspend_state == SUSPEND_DONE);
else
wait_event_interruptible(apm_suspend_waitqueue,
as->suspend_state == SUSPEND_DONE);
}
current->flags = flags;
mutex_lock(&state_lock);
err = as->suspend_result;
as->suspend_state = SUSPEND_NONE;
mutex_unlock(&state_lock);
break;
}
@ -330,6 +392,8 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
static int apm_release(struct inode * inode, struct file * filp)
{
struct apm_user *as = filp->private_data;
int pending = 0;
filp->private_data = NULL;
down_write(&user_list_lock);
@ -342,11 +406,14 @@ static int apm_release(struct inode * inode, struct file * filp)
* need to balance suspends_pending, which means the
* possibility of sleeping.
*/
mutex_lock(&state_lock);
if (as->suspend_state != SUSPEND_NONE) {
suspends_pending -= 1;
if (suspends_pending == 0)
apm_suspend();
pending = suspends_pending == 0;
}
mutex_unlock(&state_lock);
if (pending)
apm_suspend();
kfree(as);
return 0;
@ -470,6 +537,7 @@ static int kapmd(void *arg)
{
do {
apm_event_t event;
int ret;
wait_event_interruptible(kapmd_wait,
!queue_empty(&kapmd_queue) || kthread_should_stop());
@ -489,13 +557,20 @@ static int kapmd(void *arg)
case APM_LOW_BATTERY:
case APM_POWER_STATUS_CHANGE:
queue_event(event, NULL);
queue_event(event);
break;
case APM_USER_SUSPEND:
case APM_SYS_SUSPEND:
queue_event(event, NULL);
if (suspends_pending == 0)
ret = queue_suspend_event(event, NULL);
if (ret < 0) {
/*
* We were busy. Try again in 50ms.
*/
queue_add_event(&kapmd_queue, event);
msleep(50);
}
if (ret > 0)
apm_suspend();
break;

1
arch/arm/kernel/asm-offsets.c
View File

@ -15,6 +15,7 @@
#include <asm/mach/arch.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
#include <asm/procinfo.h>
/*
* Make sure that the compiler and target are compatible.

10
arch/arm/kernel/ecard.c
View File

@ -529,7 +529,7 @@ static void ecard_dump_irq_state(void)
}
}
static void ecard_check_lockup(struct irqdesc *desc)
static void ecard_check_lockup(struct irq_desc *desc)
{
static unsigned long last;
static int lockup;
@ -567,7 +567,7 @@ static void ecard_check_lockup(struct irqdesc *desc)
}
static void
ecard_irq_handler(unsigned int irq, struct irqdesc *desc)
ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
{
ecard_t *ec;
int called = 0;
@ -585,7 +585,7 @@ ecard_irq_handler(unsigned int irq, struct irqdesc *desc)
pending = ecard_default_ops.irqpending(ec);
if (pending) {
struct irqdesc *d = irq_desc + ec->irq;
struct irq_desc *d = irq_desc + ec->irq;
desc_handle_irq(ec->irq, d);
called ++;
}
@ -609,7 +609,7 @@ static unsigned char first_set[] =
};
static void
ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc)
ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc)
{
const unsigned int statusmask = 15;
unsigned int status;
@ -1022,7 +1022,7 @@ ecard_probe(int slot, card_type_t type)
if (slot < 8) {
ec->irq = 32 + slot;
set_irq_chip(ec->irq, &ecard_chip);
set_irq_handler(ec->irq, do_level_IRQ);
set_irq_handler(ec->irq, handle_level_irq);
set_irq_flags(ec->irq, IRQF_VALID);
}

9
arch/arm/kernel/entry-armv.S
View File

@ -589,10 +589,6 @@ ENTRY(__switch_to)
strex r5, r4, [ip] @ Clear exclusive monitor
#endif
#endif
#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
mra r4, r5, acc0
stmia ip, {r4, r5}
#endif
#if defined(CONFIG_HAS_TLS_REG)
mcr p15, 0, r3, c13, c0, 3 @ set TLS register
#elif !defined(CONFIG_TLS_REG_EMUL)
@ -601,11 +597,6 @@ ENTRY(__switch_to)
#endif
#ifdef CONFIG_MMU
mcr p15, 0, r6, c3, c0, 0 @ Set domain register
#endif
#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra
ldmib r4, {r4, r5}
mar acc0, r4, r5
#endif
mov r5, r0
add r4, r2, #TI_CPU_SAVE

1
arch/arm/kernel/head-nommu.S
View File

@ -16,7 +16,6 @@
#include <asm/assembler.h>
#include <asm/mach-types.h>
#include <asm/procinfo.h>
#include <asm/ptrace.h>
#include <asm/asm-offsets.h>
#include <asm/thread_info.h>

1
arch/arm/kernel/head.S
View File

@ -16,7 +16,6 @@
#include <asm/assembler.h>
#include <asm/domain.h>
#include <asm/procinfo.h>
#include <asm/ptrace.h>
#include <asm/asm-offsets.h>
#include <asm/memory.h>

8
arch/arm/kernel/irq.c
View File

@ -112,7 +112,7 @@ static struct irq_desc bad_irq_desc = {
asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
{
struct pt_regs *old_regs = set_irq_regs(regs);
struct irqdesc *desc = irq_desc + irq;
struct irq_desc *desc = irq_desc + irq;
/*
* Some hardware gives randomly wrong interrupts. Rather
@ -134,7 +134,7 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
void set_irq_flags(unsigned int irq, unsigned int iflags)
{
struct irqdesc *desc;
struct irq_desc *desc;
unsigned long flags;
if (irq >= NR_IRQS) {
@ -171,7 +171,7 @@ void __init init_IRQ(void)
#ifdef CONFIG_HOTPLUG_CPU
static void route_irq(struct irqdesc *desc, unsigned int irq, unsigned int cpu)
static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
{
pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu);
@ -190,7 +190,7 @@ void migrate_irqs(void)
unsigned int i, cpu = smp_processor_id();
for (i = 0; i < NR_IRQS; i++) {
struct irqdesc *desc = irq_desc + i;
struct irq_desc *desc = irq_desc + i;
if (desc->cpu == cpu) {
unsigned int newcpu = any_online_cpu(desc->affinity);

63
arch/arm/kernel/iwmmxt-notifier.c
View File

@ -1,63 +0,0 @@
/*
* linux/arch/arm/kernel/iwmmxt-notifier.c
*
* XScale iWMMXt (Concan) context switching and handling
*
* Initial code:
* Copyright (c) 2003, Intel Corporation
*
* Full lazy switching support, optimizations and more, by Nicolas Pitre
* Copyright (c) 2003-2004, MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <asm/thread_notify.h>
#include <asm/io.h>
static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
{
struct thread_info *thread = t;
switch (cmd) {
case THREAD_NOTIFY_FLUSH:
/*
* flush_thread() zeroes thread->fpstate, so no need
* to do anything here.
*
* FALLTHROUGH: Ensure we don't try to overwrite our newly
* initialised state information on the first fault.
*/
case THREAD_NOTIFY_RELEASE:
iwmmxt_task_release(thread);
break;
case THREAD_NOTIFY_SWITCH:
iwmmxt_task_switch(thread);
break;
}
return NOTIFY_DONE;
}
static struct notifier_block iwmmxt_notifier_block = {
.notifier_call = iwmmxt_do,
};
static int __init iwmmxt_init(void)
{
thread_register_notifier(&iwmmxt_notifier_block);
return 0;
}
late_initcall(iwmmxt_init);

61
arch/arm/kernel/process.c
View File

@ -280,67 +280,6 @@ void show_fpregs(struct user_fp *regs)
(unsigned long)regs->fpcr);
}
/*
* Task structure and kernel stack allocation.
*/
struct thread_info_list {
unsigned long *head;
unsigned int nr;
};
static DEFINE_PER_CPU(struct thread_info_list, thread_info_list) = { NULL, 0 };
#define EXTRA_TASK_STRUCT 4
struct thread_info *alloc_thread_info(struct task_struct *task)
{
struct thread_info *thread = NULL;
if (EXTRA_TASK_STRUCT) {
struct thread_info_list *th = &get_cpu_var(thread_info_list);
unsigned long *p = th->head;
if (p) {
th->head = (unsigned long *)p[0];
th->nr -= 1;
}
put_cpu_var(thread_info_list);
thread = (struct thread_info *)p;
}
if (!thread)
thread = (struct thread_info *)
__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
#ifdef CONFIG_DEBUG_STACK_USAGE
/*
* The stack must be cleared if you want SYSRQ-T to
* give sensible stack usage information
*/
if (thread)
memzero(thread, THREAD_SIZE);
#endif
return thread;
}
void free_thread_info(struct thread_info *thread)
{
if (EXTRA_TASK_STRUCT) {
struct thread_info_list *th = &get_cpu_var(thread_info_list);
if (th->nr < EXTRA_TASK_STRUCT) {
unsigned long *p = (unsigned long *)thread;
p[0] = (unsigned long)th->head;
th->head = p;
th->nr += 1;
put_cpu_var(thread_info_list);
return;
}
put_cpu_var(thread_info_list);
}
free_pages((unsigned long)thread, THREAD_SIZE_ORDER);
}
/*
* Free current thread data structures etc..
*/

14
arch/arm/kernel/setup.c
View File

@ -357,9 +357,6 @@ static void __init setup_processor(void)
#ifndef CONFIG_VFP
elf_hwcap &= ~HWCAP_VFP;
#endif
#ifndef CONFIG_IWMMXT
elf_hwcap &= ~HWCAP_IWMMXT;
#endif
cpu_proc_init();
}
@ -441,16 +438,19 @@ __early_param("initrd=", early_initrd);
static void __init arm_add_memory(unsigned long start, unsigned long size)
{
struct membank *bank;
/*
* Ensure that start/size are aligned to a page boundary.
* Size is appropriately rounded down, start is rounded up.
*/
size -= start & ~PAGE_MASK;
meminfo.bank[meminfo.nr_banks].start = PAGE_ALIGN(start);
meminfo.bank[meminfo.nr_banks].size = size & PAGE_MASK;
meminfo.bank[meminfo.nr_banks].node = PHYS_TO_NID(start);
meminfo.nr_banks += 1;
bank = &meminfo.bank[meminfo.nr_banks++];
bank->start = PAGE_ALIGN(start);
bank->size = size & PAGE_MASK;
bank->node = PHYS_TO_NID(start);
}
/*

1
arch/arm/kernel/signal.c
View File

@ -12,6 +12,7 @@
#include <linux/ptrace.h>
#include <linux/personality.h>
#include <asm/elf.h>
#include <asm/cacheflush.h>
#include <asm/ucontext.h>
#include <asm/uaccess.h>

7
arch/arm/kernel/traps.c
View File

@ -631,12 +631,9 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs)
notify_die("unknown data abort code", regs, &info, instr, 0);
}
void __attribute__((noreturn)) __bug(const char *file, int line, void *data)
void __attribute__((noreturn)) __bug(const char *file, int line)
{
printk(KERN_CRIT"kernel BUG at %s:%d!", file, line);
if (data)
printk(" - extra data = %p", data);
printk("\n");
printk(KERN_CRIT"kernel BUG at %s:%d!\n", file, line);
*(int *)0 = 0;
/* Avoid "noreturn function does return" */

179
arch/arm/kernel/xscale-cp0.c 100644
View File

@ -0,0 +1,179 @@
/*
* linux/arch/arm/kernel/xscale-cp0.c
*
* XScale DSP and iWMMXt coprocessor context switching and handling
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <asm/thread_notify.h>
#include <asm/io.h>
static inline void dsp_save_state(u32 *state)
{
__asm__ __volatile__ (
"mrrc p0, 0, %0, %1, c0\n"
: "=r" (state[0]), "=r" (state[1]));
}
static inline void dsp_load_state(u32 *state)
{
__asm__ __volatile__ (
"mcrr p0, 0, %0, %1, c0\n"
: : "r" (state[0]), "r" (state[1]));
}
static int dsp_do(struct notifier_block *self, unsigned long cmd, void *t)
{
struct thread_info *thread = t;
switch (cmd) {
case THREAD_NOTIFY_FLUSH:
thread->cpu_context.extra[0] = 0;
thread->cpu_context.extra[1] = 0;
break;
case THREAD_NOTIFY_SWITCH:
dsp_save_state(current_thread_info()->cpu_context.extra);
dsp_load_state(thread->cpu_context.extra);
break;
}
return NOTIFY_DONE;
}
static struct notifier_block dsp_notifier_block = {
.notifier_call = dsp_do,
};
#ifdef CONFIG_IWMMXT
static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
{
struct thread_info *thread = t;
switch (cmd) {
case THREAD_NOTIFY_FLUSH:
/*
* flush_thread() zeroes thread->fpstate, so no need
* to do anything here.
*
* FALLTHROUGH: Ensure we don't try to overwrite our newly
* initialised state information on the first fault.
*/
case THREAD_NOTIFY_RELEASE:
iwmmxt_task_release(thread);
break;
case THREAD_NOTIFY_SWITCH:
iwmmxt_task_switch(thread);
break;
}
return NOTIFY_DONE;
}
static struct notifier_block iwmmxt_notifier_block = {
.notifier_call = iwmmxt_do,
};
#endif
static u32 __init xscale_cp_access_read(void)
{
u32 value;
__asm__ __volatile__ (
"mrc p15, 0, %0, c15, c1, 0\n\t"
: "=r" (value));
return value;
}
static void __init xscale_cp_access_write(u32 value)
{
u32 temp;
__asm__ __volatile__ (
"mcr p15, 0, %1, c15, c1, 0\n\t"
"mrc p15, 0, %0, c15, c1, 0\n\t"
"mov %0, %0\n\t"
"sub pc, pc, #4\n\t"
: "=r" (temp) : "r" (value));
}
/*
* Detect whether we have a MAC coprocessor (40 bit register) or an
* iWMMXt coprocessor (64 bit registers) by loading 00000100:00000000
* into a coprocessor register and reading it back, and checking
* whether the upper word survived intact.
*/
static int __init cpu_has_iwmmxt(void)
{
u32 lo;
u32 hi;
/*
* This sequence is interpreted by the DSP coprocessor as:
* mar acc0, %2, %3
* mra %0, %1, acc0
*
* And by the iWMMXt coprocessor as:
* tmcrr wR0, %2, %3
* tmrrc %0, %1, wR0
*/
__asm__ __volatile__ (
"mcrr p0, 0, %2, %3, c0\n"
"mrrc p0, 0, %0, %1, c0\n"
: "=r" (lo), "=r" (hi)
: "r" (0), "r" (0x100));
return !!hi;
}
/*
* If we detect that the CPU has iWMMXt (and CONFIG_IWMMXT=y), we
* disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
* switch code handle iWMMXt context switching. If on the other
* hand the CPU has a DSP coprocessor, we keep access to CP0 enabled
* all the time, and save/restore acc0 on context switch in non-lazy
* fashion.
*/
static int __init xscale_cp0_init(void)
{
u32 cp_access;
cp_access = xscale_cp_access_read() & ~3;
xscale_cp_access_write(cp_access | 1);
if (cpu_has_iwmmxt()) {
#ifndef CONFIG_IWMMXT
printk(KERN_WARNING "CAUTION: XScale iWMMXt coprocessor "
"detected, but kernel support is missing.\n");
#else
printk(KERN_INFO "XScale iWMMXt coprocessor detected.\n");
elf_hwcap |= HWCAP_IWMMXT;
thread_register_notifier(&iwmmxt_notifier_block);
#endif
} else {
printk(KERN_INFO "XScale DSP coprocessor detected.\n");
thread_register_notifier(&dsp_notifier_block);
cp_access |= 1;
}
xscale_cp_access_write(cp_access);
return 0;
}
late_initcall(xscale_cp0_init);

4
arch/arm/mach-aaec2000/core.c
View File

@ -82,7 +82,7 @@ static void aaec2000_int_unmask(unsigned int irq)
IRQ_INTENS |= (1 << irq);
}
static struct irqchip aaec2000_irq_chip = {
static struct irq_chip aaec2000_irq_chip = {
.ack = aaec2000_int_ack,
.mask = aaec2000_int_mask,
.unmask = aaec2000_int_unmask,
@ -93,7 +93,7 @@ void __init aaec2000_init_irq(void)
unsigned int i;
for (i = 0; i < NR_IRQS; i++) {
set_irq_handler(i, do_level_IRQ);
set_irq_handler(i, handle_level_irq);
set_irq_chip(i, &aaec2000_irq_chip);
set_irq_flags(i, IRQF_VALID);
}

36
arch/arm/mach-at91rm9200/Kconfig
View File

@ -2,7 +2,8 @@ if ARCH_AT91
menu "Atmel AT91 System-on-Chip"
comment "Atmel AT91 Processors"
choice
prompt "Atmel AT91 Processor"
config ARCH_AT91RM9200
bool "AT91RM9200"
@ -13,6 +14,8 @@ config ARCH_AT91SAM9260
config ARCH_AT91SAM9261
bool "AT91SAM9261"
endchoice
# ----------------------------------------------------------
if ARCH_AT91RM9200
@ -33,7 +36,6 @@ config ARCH_AT91RM9200DK
Select this if you are using Atmel's AT91RM9200-DK Development board.
(Discontinued)
config MACH_AT91RM9200EK
bool "Atmel AT91RM9200-EK Evaluation Kit"
depends on ARCH_AT91RM9200
@ -90,6 +92,13 @@ if ARCH_AT91SAM9260
comment "AT91SAM9260 Board Type"
config MACH_AT91SAM9260EK
bool "Atmel AT91SAM9260-EK Evaluation Kit"
depends on ARCH_AT91SAM9260
help
Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
endif
# ----------------------------------------------------------
@ -98,8 +107,31 @@ if ARCH_AT91SAM9261
comment "AT91SAM9261 Board Type"
config MACH_AT91SAM9261EK
bool "Atmel AT91SAM9261-EK Evaluation Kit"
depends on ARCH_AT91SAM9261
help
Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
endif
# ----------------------------------------------------------
comment "AT91 Board Options"
config MTD_AT91_DATAFLASH_CARD
bool "Enable DataFlash Card support"
depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK)
help
Enable support for the DataFlash card.
config MTD_NAND_AT91_BUSWIDTH_16
bool "Enable 16-bit data bus interface to NAND flash"
depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK)
help
On AT91SAM926x boards both types of NAND flash can be present
(8 and 16 bit data bus width).
# ----------------------------------------------------------

12
arch/arm/mach-at91rm9200/Makefile
View File

@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
obj-y := clock.o irq.o gpio.o devices.o
obj-y := clock.o irq.o gpio.o
obj-m :=
obj-n :=
obj- :=
@ -10,11 +10,11 @@ obj- :=
obj-$(CONFIG_PM) += pm.o
# CPU-specific support
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o
obj-$(CONFIG_ARCH_AT91SAM9260) +=
obj-$(CONFIG_ARCH_AT91SAM9261) +=
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
# AT91RM9200 Board-specific support
# AT91RM9200 board-specific support
obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
@ -26,8 +26,10 @@ obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
obj-$(CONFIG_MACH_KAFA) += board-kafa.o
# AT91SAM9260 board-specific support
obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
# AT91SAM9261 board-specific support
obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
# LEDs support
led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o

42
arch/arm/mach-at91rm9200/at91rm9200.c
View File

@ -14,8 +14,10 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/at91rm9200.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_st.h>
#include <asm/hardware.h>
#include "generic.h"
#include "clock.h"
@ -25,33 +27,13 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
.pfn = __phys_to_pfn(AT91_BASE_SYS),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_SPI,
.pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_EMAC,
.pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_TWI,
.pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_MCI,
.pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_UDP,
.pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_SRAM_VIRT_BASE,
.virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE,
.pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
.length = AT91RM9200_SRAM_SIZE,
.type = MT_DEVICE,
@ -222,6 +204,16 @@ static struct at91_gpio_bank at91rm9200_gpio[] = {
}
};
static void at91rm9200_reset(void)
{
/*
* Perform a hardware reset with the use of the Watchdog timer.
*/
at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
}
/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
@ -230,6 +222,12 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks
/* Map peripherals */
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
at91_arch_reset = at91rm9200_reset;
at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
| (1 << AT91RM9200_ID_IRQ6);
/* Init clock subsystem */
at91_clock_init(main_clock);

160
arch/arm/mach-at91rm9200/devices.c → arch/arm/mach-at91rm9200/at91rm9200_devices.c
View File

@ -1,5 +1,5 @@
/*
* arch/arm/mach-at91rm9200/devices.c
* arch/arm/mach-at91rm9200/at91rm9200_devices.c
*
* Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
* Copyright (C) 2005 David Brownell
@ -15,9 +15,10 @@
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91rm9200.h>
#include <asm/arch/at91rm9200_mc.h>
#include "generic.h"
@ -33,7 +34,7 @@
static u64 ohci_dmamask = 0xffffffffUL;
static struct at91_usbh_data usbh_data;
static struct resource at91_usbh_resources[] = {
static struct resource usbh_resources[] = {
[0] = {
.start = AT91RM9200_UHP_BASE,
.end = AT91RM9200_UHP_BASE + SZ_1M - 1,
@ -54,8 +55,8 @@ static struct platform_device at91rm9200_usbh_device = {
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbh_data,
},
.resource = at91_usbh_resources,
.num_resources = ARRAY_SIZE(at91_usbh_resources),
.resource = usbh_resources,
.num_resources = ARRAY_SIZE(usbh_resources),
};
void __init at91_add_device_usbh(struct at91_usbh_data *data)
@ -78,7 +79,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
#ifdef CONFIG_USB_GADGET_AT91
static struct at91_udc_data udc_data;
static struct resource at91_udc_resources[] = {
static struct resource udc_resources[] = {
[0] = {
.start = AT91RM9200_BASE_UDP,
.end = AT91RM9200_BASE_UDP + SZ_16K - 1,
@ -97,8 +98,8 @@ static struct platform_device at91rm9200_udc_device = {
.dev = {
.platform_data = &udc_data,
},
.resource = at91_udc_resources,
.num_resources = ARRAY_SIZE(at91_udc_resources),
.resource = udc_resources,
.num_resources = ARRAY_SIZE(udc_resources),
};
void __init at91_add_device_udc(struct at91_udc_data *data)
@ -129,7 +130,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
static u64 eth_dmamask = 0xffffffffUL;
static struct at91_eth_data eth_data;
static struct resource at91_eth_resources[] = {
static struct resource eth_resources[] = {
[0] = {
.start = AT91_VA_BASE_EMAC,
.end = AT91_VA_BASE_EMAC + SZ_16K - 1,
@ -150,8 +151,8 @@ static struct platform_device at91rm9200_eth_device = {
.coherent_dma_mask = 0xffffffff,
.platform_data = &eth_data,
},
.resource = at91_eth_resources,
.num_resources = ARRAY_SIZE(at91_eth_resources),
.resource = eth_resources,
.num_resources = ARRAY_SIZE(eth_resources),
};
void __init at91_add_device_eth(struct at91_eth_data *data)
@ -202,11 +203,13 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {}
#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
static struct at91_cf_data cf_data;
static struct resource at91_cf_resources[] = {
#define CF_BASE AT91_CHIPSELECT_4
static struct resource cf_resources[] = {
[0] = {
.start = AT91_CF_BASE,
.start = CF_BASE,
/* ties up CS4, CS5 and CS6 */
.end = AT91_CF_BASE + (0x30000000 - 1),
.end = CF_BASE + (0x30000000 - 1),
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
},
};
@ -217,15 +220,38 @@ static struct platform_device at91rm9200_cf_device = {
.dev = {
.platform_data = &cf_data,
},
.resource = at91_cf_resources,
.num_resources = ARRAY_SIZE(at91_cf_resources),
.resource = cf_resources,
.num_resources = ARRAY_SIZE(cf_resources),
};
void __init at91_add_device_cf(struct at91_cf_data *data)
{
unsigned int csa;
if (!data)
return;
data->chipselect = 4; /* can only use EBI ChipSelect 4 */
/* CF takes over CS4, CS5, CS6 */
csa = at91_sys_read(AT91_EBI_CSA);
at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
/*
* Static memory controller timing adjustments.
* REVISIT: these timings are in terms of MCK cycles, so
* when MCK changes (cpufreq etc) so must these values...
*/
at91_sys_write(AT91_SMC_CSR(4),
AT91_SMC_ACSS_STD
| AT91_SMC_DBW_16
| AT91_SMC_BAT
| AT91_SMC_WSEN
| AT91_SMC_NWS_(32) /* wait states */
| AT91_SMC_RWSETUP_(6) /* setup time */
| AT91_SMC_RWHOLD_(4) /* hold time */
);
/* input/irq */
if (data->irq_pin) {
at91_set_gpio_input(data->irq_pin, 1);
@ -245,6 +271,9 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
/* nWAIT is _not_ a default setting */
at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
cf_data = *data;
platform_device_register(&at91rm9200_cf_device);
}
@ -257,11 +286,11 @@ void __init at91_add_device_cf(struct at91_cf_data *data) {}
* MMC / SD
* -------------------------------------------------------------------- */
#if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE)
#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
static u64 mmc_dmamask = 0xffffffffUL;
static struct at91_mmc_data mmc_data;
static struct resource at91_mmc_resources[] = {
static struct resource mmc_resources[] = {
[0] = {
.start = AT91RM9200_BASE_MCI,
.end = AT91RM9200_BASE_MCI + SZ_16K - 1,
@ -282,8 +311,8 @@ static struct platform_device at91rm9200_mmc_device = {
.coherent_dma_mask = 0xffffffff,
.platform_data = &mmc_data,
},
.resource = at91_mmc_resources,
.num_resources = ARRAY_SIZE(at91_mmc_resources),
.resource = mmc_resources,
.num_resources = ARRAY_SIZE(mmc_resources),
};
void __init at91_add_device_mmc(struct at91_mmc_data *data)
@ -298,31 +327,33 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
}
if (data->wp_pin)
at91_set_gpio_input(data->wp_pin, 1);
if (data->vcc_pin)
at91_set_gpio_output(data->vcc_pin, 0);
/* CLK */
at91_set_A_periph(AT91_PIN_PA27, 0);
if (data->is_b) {
if (data->slot_b) {
/* CMD */
at91_set_B_periph(AT91_PIN_PA8, 0);
at91_set_B_periph(AT91_PIN_PA8, 1);
/* DAT0, maybe DAT1..DAT3 */
at91_set_B_periph(AT91_PIN_PA9, 0);
at91_set_B_periph(AT91_PIN_PA9, 1);
if (data->wire4) {
at91_set_B_periph(AT91_PIN_PA10, 0);
at91_set_B_periph(AT91_PIN_PA11, 0);
at91_set_B_periph(AT91_PIN_PA12, 0);
at91_set_B_periph(AT91_PIN_PA10, 1);
at91_set_B_periph(AT91_PIN_PA11, 1);
at91_set_B_periph(AT91_PIN_PA12, 1);
}
} else {
/* CMD */
at91_set_A_periph(AT91_PIN_PA28, 0);
at91_set_A_periph(AT91_PIN_PA28, 1);
/* DAT0, maybe DAT1..DAT3 */
at91_set_A_periph(AT91_PIN_PA29, 0);
at91_set_A_periph(AT91_PIN_PA29, 1);
if (data->wire4) {
at91_set_B_periph(AT91_PIN_PB3, 0);
at91_set_B_periph(AT91_PIN_PB4, 0);
at91_set_B_periph(AT91_PIN_PB5, 0);
at91_set_B_periph(AT91_PIN_PB3, 1);
at91_set_B_periph(AT91_PIN_PB4, 1);
at91_set_B_periph(AT91_PIN_PB5, 1);
}
}
@ -341,29 +372,45 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
static struct resource at91_nand_resources[] = {
#define NAND_BASE AT91_CHIPSELECT_3
static struct resource nand_resources[] = {
{
.start = AT91_SMARTMEDIA_BASE,
.end = AT91_SMARTMEDIA_BASE + SZ_8M - 1,
.start = NAND_BASE,
.end = NAND_BASE + SZ_8M - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device at91_nand_device = {
static struct platform_device at91rm9200_nand_device = {
.name = "at91_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
},
.resource = at91_nand_resources,
.num_resources = ARRAY_SIZE(at91_nand_resources),
.resource = nand_resources,
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
{
unsigned int csa;
if (!data)
return;
/* enable the address range of CS3 */
csa = at91_sys_read(AT91_EBI_CSA);
at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
/* set the bus interface characteristics */
at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
| AT91_SMC_NWS_(5)
| AT91_SMC_TDF_(1)
| AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
| AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
);
/* enable pin */
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
@ -380,7 +427,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
nand_data = *data;
platform_device_register(&at91_nand_device);
platform_device_register(&at91rm9200_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
@ -392,10 +439,25 @@ void __init at91_add_device_nand(struct at91_nand_data *data) {}
* -------------------------------------------------------------------- */
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
static struct resource twi_resources[] = {
[0] = {
.start = AT91RM9200_BASE_TWI,
.end = AT91RM9200_BASE_TWI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_TWI,
.end = AT91RM9200_ID_TWI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91rm9200_twi_device = {
.name = "at91_i2c",
.id = -1,
.num_resources = 0,
.resource = twi_resources,
.num_resources = ARRAY_SIZE(twi_resources),
};
void __init at91_add_device_i2c(void)
@ -421,7 +483,7 @@ void __init at91_add_device_i2c(void) {}
#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
static u64 spi_dmamask = 0xffffffffUL;
static struct resource at91_spi_resources[] = {
static struct resource spi_resources[] = {
[0] = {
.start = AT91RM9200_BASE_SPI,
.end = AT91RM9200_BASE_SPI + SZ_16K - 1,
@ -438,14 +500,14 @@ static struct platform_device at91rm9200_spi_device = {
.name = "at91_spi",
.id = 0,
.dev = {
.dma_mask = &spi_dmamask,
.coherent_dma_mask = 0xffffffff,
.dma_mask = &spi_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.resource = at91_spi_resources,
.num_resources = ARRAY_SIZE(at91_spi_resources),
.resource = spi_resources,
.num_resources = ARRAY_SIZE(spi_resources),
};
static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
{
@ -461,7 +523,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
if (devices[i].controller_data)
cs_pin = (unsigned long) devices[i].controller_data;
else
cs_pin = at91_spi_standard_cs[devices[i].chip_select];
cs_pin = spi_standard_cs[devices[i].chip_select];
#ifdef CONFIG_SPI_AT91_MANUAL_CS
at91_set_gpio_output(cs_pin, 1);
@ -474,7 +536,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
}
spi_register_board_info(devices, nr_devices);
at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi");
at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi");
platform_device_register(&at91rm9200_spi_device);
}
#else
@ -486,7 +548,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
* RTC
* -------------------------------------------------------------------- */
#if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE)
#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
static struct platform_device at91rm9200_rtc_device = {
.name = "at91_rtc",
.id = -1,
@ -506,7 +568,7 @@ static void __init at91_add_device_rtc(void) {}
* Watchdog
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE)
#if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
static struct platform_device at91rm9200_wdt_device = {
.name = "at91_wdt",
.id = -1,

5
arch/arm/mach-at91rm9200/at91rm9200_time.c
View File

@ -30,6 +30,8 @@
#include <asm/io.h>
#include <asm/mach/time.h>
#include <asm/arch/at91_st.h>
static unsigned long last_crtr;
/*
@ -99,6 +101,9 @@ void at91rm9200_timer_reset(void)
/* Set Period Interval timer */
at91_sys_write(AT91_ST_PIMR, LATCH);
/* Clear any pending interrupts */
(void) at91_sys_read(AT91_ST_SR);
/* Enable Period Interval Timer interrupt */
at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
}

294
arch/arm/mach-at91rm9200/at91sam9260.c 100644
View File

@ -0,0 +1,294 @@
/*
* arch/arm/mach-at91rm9200/at91sam9260.c
*
* Copyright (C) 2006 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#include <linux/module.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/at91sam9260.h>
#include <asm/arch/at91_pmc.h>
#include "generic.h"
#include "clock.h"
static struct map_desc at91sam9260_io_desc[] __initdata = {
{
.virtual = AT91_VA_BASE_SYS,
.pfn = __phys_to_pfn(AT91_BASE_SYS),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
.pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
.length = AT91SAM9260_SRAM0_SIZE,
.type = MT_DEVICE,
}, {
.virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
.pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
.length = AT91SAM9260_SRAM1_SIZE,
.type = MT_DEVICE,
},
};
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
/*
* The peripheral clocks.
*/
static struct clk pioA_clk = {
.name = "pioA_clk",
.pmc_mask = 1 << AT91SAM9260_ID_PIOA,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk pioB_clk = {
.name = "pioB_clk",
.pmc_mask = 1 << AT91SAM9260_ID_PIOB,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk pioC_clk = {
.name = "pioC_clk",
.pmc_mask = 1 << AT91SAM9260_ID_PIOC,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk adc_clk = {
.name = "adc_clk",
.pmc_mask = 1 << AT91SAM9260_ID_ADC,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart0_clk = {
.name = "usart0_clk",
.pmc_mask = 1 << AT91SAM9260_ID_US0,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart1_clk = {
.name = "usart1_clk",
.pmc_mask = 1 << AT91SAM9260_ID_US1,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart2_clk = {
.name = "usart2_clk",
.pmc_mask = 1 << AT91SAM9260_ID_US2,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk mmc_clk = {
.name = "mci_clk",
.pmc_mask = 1 << AT91SAM9260_ID_MCI,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk udc_clk = {
.name = "udc_clk",
.pmc_mask = 1 << AT91SAM9260_ID_UDP,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk twi_clk = {
.name = "twi_clk",
.pmc_mask = 1 << AT91SAM9260_ID_TWI,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk spi0_clk = {
.name = "spi0_clk",
.pmc_mask = 1 << AT91SAM9260_ID_SPI0,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk spi1_clk = {
.name = "spi1_clk",
.pmc_mask = 1 << AT91SAM9260_ID_SPI1,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk ohci_clk = {
.name = "ohci_clk",
.pmc_mask = 1 << AT91SAM9260_ID_UHP,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk ether_clk = {
.name = "ether_clk",
.pmc_mask = 1 << AT91SAM9260_ID_EMAC,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk isi_clk = {
.name = "isi_clk",
.pmc_mask = 1 << AT91SAM9260_ID_ISI,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart3_clk = {
.name = "usart3_clk",
.pmc_mask = 1 << AT91SAM9260_ID_US3,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart4_clk = {
.name = "usart4_clk",
.pmc_mask = 1 << AT91SAM9260_ID_US4,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart5_clk = {
.name = "usart5_clk",
.pmc_mask = 1 << AT91SAM9260_ID_US5,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk *periph_clocks[] __initdata = {
&pioA_clk,
&pioB_clk,
&pioC_clk,
&adc_clk,
&usart0_clk,
&usart1_clk,
&usart2_clk,
&mmc_clk,
&udc_clk,
&twi_clk,
&spi0_clk,
&spi1_clk,
// ssc
// tc0 .. tc2
&ohci_clk,
&ether_clk,
&isi_clk,
&usart3_clk,
&usart4_clk,
&usart5_clk,
// tc3 .. tc5
// irq0 .. irq2
};
/*
* The two programmable clocks.
* You must configure pin multiplexing to bring these signals out.
*/
static struct clk pck0 = {
.name = "pck0",
.pmc_mask = AT91_PMC_PCK0,
.type = CLK_TYPE_PROGRAMMABLE,
.id = 0,
};
static struct clk pck1 = {
.name = "pck1",
.pmc_mask = AT91_PMC_PCK1,
.type = CLK_TYPE_PROGRAMMABLE,
.id = 1,
};
static void __init at91sam9260_register_clocks(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clk_register(&pck0);
clk_register(&pck1);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */
static struct at91_gpio_bank at91sam9260_gpio[] = {
{
.id = AT91SAM9260_ID_PIOA,
.offset = AT91_PIOA,
.clock = &pioA_clk,
}, {
.id = AT91SAM9260_ID_PIOB,
.offset = AT91_PIOB,
.clock = &pioB_clk,
}, {
.id = AT91SAM9260_ID_PIOC,
.offset = AT91_PIOC,
.clock = &pioC_clk,
}
};
static void at91sam9260_reset(void)
{
#warning "Implement CPU reset"
}
/* --------------------------------------------------------------------
* AT91SAM9260 processor initialization
* -------------------------------------------------------------------- */
void __init at91sam9260_initialize(unsigned long main_clock)
{
/* Map peripherals */
iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
at91_arch_reset = at91sam9260_reset;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
/* Init clock subsystem */
at91_clock_init(main_clock);
/* Register the processor-specific clocks */
at91sam9260_register_clocks();
/* Register GPIO subsystem */
at91_gpio_init(at91sam9260_gpio, 3);
}
/* --------------------------------------------------------------------
* Interrupt initialization
* -------------------------------------------------------------------- */
/*
* The default interrupt priority levels (0 = lowest, 7 = highest).
*/
static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
7, /* Advanced Interrupt Controller */
7, /* System Peripherals */
0, /* Parallel IO Controller A */
0, /* Parallel IO Controller B */
0, /* Parallel IO Controller C */
0, /* Analog-to-Digital Converter */
6, /* USART 0 */
6, /* USART 1 */
6, /* USART 2 */
0, /* Multimedia Card Interface */
4, /* USB Device Port */
0, /* Two-Wire Interface */
6, /* Serial Peripheral Interface 0 */
6, /* Serial Peripheral Interface 1 */
5, /* Serial Synchronous Controller */
0,
0,
0, /* Timer Counter 0 */
0, /* Timer Counter 1 */
0, /* Timer Counter 2 */
3, /* USB Host port */
3, /* Ethernet */
0, /* Image Sensor Interface */
6, /* USART 3 */
6, /* USART 4 */
6, /* USART 5 */
0, /* Timer Counter 3 */
0, /* Timer Counter 4 */
0, /* Timer Counter 5 */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
};
void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
{
if (!priority)
priority = at91sam9260_default_irq_priority;
/* Initialize the AIC interrupt controller */
at91_aic_init(priority);
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}

866
arch/arm/mach-at91rm9200/at91sam9260_devices.c 100644
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/*
* arch/arm/mach-at91rm9200/at91sam9260_devices.c
*
* Copyright (C) 2006 Atmel
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/platform_device.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91sam9260.h>
#include <asm/arch/at91sam926x_mc.h>
#include "generic.h"
#define SZ_512 0x00000200
#define SZ_256 0x00000100
#define SZ_16 0x00000010
/* --------------------------------------------------------------------
* USB Host
* -------------------------------------------------------------------- */
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static u64 ohci_dmamask = 0xffffffffUL;
static struct at91_usbh_data usbh_data;
static struct resource usbh_resources[] = {
[0] = {
.start = AT91SAM9260_UHP_BASE,
.end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_UHP,
.end = AT91SAM9260_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91_usbh_device = {
.name = "at91_ohci",
.id = -1,
.dev = {
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbh_data,
},
.resource = usbh_resources,
.num_resources = ARRAY_SIZE(usbh_resources),
};
void __init at91_add_device_usbh(struct at91_usbh_data *data)
{
if (!data)
return;
usbh_data = *data;
platform_device_register(&at91_usbh_device);
}
#else
void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
#endif
/* --------------------------------------------------------------------
* USB Device (Gadget)
* -------------------------------------------------------------------- */
#ifdef CONFIG_USB_GADGET_AT91
static struct at91_udc_data udc_data;
static struct resource udc_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_UDP,
.end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_UDP,
.end = AT91SAM9260_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91_udc_device = {
.name = "at91_udc",
.id = -1,
.dev = {
.platform_data = &udc_data,
},
.resource = udc_resources,
.num_resources = ARRAY_SIZE(udc_resources),
};
void __init at91_add_device_udc(struct at91_udc_data *data)
{
if (!data)
return;
if (data->vbus_pin) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
/* Pullup pin is handled internally by USB device peripheral */
udc_data = *data;
platform_device_register(&at91_udc_device);
}
#else
void __init at91_add_device_udc(struct at91_udc_data *data) {}
#endif
/* --------------------------------------------------------------------
* Ethernet
* -------------------------------------------------------------------- */
#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
static u64 eth_dmamask = 0xffffffffUL;
static struct eth_platform_data eth_data;
static struct resource eth_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_EMAC,
.end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_EMAC,
.end = AT91SAM9260_ID_EMAC,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9260_eth_device = {
.name = "macb",
.id = -1,
.dev = {
.dma_mask = &eth_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &eth_data,
},
.resource = eth_resources,
.num_resources = ARRAY_SIZE(eth_resources),
};
void __init at91_add_device_eth(struct eth_platform_data *data)
{
if (!data)
return;
if (data->phy_irq_pin) {
at91_set_gpio_input(data->phy_irq_pin, 0);
at91_set_deglitch(data->phy_irq_pin, 1);
}
/* Pins used for MII and RMII */
at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
if (!data->is_rmii) {
at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
}
eth_data = *data;
platform_device_register(&at91sam9260_eth_device);
}
#else
void __init at91_add_device_eth(struct eth_platform_data *data) {}
#endif
/* --------------------------------------------------------------------
* MMC / SD
* -------------------------------------------------------------------- */
#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
static u64 mmc_dmamask = 0xffffffffUL;
static struct at91_mmc_data mmc_data;
static struct resource mmc_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_MCI,
.end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_MCI,
.end = AT91SAM9260_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9260_mmc_device = {
.name = "at91_mci",
.id = -1,
.dev = {
.dma_mask = &mmc_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &mmc_data,
},
.resource = mmc_resources,
.num_resources = ARRAY_SIZE(mmc_resources),
};
void __init at91_add_device_mmc(struct at91_mmc_data *data)
{
if (!data)
return;
/* input/irq */
if (data->det_pin) {
at91_set_gpio_input(data->det_pin, 1);
at91_set_deglitch(data->det_pin, 1);
}
if (data->wp_pin)
at91_set_gpio_input(data->wp_pin, 1);
if (data->vcc_pin)
at91_set_gpio_output(data->vcc_pin, 0);
/* CLK */
at91_set_A_periph(AT91_PIN_PA8, 0);
if (data->slot_b) {
/* CMD */
at91_set_B_periph(AT91_PIN_PA1, 1);
/* DAT0, maybe DAT1..DAT3 */
at91_set_B_periph(AT91_PIN_PA0, 1);
if (data->wire4) {
at91_set_B_periph(AT91_PIN_PA5, 1);
at91_set_B_periph(AT91_PIN_PA4, 1);
at91_set_B_periph(AT91_PIN_PA3, 1);
}
} else {
/* CMD */
at91_set_A_periph(AT91_PIN_PA7, 1);
/* DAT0, maybe DAT1..DAT3 */
at91_set_A_periph(AT91_PIN_PA6, 1);
if (data->wire4) {
at91_set_A_periph(AT91_PIN_PA9, 1);
at91_set_A_periph(AT91_PIN_PA10, 1);
at91_set_A_periph(AT91_PIN_PA11, 1);
}
}
mmc_data = *data;
platform_device_register(&at91sam9260_mmc_device);
}
#else
void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
#endif
/* --------------------------------------------------------------------
* NAND / SmartMedia
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
#define NAND_BASE AT91_CHIPSELECT_3
static struct resource nand_resources[] = {
{
.start = NAND_BASE,
.end = NAND_BASE + SZ_8M - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device at91sam9260_nand_device = {
.name = "at91_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
},
.resource = nand_resources,
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
{
unsigned long csa, mode;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
/* set the bus interface characteristics */
at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
| AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
| AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
if (data->bus_width_16)
mode = AT91_SMC_DBW_16;
else
mode = AT91_SMC_DBW_8;
at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
/* enable pin */
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (data->rdy_pin)
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (data->det_pin)
at91_set_gpio_input(data->det_pin, 1);
nand_data = *data;
platform_device_register(&at91sam9260_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
#endif
/* --------------------------------------------------------------------
* TWI (i2c)
* -------------------------------------------------------------------- */
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
static struct resource twi_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_TWI,
.end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_TWI,
.end = AT91SAM9260_ID_TWI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9260_twi_device = {
.name = "at91_i2c",
.id = -1,
.resource = twi_resources,
.num_resources = ARRAY_SIZE(twi_resources),
};
void __init at91_add_device_i2c(void)
{
/* pins used for TWI interface */
at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
at91_set_multi_drive(AT91_PIN_PA23, 1);
at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
at91_set_multi_drive(AT91_PIN_PA24, 1);
platform_device_register(&at91sam9260_twi_device);
}
#else
void __init at91_add_device_i2c(void) {}
#endif
/* --------------------------------------------------------------------
* SPI
* -------------------------------------------------------------------- */
#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
static u64 spi_dmamask = 0xffffffffUL;
static struct resource spi0_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_SPI0,
.end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_SPI0,
.end = AT91SAM9260_ID_SPI0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9260_spi0_device = {
.name = "atmel_spi",
.id = 0,
.dev = {
.dma_mask = &spi_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.resource = spi0_resources,
.num_resources = ARRAY_SIZE(spi0_resources),
};
static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
static struct resource spi1_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_SPI1,
.end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_SPI1,
.end = AT91SAM9260_ID_SPI1,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9260_spi1_device = {
.name = "atmel_spi",
.id = 1,
.dev = {
.dma_mask = &spi_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.resource = spi1_resources,
.num_resources = ARRAY_SIZE(spi1_resources),
};
static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
{
int i;
unsigned long cs_pin;
short enable_spi0 = 0;
short enable_spi1 = 0;
/* Choose SPI chip-selects */
for (i = 0; i < nr_devices; i++) {
if (devices[i].controller_data)
cs_pin = (unsigned long) devices[i].controller_data;
else if (devices[i].bus_num == 0)
cs_pin = spi0_standard_cs[devices[i].chip_select];
else
cs_pin = spi1_standard_cs[devices[i].chip_select];
if (devices[i].bus_num == 0)
enable_spi0 = 1;
else
enable_spi1 = 1;
/* enable chip-select pin */
at91_set_gpio_output(cs_pin, 1);
/* pass chip-select pin to driver */
devices[i].controller_data = (void *) cs_pin;
}
spi_register_board_info(devices, nr_devices);
/* Configure SPI bus(es) */
if (enable_spi0) {
at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
platform_device_register(&at91sam9260_spi0_device);
}
if (enable_spi1) {
at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
platform_device_register(&at91sam9260_spi1_device);
}
}
#else
void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
#endif
/* --------------------------------------------------------------------
* LEDs
* -------------------------------------------------------------------- */
#if defined(CONFIG_LEDS)
u8 at91_leds_cpu;
u8 at91_leds_timer;
void __init at91_init_leds(u8 cpu_led, u8 timer_led)
{
at91_leds_cpu = cpu_led;
at91_leds_timer = timer_led;
}
#else
void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
#endif
/* --------------------------------------------------------------------
* UART
* -------------------------------------------------------------------- */
#if defined(CONFIG_SERIAL_ATMEL)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static struct platform_device at91sam9260_dbgu_device = {
.name = "atmel_usart",
.id = 0,
.dev = {
.platform_data = &dbgu_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = dbgu_resources,
.num_resources = ARRAY_SIZE(dbgu_resources),
};
static inline void configure_dbgu_pins(void)
{
at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
}
static struct resource uart0_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_US0,
.end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US0,
.end = AT91SAM9260_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9260_uart0_device = {
.name = "atmel_usart",
.id = 1,
.dev = {
.platform_data = &uart0_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart0_resources,
.num_resources = ARRAY_SIZE(uart0_resources),
};
static inline void configure_usart0_pins(void)
{
at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
}
static struct resource uart1_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_US1,
.end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US1,
.end = AT91SAM9260_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9260_uart1_device = {
.name = "atmel_usart",
.id = 2,
.dev = {
.platform_data = &uart1_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart1_resources,
.num_resources = ARRAY_SIZE(uart1_resources),
};
static inline void configure_usart1_pins(void)
{
at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
}
static struct resource uart2_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_US2,
.end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US2,
.end = AT91SAM9260_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9260_uart2_device = {
.name = "atmel_usart",
.id = 3,
.dev = {
.platform_data = &uart2_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart2_resources,
.num_resources = ARRAY_SIZE(uart2_resources),
};
static inline void configure_usart2_pins(void)
{
at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
}
static struct resource uart3_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_US3,
.end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US3,
.end = AT91SAM9260_ID_US3,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart3_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9260_uart3_device = {
.name = "atmel_usart",
.id = 4,
.dev = {
.platform_data = &uart3_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart3_resources,
.num_resources = ARRAY_SIZE(uart3_resources),
};
static inline void configure_usart3_pins(void)
{
at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
}
static struct resource uart4_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_US4,
.end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US4,
.end = AT91SAM9260_ID_US4,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart4_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9260_uart4_device = {
.name = "atmel_usart",
.id = 5,
.dev = {
.platform_data = &uart4_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart4_resources,
.num_resources = ARRAY_SIZE(uart4_resources),
};
static inline void configure_usart4_pins(void)
{
at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
}
static struct resource uart5_resources[] = {
[0] = {
.start = AT91SAM9260_BASE_US5,
.end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US5,
.end = AT91SAM9260_ID_US5,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart5_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9260_uart5_device = {
.name = "atmel_usart",
.id = 6,
.dev = {
.platform_data = &uart5_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart5_resources,
.num_resources = ARRAY_SIZE(uart5_resources),
};
static inline void configure_usart5_pins(void)
{
at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
}
struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
struct platform_device *atmel_default_console_device; /* the serial console device */
void __init at91_init_serial(struct at91_uart_config *config)
{
int i;
/* Fill in list of supported UARTs */
for (i = 0; i < config->nr_tty; i++) {
switch (config->tty_map[i]) {
case 0:
configure_usart0_pins();
at91_uarts[i] = &at91sam9260_uart0_device;
at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
break;
case 1:
configure_usart1_pins();
at91_uarts[i] = &at91sam9260_uart1_device;
at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
break;
case 2:
configure_usart2_pins();
at91_uarts[i] = &at91sam9260_uart2_device;
at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
break;
case 3:
configure_usart3_pins();
at91_uarts[i] = &at91sam9260_uart3_device;
at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
break;
case 4:
configure_usart4_pins();
at91_uarts[i] = &at91sam9260_uart4_device;
at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
break;
case 5:
configure_usart5_pins();
at91_uarts[i] = &at91sam9260_uart5_device;
at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
break;
case 6:
configure_dbgu_pins();
at91_uarts[i] = &at91sam9260_dbgu_device;
at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
break;
default:
continue;
}
at91_uarts[i]->id = i; /* update ID number to mapped ID */
}
/* Set serial console device */
if (config->console_tty < ATMEL_MAX_UART)
atmel_default_console_device = at91_uarts[config->console_tty];
if (!atmel_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
void __init at91_add_device_serial(void)
{
int i;
for (i = 0; i < ATMEL_MAX_UART; i++) {
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
}
#else
void __init at91_init_serial(struct at91_uart_config *config) {}
void __init at91_add_device_serial(void) {}
#endif
/* -------------------------------------------------------------------- */
/*
* These devices are always present and don't need any board-specific
* setup.
*/
static int __init at91_add_standard_devices(void)
{
return 0;
}
arch_initcall(at91_add_standard_devices);

289
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/*
* arch/arm/mach-at91rm9200/at91sam9261.c
*
* Copyright (C) 2005 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#include <linux/module.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/at91sam9261.h>
#include <asm/arch/at91_pmc.h>
#include "generic.h"
#include "clock.h"
static struct map_desc at91sam9261_io_desc[] __initdata = {
{
.virtual = AT91_VA_BASE_SYS,
.pfn = __phys_to_pfn(AT91_BASE_SYS),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
.pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
.length = AT91SAM9261_SRAM_SIZE,
.type = MT_DEVICE,
},
};
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
/*
* The peripheral clocks.
*/
static struct clk pioA_clk = {
.name = "pioA_clk",
.pmc_mask = 1 << AT91SAM9261_ID_PIOA,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk pioB_clk = {
.name = "pioB_clk",
.pmc_mask = 1 << AT91SAM9261_ID_PIOB,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk pioC_clk = {
.name = "pioC_clk",
.pmc_mask = 1 << AT91SAM9261_ID_PIOC,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart0_clk = {
.name = "usart0_clk",
.pmc_mask = 1 << AT91SAM9261_ID_US0,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart1_clk = {
.name = "usart1_clk",
.pmc_mask = 1 << AT91SAM9261_ID_US1,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk usart2_clk = {
.name = "usart2_clk",
.pmc_mask = 1 << AT91SAM9261_ID_US2,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk mmc_clk = {
.name = "mci_clk",
.pmc_mask = 1 << AT91SAM9261_ID_MCI,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk udc_clk = {
.name = "udc_clk",
.pmc_mask = 1 << AT91SAM9261_ID_UDP,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk twi_clk = {
.name = "twi_clk",
.pmc_mask = 1 << AT91SAM9261_ID_TWI,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk spi0_clk = {
.name = "spi0_clk",
.pmc_mask = 1 << AT91SAM9261_ID_SPI0,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk spi1_clk = {
.name = "spi1_clk",
.pmc_mask = 1 << AT91SAM9261_ID_SPI1,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk ohci_clk = {
.name = "ohci_clk",
.pmc_mask = 1 << AT91SAM9261_ID_UHP,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk lcdc_clk = {
.name = "lcdc_clk",
.pmc_mask = 1 << AT91SAM9261_ID_LCDC,
.type = CLK_TYPE_PERIPHERAL,
};
static struct clk *periph_clocks[] __initdata = {
&pioA_clk,
&pioB_clk,
&pioC_clk,
&usart0_clk,
&usart1_clk,
&usart2_clk,
&mmc_clk,
&udc_clk,
&twi_clk,
&spi0_clk,
&spi1_clk,
// ssc 0 .. ssc2
// tc0 .. tc2
&ohci_clk,
&lcdc_clk,
// irq0 .. irq2
};
/*
* The four programmable clocks.
* You must configure pin multiplexing to bring these signals out.
*/
static struct clk pck0 = {
.name = "pck0",
.pmc_mask = AT91_PMC_PCK0,
.type = CLK_TYPE_PROGRAMMABLE,
.id = 0,
};
static struct clk pck1 = {
.name = "pck1",
.pmc_mask = AT91_PMC_PCK1,
.type = CLK_TYPE_PROGRAMMABLE,
.id = 1,
};
static struct clk pck2 = {
.name = "pck2",
.pmc_mask = AT91_PMC_PCK2,
.type = CLK_TYPE_PROGRAMMABLE,
.id = 2,
};
static struct clk pck3 = {
.name = "pck3",
.pmc_mask = AT91_PMC_PCK3,
.type = CLK_TYPE_PROGRAMMABLE,
.id = 3,
};
/* HClocks */
static struct clk hck0 = {
.name = "hck0",
.pmc_mask = AT91_PMC_HCK0,
.type = CLK_TYPE_SYSTEM,
.id = 0,
};
static struct clk hck1 = {
.name = "hck1",
.pmc_mask = AT91_PMC_HCK1,
.type = CLK_TYPE_SYSTEM,
.id = 1,
};
static void __init at91sam9261_register_clocks(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);
clk_register(&pck3);
clk_register(&hck0);
clk_register(&hck1);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */
static struct at91_gpio_bank at91sam9261_gpio[] = {
{
.id = AT91SAM9261_ID_PIOA,
.offset = AT91_PIOA,
.clock = &pioA_clk,
}, {
.id = AT91SAM9261_ID_PIOB,
.offset = AT91_PIOB,
.clock = &pioB_clk,
}, {
.id = AT91SAM9261_ID_PIOC,
.offset = AT91_PIOC,
.clock = &pioC_clk,
}
};
static void at91sam9261_reset(void)
{
#warning "Implement CPU reset"
}
/* --------------------------------------------------------------------
* AT91SAM9261 processor initialization
* -------------------------------------------------------------------- */
void __init at91sam9261_initialize(unsigned long main_clock)
{
/* Map peripherals */
iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
at91_arch_reset = at91sam9261_reset;
at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2);
/* Init clock subsystem */
at91_clock_init(main_clock);
/* Register the processor-specific clocks */
at91sam9261_register_clocks();
/* Register GPIO subsystem */
at91_gpio_init(at91sam9261_gpio, 3);
}
/* --------------------------------------------------------------------
* Interrupt initialization
* -------------------------------------------------------------------- */
/*
* The default interrupt priority levels (0 = lowest, 7 = highest).
*/
static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
7, /* Advanced Interrupt Controller */
7, /* System Peripherals */
0, /* Parallel IO Controller A */
0, /* Parallel IO Controller B */
0, /* Parallel IO Controller C */
0,
6, /* USART 0 */
6, /* USART 1 */
6, /* USART 2 */
0, /* Multimedia Card Interface */
4, /* USB Device Port */
0, /* Two-Wire Interface */
6, /* Serial Peripheral Interface 0 */
6, /* Serial Peripheral Interface 1 */
5, /* Serial Synchronous Controller 0 */
5, /* Serial Synchronous Controller 1 */
5, /* Serial Synchronous Controller 2 */
0, /* Timer Counter 0 */
0, /* Timer Counter 1 */
0, /* Timer Counter 2 */
3, /* USB Host port */
3, /* LCD Controller */
0,
0,
0,
0,
0,
0,
0,
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
};
void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
{
if (!priority)
priority = at91sam9261_default_irq_priority;
/* Initialize the AIC interrupt controller */
at91_aic_init(priority);
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}

741
arch/arm/mach-at91rm9200/at91sam9261_devices.c 100644
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/*
* arch/arm/mach-at91rm9200/at91sam9261_devices.c
*
* Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
* Copyright (C) 2005 David Brownell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/platform_device.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91sam9261.h>
#include <asm/arch/at91sam9261_matrix.h>
#include <asm/arch/at91sam926x_mc.h>
#include "generic.h"
#define SZ_512 0x00000200
#define SZ_256 0x00000100
#define SZ_16 0x00000010
/* --------------------------------------------------------------------
* USB Host
* -------------------------------------------------------------------- */
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static u64 ohci_dmamask = 0xffffffffUL;
static struct at91_usbh_data usbh_data;
static struct resource usbh_resources[] = {
[0] = {
.start = AT91SAM9261_UHP_BASE,
.end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_UHP,
.end = AT91SAM9261_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9261_usbh_device = {
.name = "at91_ohci",
.id = -1,
.dev = {
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbh_data,
},
.resource = usbh_resources,
.num_resources = ARRAY_SIZE(usbh_resources),
};
void __init at91_add_device_usbh(struct at91_usbh_data *data)
{
if (!data)
return;
usbh_data = *data;
platform_device_register(&at91sam9261_usbh_device);
}
#else
void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
#endif
/* --------------------------------------------------------------------
* USB Device (Gadget)
* -------------------------------------------------------------------- */
#ifdef CONFIG_USB_GADGET_AT91
static struct at91_udc_data udc_data;
static struct resource udc_resources[] = {
[0] = {
.start = AT91SAM9261_BASE_UDP,
.end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_UDP,
.end = AT91SAM9261_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9261_udc_device = {
.name = "at91_udc",
.id = -1,
.dev = {
.platform_data = &udc_data,
},
.resource = udc_resources,
.num_resources = ARRAY_SIZE(udc_resources),
};
void __init at91_add_device_udc(struct at91_udc_data *data)
{
unsigned long x;
if (!data)
return;
if (data->vbus_pin) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
/* Pullup pin is handled internally */
x = at91_sys_read(AT91_MATRIX_USBPUCR);
at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
udc_data = *data;
platform_device_register(&at91sam9261_udc_device);
}
#else
void __init at91_add_device_udc(struct at91_udc_data *data) {}
#endif
/* --------------------------------------------------------------------
* MMC / SD
* -------------------------------------------------------------------- */
#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
static u64 mmc_dmamask = 0xffffffffUL;
static struct at91_mmc_data mmc_data;
static struct resource mmc_resources[] = {
[0] = {
.start = AT91SAM9261_BASE_MCI,
.end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_MCI,
.end = AT91SAM9261_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9261_mmc_device = {
.name = "at91_mci",
.id = -1,
.dev = {
.dma_mask = &mmc_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &mmc_data,
},
.resource = mmc_resources,
.num_resources = ARRAY_SIZE(mmc_resources),
};
void __init at91_add_device_mmc(struct at91_mmc_data *data)
{
if (!data)
return;
/* input/irq */
if (data->det_pin) {
at91_set_gpio_input(data->det_pin, 1);
at91_set_deglitch(data->det_pin, 1);
}
if (data->wp_pin)
at91_set_gpio_input(data->wp_pin, 1);
if (data->vcc_pin)
at91_set_gpio_output(data->vcc_pin, 0);
/* CLK */
at91_set_B_periph(AT91_PIN_PA2, 0);
/* CMD */
at91_set_B_periph(AT91_PIN_PA1, 1);
/* DAT0, maybe DAT1..DAT3 */
at91_set_B_periph(AT91_PIN_PA0, 1);
if (data->wire4) {
at91_set_B_periph(AT91_PIN_PA4, 1);
at91_set_B_periph(AT91_PIN_PA5, 1);
at91_set_B_periph(AT91_PIN_PA6, 1);
}
mmc_data = *data;
platform_device_register(&at91sam9261_mmc_device);
}
#else
void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
#endif
/* --------------------------------------------------------------------
* NAND / SmartMedia
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
#define NAND_BASE AT91_CHIPSELECT_3
static struct resource nand_resources[] = {
{
.start = NAND_BASE,
.end = NAND_BASE + SZ_256M - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device at91_nand_device = {
.name = "at91_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
},
.resource = nand_resources,
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
{
unsigned long csa, mode;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
/* set the bus interface characteristics */
at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
| AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
| AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
if (data->bus_width_16)
mode = AT91_SMC_DBW_16;
else
mode = AT91_SMC_DBW_8;
at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
/* enable pin */
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (data->rdy_pin)
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (data->det_pin)
at91_set_gpio_input(data->det_pin, 1);
at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
nand_data = *data;
platform_device_register(&at91_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
#endif
/* --------------------------------------------------------------------
* TWI (i2c)
* -------------------------------------------------------------------- */
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
static struct resource twi_resources[] = {
[0] = {
.start = AT91SAM9261_BASE_TWI,
.end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_TWI,
.end = AT91SAM9261_ID_TWI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9261_twi_device = {
.name = "at91_i2c",
.id = -1,
.resource = twi_resources,
.num_resources = ARRAY_SIZE(twi_resources),
};
void __init at91_add_device_i2c(void)
{
/* pins used for TWI interface */
at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
at91_set_multi_drive(AT91_PIN_PA7, 1);
at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
at91_set_multi_drive(AT91_PIN_PA8, 1);
platform_device_register(&at91sam9261_twi_device);
}
#else
void __init at91_add_device_i2c(void) {}
#endif
/* --------------------------------------------------------------------
* SPI
* -------------------------------------------------------------------- */
#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
static u64 spi_dmamask = 0xffffffffUL;
static struct resource spi0_resources[] = {
[0] = {
.start = AT91SAM9261_BASE_SPI0,
.end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_SPI0,
.end = AT91SAM9261_ID_SPI0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9261_spi0_device = {
.name = "atmel_spi",
.id = 0,
.dev = {
.dma_mask = &spi_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.resource = spi0_resources,
.num_resources = ARRAY_SIZE(spi0_resources),
};
static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
static struct resource spi1_resources[] = {
[0] = {
.start = AT91SAM9261_BASE_SPI1,
.end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_SPI1,
.end = AT91SAM9261_ID_SPI1,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9261_spi1_device = {
.name = "atmel_spi",
.id = 1,
.dev = {
.dma_mask = &spi_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.resource = spi1_resources,
.num_resources = ARRAY_SIZE(spi1_resources),
};
static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
{
int i;
unsigned long cs_pin;
short enable_spi0 = 0;
short enable_spi1 = 0;
/* Choose SPI chip-selects */
for (i = 0; i < nr_devices; i++) {
if (devices[i].controller_data)
cs_pin = (unsigned long) devices[i].controller_data;
else if (devices[i].bus_num == 0)
cs_pin = spi0_standard_cs[devices[i].chip_select];
else
cs_pin = spi1_standard_cs[devices[i].chip_select];
if (devices[i].bus_num == 0)
enable_spi0 = 1;
else
enable_spi1 = 1;
/* enable chip-select pin */
at91_set_gpio_output(cs_pin, 1);
/* pass chip-select pin to driver */
devices[i].controller_data = (void *) cs_pin;
}
spi_register_board_info(devices, nr_devices);
/* Configure SPI bus(es) */
if (enable_spi0) {
at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
platform_device_register(&at91sam9261_spi0_device);
}
if (enable_spi1) {
at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
platform_device_register(&at91sam9261_spi1_device);
}
}
#else
void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
#endif
/* --------------------------------------------------------------------
* LCD Controller
* -------------------------------------------------------------------- */
#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
static u64 lcdc_dmamask = 0xffffffffUL;
static struct at91fb_info lcdc_data;
static struct resource lcdc_resources[] = {
[0] = {
.start = AT91SAM9261_LCDC_BASE,
.end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_LCDC,
.end = AT91SAM9261_ID_LCDC,
.flags = IORESOURCE_IRQ,
},
#if defined(CONFIG_FB_INTSRAM)
[2] = {
.start = AT91SAM9261_SRAM_BASE,
.end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
.flags = IORESOURCE_MEM,
},
#endif
};
static struct platform_device at91_lcdc_device = {
.name = "at91-fb",
.id = 0,
.dev = {
.dma_mask = &lcdc_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &lcdc_data,
},
.resource = lcdc_resources,
.num_resources = ARRAY_SIZE(lcdc_resources),
};
void __init at91_add_device_lcdc(struct at91fb_info *data)
{
if (!data) {
return;
}
at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
lcdc_data = *data;
platform_device_register(&at91_lcdc_device);
}
#else
void __init at91_add_device_lcdc(struct at91fb_info *data) {}
#endif
/* --------------------------------------------------------------------
* LEDs
* -------------------------------------------------------------------- */
#if defined(CONFIG_LEDS)
u8 at91_leds_cpu;
u8 at91_leds_timer;
void __init at91_init_leds(u8 cpu_led, u8 timer_led)
{
at91_leds_cpu = cpu_led;
at91_leds_timer = timer_led;
}
#else
void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
#endif
/* --------------------------------------------------------------------
* UART
* -------------------------------------------------------------------- */
#if defined(CONFIG_SERIAL_ATMEL)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static struct platform_device at91sam9261_dbgu_device = {
.name = "atmel_usart",
.id = 0,
.dev = {
.platform_data = &dbgu_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = dbgu_resources,
.num_resources = ARRAY_SIZE(dbgu_resources),
};
static inline void configure_dbgu_pins(void)
{
at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
}
static struct resource uart0_resources[] = {
[0] = {
.start = AT91SAM9261_BASE_US0,
.end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_US0,
.end = AT91SAM9261_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9261_uart0_device = {
.name = "atmel_usart",
.id = 1,
.dev = {
.platform_data = &uart0_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart0_resources,
.num_resources = ARRAY_SIZE(uart0_resources),
};
static inline void configure_usart0_pins(void)
{
at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
}
static struct resource uart1_resources[] = {
[0] = {
.start = AT91SAM9261_BASE_US1,
.end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_US1,
.end = AT91SAM9261_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9261_uart1_device = {
.name = "atmel_usart",
.id = 2,
.dev = {
.platform_data = &uart1_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart1_resources,
.num_resources = ARRAY_SIZE(uart1_resources),
};
static inline void configure_usart1_pins(void)
{
at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
}
static struct resource uart2_resources[] = {
[0] = {
.start = AT91SAM9261_BASE_US2,
.end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_US2,
.end = AT91SAM9261_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
static struct atmel_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91sam9261_uart2_device = {
.name = "atmel_usart",
.id = 3,
.dev = {
.platform_data = &uart2_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart2_resources,
.num_resources = ARRAY_SIZE(uart2_resources),
};
static inline void configure_usart2_pins(void)
{
at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
}
struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
struct platform_device *atmel_default_console_device; /* the serial console device */
void __init at91_init_serial(struct at91_uart_config *config)
{
int i;
/* Fill in list of supported UARTs */
for (i = 0; i < config->nr_tty; i++) {
switch (config->tty_map[i]) {
case 0:
configure_usart0_pins();
at91_uarts[i] = &at91sam9261_uart0_device;
at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
break;
case 1:
configure_usart1_pins();
at91_uarts[i] = &at91sam9261_uart1_device;
at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
break;
case 2:
configure_usart2_pins();
at91_uarts[i] = &at91sam9261_uart2_device;
at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
break;
case 3:
configure_dbgu_pins();
at91_uarts[i] = &at91sam9261_dbgu_device;
at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
break;
default:
continue;
}
at91_uarts[i]->id = i; /* update ID number to mapped ID */
}
/* Set serial console device */
if (config->console_tty < ATMEL_MAX_UART)
atmel_default_console_device = at91_uarts[config->console_tty];
if (!atmel_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
void __init at91_add_device_serial(void)
{
int i;
for (i = 0; i < ATMEL_MAX_UART; i++) {
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
}
#else
void __init at91_init_serial(struct at91_uart_config *config) {}
void __init at91_add_device_serial(void) {}
#endif
/* -------------------------------------------------------------------- */
/*
* These devices are always present and don't need any board-specific
* setup.
*/
static int __init at91_add_standard_devices(void)
{
return 0;
}
arch_initcall(at91_add_standard_devices);

114
arch/arm/mach-at91rm9200/at91sam926x_time.c 100644
View File

@ -0,0 +1,114 @@
/*
* linux/arch/arm/mach-at91rm9200/at91sam926x_time.c
*
* Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
* Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/mach/time.h>
#include <asm/arch/at91_pit.h>
#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
/*
* Returns number of microseconds since last timer interrupt. Note that interrupts
* will have been disabled by do_gettimeofday()
* 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
* 'tick' is usecs per jiffy (linux/timex.h).
*/
static unsigned long at91sam926x_gettimeoffset(void)
{
unsigned long elapsed;
unsigned long t = at91_sys_read(AT91_PIT_PIIR);
elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */
return (unsigned long)(elapsed * 1000000) / LATCH;
}
/*
* IRQ handler for the timer.
*/
static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
{
volatile long nr_ticks;
if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { /* This is a shared interrupt */
write_seqlock(&xtime_lock);
/* Get number to ticks performed before interrupt and clear PIT interrupt */
nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
do {
timer_tick();
nr_ticks--;
} while (nr_ticks);
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
} else
return IRQ_NONE; /* not handled */
}
static struct irqaction at91sam926x_timer_irq = {
.name = "at91_tick",
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER,
.handler = at91sam926x_timer_interrupt
};
void at91sam926x_timer_reset(void)
{
/* Disable timer */
at91_sys_write(AT91_PIT_MR, 0);
/* Clear any pending interrupts */
(void) at91_sys_read(AT91_PIT_PIVR);
/* Set Period Interval timer and enable its interrupt */
at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);
}
/*
* Set up timer interrupt.
*/
void __init at91sam926x_timer_init(void)
{
/* Initialize and enable the timer */
at91sam926x_timer_reset();
/* Make IRQs happen for the system timer. */
setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);
}
#ifdef CONFIG_PM
static void at91sam926x_timer_suspend(void)
{
/* Disable timer */
at91_sys_write(AT91_PIT_MR, 0);
}
#else
#define at91sam926x_timer_suspend NULL
#endif
struct sys_timer at91sam926x_timer = {
.init = at91sam926x_timer_init,
.offset = at91sam926x_gettimeoffset,
.suspend = at91sam926x_timer_suspend,
.resume = at91sam926x_timer_reset,
};

32
arch/arm/mach-at91rm9200/board-carmeva.c
View File

@ -65,7 +65,6 @@ static void __init carmeva_init_irq(void)
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata carmeva_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
@ -89,8 +88,33 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
// };
static struct at91_mmc_data __initdata carmeva_mmc_data = {
.is_b = 0,
.slot_b = 0,
.wire4 = 1,
.det_pin = AT91_PIN_PB10,
.wp_pin = AT91_PIN_PC14,
};
static struct spi_board_info carmeva_spi_devices[] = {
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
.chip_select = 0,
.max_speed_hz = 10 * 1000 * 1000,
},
{ /* User accessable spi - cs1 (250KHz) */
.modalias = "spi-cs1",
.chip_select = 1,
.max_speed_hz = 250 * 1000,
},
{ /* User accessable spi - cs2 (1MHz) */
.modalias = "spi-cs2",
.chip_select = 2,
.max_speed_hz = 1 * 1000 * 1000,
},
{ /* User accessable spi - cs3 (10MHz) */
.modalias = "spi-cs3",
.chip_select = 3,
.max_speed_hz = 10 * 1000 * 1000,
},
};
static void __init carmeva_board_init(void)
@ -105,10 +129,10 @@ static void __init carmeva_board_init(void)
at91_add_device_udc(&carmeva_udc_data);
/* I2C */
at91_add_device_i2c();
/* SPI */
at91_add_device_spi(carmeva_spi_devices, ARRAY_SIZE(carmeva_spi_devices));
/* Compact Flash */
// at91_add_device_cf(&carmeva_cf_data);
/* SPI */
// at91_add_device_spi(NULL, 0);
/* MMC */
at91_add_device_mmc(&carmeva_mmc_data);
}

2
arch/arm/mach-at91rm9200/board-csb337.c
View File

@ -99,7 +99,7 @@ static struct at91_cf_data __initdata csb337_cf_data = {
static struct at91_mmc_data __initdata csb337_mmc_data = {
.det_pin = AT91_PIN_PD5,
.is_b = 0,
.slot_b = 0,
.wire4 = 1,
.wp_pin = AT91_PIN_PD6,
};

30
arch/arm/mach-at91rm9200/board-dk.c
View File

@ -27,6 +27,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/mtd/physmap.h>
#include <asm/hardware.h>
#include <asm/setup.h>
@ -39,6 +40,7 @@
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91rm9200_mc.h>
#include "generic.h"
@ -93,7 +95,7 @@ static struct at91_cf_data __initdata dk_cf_data = {
};
static struct at91_mmc_data __initdata dk_mmc_data = {
.is_b = 0,
.slot_b = 0,
.wire4 = 1,
};
@ -145,6 +147,30 @@ static struct at91_nand_data __initdata dk_nand_data = {
.partition_info = nand_partitions,
};
#define DK_FLASH_BASE AT91_CHIPSELECT_0
#define DK_FLASH_SIZE 0x200000
static struct physmap_flash_data dk_flash_data = {
.width = 2,
};
static struct resource dk_flash_resource = {
.start = DK_FLASH_BASE,
.end = DK_FLASH_BASE + DK_FLASH_SIZE - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device dk_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &dk_flash_data,
},
.resource = &dk_flash_resource,
.num_resources = 1,
};
static void __init dk_board_init(void)
{
/* Serial */
@ -172,6 +198,8 @@ static void __init dk_board_init(void)
#endif
/* NAND */
at91_add_device_nand(&dk_nand_data);
/* NOR Flash */
platform_device_register(&dk_flash);
/* VGA */
// dk_add_device_video();
}

2
arch/arm/mach-at91rm9200/board-eb9200.c
View File

@ -87,7 +87,7 @@ static struct at91_cf_data __initdata eb9200_cf_data = {
};
static struct at91_mmc_data __initdata eb9200_mmc_data = {
.is_b = 0,
.slot_b = 0,
.wire4 = 1,
};

30
arch/arm/mach-at91rm9200/board-ek.c
View File

@ -27,6 +27,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/mtd/physmap.h>
#include <asm/hardware.h>
#include <asm/setup.h>
@ -39,6 +40,7 @@
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91rm9200_mc.h>
#include "generic.h"
@ -87,7 +89,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
static struct at91_mmc_data __initdata ek_mmc_data = {
.det_pin = AT91_PIN_PB27,
.is_b = 0,
.slot_b = 0,
.wire4 = 1,
.wp_pin = AT91_PIN_PA17,
};
@ -107,6 +109,30 @@ static struct spi_board_info ek_spi_devices[] = {
#endif
};
#define EK_FLASH_BASE AT91_CHIPSELECT_0
#define EK_FLASH_SIZE 0x200000
static struct physmap_flash_data ek_flash_data = {
.width = 2,
};
static struct resource ek_flash_resource = {
.start = EK_FLASH_BASE,
.end = EK_FLASH_BASE + EK_FLASH_SIZE - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device ek_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &ek_flash_data,
},
.resource = &ek_flash_resource,
.num_resources = 1,
};
static void __init ek_board_init(void)
{
/* Serial */
@ -130,6 +156,8 @@ static void __init ek_board_init(void)
at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
at91_add_device_mmc(&ek_mmc_data);
#endif
/* NOR Flash */
platform_device_register(&ek_flash);
/* VGA */
// ek_add_device_video();
}

2
arch/arm/mach-at91rm9200/board-kb9202.c
View File

@ -84,7 +84,7 @@ static struct at91_udc_data __initdata kb9202_udc_data = {
static struct at91_mmc_data __initdata kb9202_mmc_data = {
.det_pin = AT91_PIN_PB2,
.is_b = 0,
.slot_b = 0,
.wire4 = 1,
};

201
arch/arm/mach-at91rm9200/board-sam9260ek.c 100644
View File

@ -0,0 +1,201 @@
/*
* linux/arch/arm/mach-at91rm9200/board-ek.c
*
* Copyright (C) 2005 SAN People
* Copyright (C) 2006 Atmel
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <asm/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91sam926x_mc.h>
#include "generic.h"
/*
* Serial port configuration.
* 0 .. 5 = USART0 .. USART5
* 6 = DBGU
*/
static struct at91_uart_config __initdata ek_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 3,
.tty_map = { 6, 0, 1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */
};
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91sam9260_initialize(18432000);
/* Setup the serial ports and console */
at91_init_serial(&ek_uart_config);
}
static void __init ek_init_irq(void)
{
at91sam9260_init_interrupts(NULL);
}
/*
* USB Host port
*/
static struct at91_usbh_data __initdata ek_usbh_data = {
.ports = 2,
};
/*
* USB Device port
*/
static struct at91_udc_data __initdata ek_udc_data = {
.vbus_pin = AT91_PIN_PC5,
.pullup_pin = 0, /* pull-up driven by UDC */
};
/*
* SPI devices.
*/
static struct spi_board_info ek_spi_devices[] = {
#if !defined(CONFIG_MMC_AT91)
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
.chip_select = 1,
.max_speed_hz = 15 * 1000 * 1000,
.bus_num = 0,
},
#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
{ /* DataFlash card */
.modalias = "mtd_dataflash",
.chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000,
.bus_num = 0,
},
#endif
#endif
#if defined(CONFIG_SND_AT73C213)
{ /* AT73C213 DAC */
.modalias = "snd_at73c213",
.chip_select = 0,
.max_speed_hz = 10 * 1000 * 1000,
.bus_num = 1,
},
#endif
};
/*
* MACB Ethernet device
*/
static struct __initdata eth_platform_data ek_macb_data = {
.is_rmii = 1,
};
/*
* NAND flash
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
.name = "Partition 1",
.offset = 0,
.size = 256 * 1024,
},
{
.name = "Partition 2",
.offset = 256 * 1024,
.size = MTDPART_SIZ_FULL,
},
};
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
{
*num_partitions = ARRAY_SIZE(ek_nand_partition);
return ek_nand_partition;
}
static struct at91_nand_data __initdata ek_nand_data = {
.ale = 21,
.cle = 22,
// .det_pin = ... not connected
.rdy_pin = AT91_PIN_PC13,
.enable_pin = AT91_PIN_PC14,
.partition_info = nand_partitions,
#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
.bus_width_16 = 1,
#else
.bus_width_16 = 0,
#endif
};
/*
* MCI (SD/MMC)
*/
static struct at91_mmc_data __initdata ek_mmc_data = {
.slot_b = 1,
.wire4 = 1,
// .det_pin = ... not connected
// .wp_pin = ... not connected
// .vcc_pin = ... not connected
};
static void __init ek_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
at91_add_device_udc(&ek_udc_data);
/* SPI */
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
/* NAND */
at91_add_device_nand(&ek_nand_data);
/* Ethernet */
at91_add_device_eth(&ek_macb_data);
/* MMC */
at91_add_device_mmc(&ek_mmc_data);
}
MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
/* Maintainer: Atmel */
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
.timer = &at91sam926x_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
MACHINE_END

259
arch/arm/mach-at91rm9200/board-sam9261ek.c 100644
View File

@ -0,0 +1,259 @@
/*
* linux/arch/arm/mach-at91rm9200/board-ek.c
*
* Copyright (C) 2005 SAN People
* Copyright (C) 2006 Atmel
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/dm9000.h>
#include <asm/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91sam926x_mc.h>
#include "generic.h"
/*
* Serial port configuration.
* 0 .. 2 = USART0 .. USART2
* 3 = DBGU
*/
static struct at91_uart_config __initdata ek_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 1,
.tty_map = { 3, -1, -1, -1 } /* ttyS0, ..., ttyS3 */
};
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91sam9261_initialize(18432000);
/* Setup the serial ports and console */
at91_init_serial(&ek_uart_config);
}
static void __init ek_init_irq(void)
{
at91sam9261_init_interrupts(NULL);
}
/*
* DM9000 ethernet device
*/
#if defined(CONFIG_DM9000)
static struct resource at91sam9261_dm9000_resource[] = {
[0] = {
.start = AT91_CHIPSELECT_2,
.end = AT91_CHIPSELECT_2 + 3,
.flags = IORESOURCE_MEM
},
[1] = {
.start = AT91_CHIPSELECT_2 + 0x44,
.end = AT91_CHIPSELECT_2 + 0xFF,
.flags = IORESOURCE_MEM
},
[2] = {
.start = AT91_PIN_PC11,
.end = AT91_PIN_PC11,
.flags = IORESOURCE_IRQ
}
};
static struct dm9000_plat_data dm9000_platdata = {
.flags = DM9000_PLATF_16BITONLY,
};
static struct platform_device at91sam9261_dm9000_device = {
.name = "dm9000",
.id = 0,
.num_resources = ARRAY_SIZE(at91sam9261_dm9000_resource),
.resource = at91sam9261_dm9000_resource,
.dev = {
.platform_data = &dm9000_platdata,
}
};
static void __init ek_add_device_dm9000(void)
{
/*
* Configure Chip-Select 2 on SMC for the DM9000.
* Note: These timings were calculated for MASTER_CLOCK = 100000000
* according to the DM9000 timings.
*/
at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
/* Configure Reset signal as output */
at91_set_gpio_output(AT91_PIN_PC10, 0);
/* Configure Interrupt pin as input, no pull-up */
at91_set_gpio_input(AT91_PIN_PC11, 0);
platform_device_register(&at91sam9261_dm9000_device);
}
#else
static void __init ek_add_device_dm9000(void) {}
#endif /* CONFIG_DM9000 */
/*
* USB Host Port
*/
static struct at91_usbh_data __initdata ek_usbh_data = {
.ports = 2,
};
/*
* USB Device Port
*/
static struct at91_udc_data __initdata ek_udc_data = {
.vbus_pin = AT91_PIN_PB29,
.pullup_pin = 0, /* pull-up driven by UDC */
};
/*
* MCI (SD/MMC)
*/
static struct at91_mmc_data __initdata ek_mmc_data = {
.wire4 = 1,
// .det_pin = ... not connected
// .wp_pin = ... not connected
// .vcc_pin = ... not connected
};
/*
* NAND flash
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
.name = "Partition 1",
.offset = 0,
.size = 256 * 1024,
},
{
.name = "Partition 2",
.offset = 256 * 1024 ,
.size = MTDPART_SIZ_FULL,
},
};
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
{
*num_partitions = ARRAY_SIZE(ek_nand_partition);
return ek_nand_partition;
}
static struct at91_nand_data __initdata ek_nand_data = {
.ale = 22,
.cle = 21,
// .det_pin = ... not connected
.rdy_pin = AT91_PIN_PC15,
.enable_pin = AT91_PIN_PC14,
.partition_info = nand_partitions,
#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
.bus_width_16 = 1,
#else
.bus_width_16 = 0,
#endif
};
/*
* SPI devices
*/
static struct spi_board_info ek_spi_devices[] = {
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
.chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000,
.bus_num = 0,
},
#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
{ /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
.modalias = "mtd_dataflash",
.chip_select = 3,
.max_speed_hz = 15 * 1000 * 1000,
.bus_num = 0,
},
#elif defined(CONFIG_SND_AT73C213)
{ /* AT73C213 DAC */
.modalias = "snd_at73c213",
.chip_select = 3,
.max_speed_hz = 10 * 1000 * 1000,
.bus_num = 0,
},
#endif
};
static void __init ek_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
at91_add_device_udc(&ek_udc_data);
/* I2C */
at91_add_device_i2c();
/* NAND */
at91_add_device_nand(&ek_nand_data);
/* DM9000 ethernet */
ek_add_device_dm9000();
/* spi0 and mmc/sd share the same PIO pins */
#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
/* SPI */
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
#else
/* MMC */
at91_add_device_mmc(&ek_mmc_data);
#endif
}
MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
/* Maintainer: Atmel */
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
.timer = &at91sam926x_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
MACHINE_END

27
arch/arm/mach-at91rm9200/clock.c
View File

@ -28,6 +28,8 @@
#include <asm/mach-types.h>
#include <asm/hardware.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/cpu.h>
#include "clock.h"
@ -41,6 +43,7 @@
#define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY)
#define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE)
#define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL)
#define clk_is_sys(x) ((x)->type & CLK_TYPE_SYSTEM)
static LIST_HEAD(clocks);
@ -114,13 +117,11 @@ static void pmc_sys_mode(struct clk *clk, int is_on)
static struct clk udpck = {
.name = "udpck",
.parent = &pllb,
.pmc_mask = AT91_PMC_UDP,
.mode = pmc_sys_mode,
};
static struct clk uhpck = {
.name = "uhpck",
.parent = &pllb,
.pmc_mask = AT91_PMC_UHP,
.mode = pmc_sys_mode,
};
@ -434,6 +435,12 @@ int __init clk_register(struct clk *clk)
clk->mode = pmc_periph_mode;
list_add_tail(&clk->node, &clocks);
}
else if (clk_is_sys(clk)) {
clk->parent = &mck;
clk->mode = pmc_sys_mode;
list_add_tail(&clk->node, &clocks);
}
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
else if (clk_is_programmable(clk)) {
clk->mode = pmc_sys_mode;
@ -586,9 +593,21 @@ int __init at91_clock_init(unsigned long main_clock)
*/
at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP);
if (cpu_is_at91rm9200()) {
uhpck.pmc_mask = AT91RM9200_PMC_UHP;
udpck.pmc_mask = AT91RM9200_PMC_UDP;
at91_sys_write(AT91_PMC_SCDR, AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP);
at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
} else if (cpu_is_at91sam9260()) {
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP);
} else if (cpu_is_at91sam9261()) {
uhpck.pmc_mask = (AT91SAM926x_PMC_UHP | AT91_PMC_HCK0);
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91_PMC_HCK0 | AT91SAM926x_PMC_UDP);
}
at91_sys_write(AT91_CKGR_PLLBR, 0);
at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP);
udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);

1
arch/arm/mach-at91rm9200/clock.h
View File

@ -10,6 +10,7 @@
#define CLK_TYPE_PLL 0x2
#define CLK_TYPE_PROGRAMMABLE 0x4
#define CLK_TYPE_PERIPHERAL 0x8
#define CLK_TYPE_SYSTEM 0x10
struct clk {

8
arch/arm/mach-at91rm9200/generic.h
View File

@ -10,14 +10,19 @@
/* Processors */
extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
extern void __init at91sam9260_initialize(unsigned long main_clock);
extern void __init at91sam9261_initialize(unsigned long main_clock);
/* Interrupts */
extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
extern void __init at91_aic_init(unsigned int priority[]);
/* Timer */
struct sys_timer;
extern struct sys_timer at91rm9200_timer;
extern struct sys_timer at91sam926x_timer;
/* Clocks */
extern int __init at91_clock_init(unsigned long main_clock);
@ -39,3 +44,6 @@ struct at91_gpio_bank {
};
extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
extern void __init at91_gpio_irq_setup(void);
extern void (*at91_arch_reset)(void);
extern int at91_extern_irq;

10
arch/arm/mach-at91rm9200/gpio.c
View File

@ -19,6 +19,8 @@
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include "generic.h"
@ -332,10 +334,10 @@ static struct irq_chip gpio_irqchip = {
.set_wake = gpio_irq_set_wake,
};
static void gpio_irq_handler(unsigned irq, struct irqdesc *desc)
static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
{
unsigned pin;
struct irqdesc *gpio;
struct irq_desc *gpio;
void __iomem *pio;
u32 isr;
@ -396,7 +398,7 @@ void __init at91_gpio_irq_setup(void)
__raw_writel(~0, controller + PIO_IDR);
set_irq_data(id, (void *) pin);
set_irq_chipdata(id, controller);
set_irq_chip_data(id, controller);
for (i = 0; i < 32; i++, pin++) {
/*
@ -404,7 +406,7 @@ void __init at91_gpio_irq_setup(void)
* shorter, and the AIC handles interupts sanely.
*/
set_irq_chip(pin, &gpio_irqchip);
set_irq_handler(pin, do_simple_IRQ);
set_irq_handler(pin, handle_simple_irq);
set_irq_flags(pin, IRQF_VALID);
}

16
arch/arm/mach-at91rm9200/irq.c
View File

@ -47,6 +47,10 @@ static void at91_aic_unmask_irq(unsigned int irq)
at91_sys_write(AT91_AIC_IECR, 1 << irq);
}
unsigned int at91_extern_irq;
#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
static int at91_aic_set_type(unsigned irq, unsigned type)
{
unsigned int smr, srctype;
@ -59,14 +63,16 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
srctype = AT91_AIC_SRCTYPE_RISING;
break;
case IRQT_LOW:
if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
srctype = AT91_AIC_SRCTYPE_LOW;
else
return -EINVAL;
srctype = AT91_AIC_SRCTYPE_LOW;
break;
case IRQT_FALLING:
if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
srctype = AT91_AIC_SRCTYPE_FALLING;
else
return -EINVAL;
srctype = AT91_AIC_SRCTYPE_FALLING;
break;
default:
return -EINVAL;
@ -139,7 +145,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
set_irq_chip(i, &at91_aic_chip);
set_irq_handler(i, do_level_IRQ);
set_irq_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
/* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */

24
arch/arm/mach-at91rm9200/pm.c
View File

@ -26,7 +26,10 @@
#include <asm/mach/irq.h>
#include <asm/mach-types.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91rm9200_mc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/cpu.h>
#include "generic.h"
@ -68,9 +71,15 @@ static int at91_pm_verify_clocks(void)
scsr = at91_sys_read(AT91_PMC_SCSR);
/* USB must not be using PLLB */
if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) {
pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
return 0;
if (cpu_is_at91rm9200()) {
if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
return 0;
}
} else if (cpu_is_at91sam9260()) {
#warning "Check SAM9260 USB clocks"
} else if (cpu_is_at91sam9261()) {
#warning "Check SAM9261 USB clocks"
}
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
@ -112,7 +121,6 @@ EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
static void (*slow_clock)(void);
static int at91_pm_enter(suspend_state_t state)
{
at91_gpio_suspend();
@ -123,13 +131,7 @@ static int at91_pm_enter(suspend_state_t state)
(at91_sys_read(AT91_PMC_PCSR)
| (1 << AT91_ID_FIQ)
| (1 << AT91_ID_SYS)
| (1 << AT91RM9200_ID_IRQ0)
| (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2)
| (1 << AT91RM9200_ID_IRQ3)
| (1 << AT91RM9200_ID_IRQ4)
| (1 << AT91RM9200_ID_IRQ5)
| (1 << AT91RM9200_ID_IRQ6))
| (at91_extern_irq))
& at91_sys_read(AT91_AIC_IMR),
state);

8
arch/arm/mach-clps711x/irq.c
View File

@ -63,7 +63,7 @@ static void int1_unmask(unsigned int irq)
clps_writel(intmr1, INTMR1);
}
static struct irqchip int1_chip = {
static struct irq_chip int1_chip = {
.ack = int1_ack,
.mask = int1_mask,
.unmask = int1_unmask,
@ -100,7 +100,7 @@ static void int2_unmask(unsigned int irq)
clps_writel(intmr2, INTMR2);
}
static struct irqchip int2_chip = {
static struct irq_chip int2_chip = {
.ack = int2_ack,
.mask = int2_mask,
.unmask = int2_unmask,
@ -112,12 +112,12 @@ void __init clps711x_init_irq(void)
for (i = 0; i < NR_IRQS; i++) {
if (INT1_IRQS & (1 << i)) {
set_irq_handler(i, do_level_IRQ);
set_irq_handler(i, handle_level_irq);
set_irq_chip(i, &int1_chip);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}
if (INT2_IRQS & (1 << i)) {
set_irq_handler(i, do_level_IRQ);
set_irq_handler(i, handle_level_irq);
set_irq_chip(i, &int2_chip);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}

28
arch/arm/mach-clps7500/core.c
View File

@ -57,7 +57,7 @@ static void cl7500_unmask_irq_a(unsigned int irq)
iomd_writeb(val | mask, IOMD_IRQMASKA);
}
static struct irqchip clps7500_a_chip = {
static struct irq_chip clps7500_a_chip = {
.ack = cl7500_ack_irq_a,
.mask = cl7500_mask_irq_a,
.unmask = cl7500_unmask_irq_a,
@ -81,7 +81,7 @@ static void cl7500_unmask_irq_b(unsigned int irq)
iomd_writeb(val | mask, IOMD_IRQMASKB);
}
static struct irqchip clps7500_b_chip = {
static struct irq_chip clps7500_b_chip = {
.ack = cl7500_mask_irq_b,
.mask = cl7500_mask_irq_b,
.unmask = cl7500_unmask_irq_b,
@ -105,7 +105,7 @@ static void cl7500_unmask_irq_c(unsigned int irq)
iomd_writeb(val | mask, IOMD_IRQMASKC);
}
static struct irqchip clps7500_c_chip = {
static struct irq_chip clps7500_c_chip = {
.ack = cl7500_mask_irq_c,
.mask = cl7500_mask_irq_c,
.unmask = cl7500_unmask_irq_c,
@ -129,7 +129,7 @@ static void cl7500_unmask_irq_d(unsigned int irq)
iomd_writeb(val | mask, IOMD_IRQMASKD);
}
static struct irqchip clps7500_d_chip = {
static struct irq_chip clps7500_d_chip = {
.ack = cl7500_mask_irq_d,
.mask = cl7500_mask_irq_d,
.unmask = cl7500_unmask_irq_d,
@ -153,7 +153,7 @@ static void cl7500_unmask_irq_dma(unsigned int irq)
iomd_writeb(val | mask, IOMD_DMAMASK);
}
static struct irqchip clps7500_dma_chip = {
static struct irq_chip clps7500_dma_chip = {
.ack = cl7500_mask_irq_dma,
.mask = cl7500_mask_irq_dma,
.unmask = cl7500_unmask_irq_dma,
@ -177,7 +177,7 @@ static void cl7500_unmask_irq_fiq(unsigned int irq)
iomd_writeb(val | mask, IOMD_FIQMASK);
}
static struct irqchip clps7500_fiq_chip = {
static struct irq_chip clps7500_fiq_chip = {
.ack = cl7500_mask_irq_fiq,
.mask = cl7500_mask_irq_fiq,
.unmask = cl7500_unmask_irq_fiq,
@ -187,7 +187,7 @@ static void cl7500_no_action(unsigned int irq)
{
}
static struct irqchip clps7500_no_chip = {
static struct irq_chip clps7500_no_chip = {
.ack = cl7500_no_action,
.mask = cl7500_no_action,
.unmask = cl7500_no_action,
@ -214,43 +214,43 @@ static void __init clps7500_init_irq(void)
switch (irq) {
case 0 ... 7:
set_irq_chip(irq, &clps7500_a_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 8 ... 15:
set_irq_chip(irq, &clps7500_b_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 16 ... 22:
set_irq_chip(irq, &clps7500_dma_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 24 ... 31:
set_irq_chip(irq, &clps7500_c_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 40 ... 47:
set_irq_chip(irq, &clps7500_d_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 48 ... 55:
set_irq_chip(irq, &clps7500_no_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 64 ... 72:
set_irq_chip(irq, &clps7500_fiq_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
}

4
arch/arm/mach-ebsa110/core.c
View File

@ -45,7 +45,7 @@ static void ebsa110_unmask_irq(unsigned int irq)
__raw_writeb(1 << irq, IRQ_MSET);
}
static struct irqchip ebsa110_irq_chip = {
static struct irq_chip ebsa110_irq_chip = {
.ack = ebsa110_mask_irq,
.mask = ebsa110_mask_irq,
.unmask = ebsa110_unmask_irq,
@ -67,7 +67,7 @@ static void __init ebsa110_init_irq(void)
for (irq = 0; irq < NR_IRQS; irq++) {
set_irq_chip(irq, &ebsa110_irq_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}

12
arch/arm/mach-ep93xx/Kconfig
View File

@ -9,12 +9,24 @@ config CRUNCH
comment "EP93xx Platforms"
config MACH_ADSSPHERE
bool "Support ADS Sphere"
help
Say 'Y' here if you want your kernel to support the ADS
Sphere board.
config MACH_EDB9302
bool "Support Cirrus Logic EDB9302"
help
Say 'Y' here if you want your kernel to support the Cirrus
Logic EDB9302 Evaluation Board.
config MACH_EDB9302A
bool "Support Cirrus Logic EDB9302A"
help
Say 'Y' here if you want your kernel to support the Cirrus
Logic EDB9302A Evaluation Board.
config MACH_EDB9312
bool "Support Cirrus Logic EDB9312"
help

2
arch/arm/mach-ep93xx/Makefile
View File

@ -6,7 +6,9 @@ obj-m :=
obj-n :=
obj- :=
obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o
obj-$(CONFIG_MACH_EDB9302) += edb9302.o
obj-$(CONFIG_MACH_EDB9302A) += edb9302a.o
obj-$(CONFIG_MACH_EDB9312) += edb9312.o
obj-$(CONFIG_MACH_EDB9315) += edb9315.o
obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o

91
arch/arm/mach-ep93xx/adssphere.c 100644
View File

@ -0,0 +1,91 @@
/*
* arch/arm/mach-ep93xx/adssphere.c
* ADS Sphere support.
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static struct physmap_flash_data adssphere_flash_data = {
.width = 4,
};
static struct resource adssphere_flash_resource = {
.start = 0x60000000,
.end = 0x61ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device adssphere_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &adssphere_flash_data,
},
.num_resources = 1,
.resource = &adssphere_flash_resource,
};
static struct ep93xx_eth_data adssphere_eth_data = {
.phy_id = 1,
};
static struct resource adssphere_eth_resource[] = {
{
.start = EP93XX_ETHERNET_PHYS_BASE,
.end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_EP93XX_ETHERNET,
.end = IRQ_EP93XX_ETHERNET,
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device adssphere_eth_device = {
.name = "ep93xx-eth",
.id = -1,
.dev = {
.platform_data = &adssphere_eth_data,
},
.num_resources = 2,
.resource = adssphere_eth_resource,
};
static void __init adssphere_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&adssphere_flash);
memcpy(adssphere_eth_data.dev_addr,
(void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
platform_device_register(&adssphere_eth_device);
}
MACHINE_START(ADSSPHERE, "ADS Sphere board")
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
.phys_io = EP93XX_APB_PHYS_BASE,
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
.timer = &ep93xx_timer,
.init_machine = adssphere_init_machine,
MACHINE_END

6
arch/arm/mach-ep93xx/core.c
View File

@ -245,7 +245,7 @@ EXPORT_SYMBOL(gpio_line_set);
* EP93xx IRQ handling
*************************************************************************/
static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
struct irqdesc *desc)
struct irq_desc *desc)
{
unsigned char status;
int i;
@ -335,7 +335,7 @@ static int ep93xx_gpio_ab_irq_type(unsigned int irq, unsigned int type)
return 0;
}
static struct irqchip ep93xx_gpio_ab_irq_chip = {
static struct irq_chip ep93xx_gpio_ab_irq_chip = {
.ack = ep93xx_gpio_ab_irq_mask_ack,
.mask = ep93xx_gpio_ab_irq_mask,
.unmask = ep93xx_gpio_ab_irq_unmask,
@ -352,7 +352,7 @@ void __init ep93xx_init_irq(void)
for (irq = IRQ_EP93XX_GPIO(0) ; irq <= IRQ_EP93XX_GPIO(15); irq++) {
set_irq_chip(irq, &ep93xx_gpio_ab_irq_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler);

91
arch/arm/mach-ep93xx/edb9302a.c 100644
View File

@ -0,0 +1,91 @@
/*
* arch/arm/mach-ep93xx/edb9302a.c
* Cirrus Logic EDB9302A support.
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static struct physmap_flash_data edb9302a_flash_data = {
.width = 2,
};
static struct resource edb9302a_flash_resource = {
.start = 0x60000000,
.end = 0x60ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device edb9302a_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &edb9302a_flash_data,
},
.num_resources = 1,
.resource = &edb9302a_flash_resource,
};
static struct ep93xx_eth_data edb9302a_eth_data = {
.phy_id = 1,
};
static struct resource edb9302a_eth_resource[] = {
{
.start = EP93XX_ETHERNET_PHYS_BASE,
.end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_EP93XX_ETHERNET,
.end = IRQ_EP93XX_ETHERNET,
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device edb9302a_eth_device = {
.name = "ep93xx-eth",
.id = -1,
.dev = {
.platform_data = &edb9302a_eth_data,
},
.num_resources = 2,
.resource = edb9302a_eth_resource,
};
static void __init edb9302a_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9302a_flash);
memcpy(edb9302a_eth_data.dev_addr,
(void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
platform_device_register(&edb9302a_eth_device);
}
MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
.phys_io = EP93XX_APB_PHYS_BASE,
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
.timer = &ep93xx_timer,
.init_machine = edb9302a_init_machine,
MACHINE_END

4
arch/arm/mach-footbridge/common.c
View File

@ -78,7 +78,7 @@ static void fb_unmask_irq(unsigned int irq)
*CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
}
static struct irqchip fb_chip = {
static struct irq_chip fb_chip = {
.ack = fb_mask_irq,
.mask = fb_mask_irq,
.unmask = fb_unmask_irq,
@ -96,7 +96,7 @@ static void __init __fb_init_irq(void)
for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
set_irq_chip(irq, &fb_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}

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