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ARM: dts: zynq: Add Parallella device tree 

This allows to boot the Adapteva Parallella board to serial console.

Cc: Andreas Olofsson <andreas@adapteva.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
hifive-unleashed-5.1
Andreas Färber 2014-07-25 01:00:12 +02:00 committed by Michal Simek
parent 5bc20d7940
commit 6726e3edf8
2 changed files with 67 additions and 1 deletions
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4
arch/arm/boot/dts/Makefile
View File

@ -419,7 +419,9 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
wm8650-mid.dtb \
wm8750-apc8750.dtb \
wm8850-w70v2.dtb
dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-parallella.dtb \
zynq-zc702.dtb \
zynq-zc706.dtb \
zynq-zed.dtb
dtb-$(CONFIG_MACH_ARMADA_370) += \

64
arch/arm/boot/dts/zynq-parallella.dts 100644
View File

@ -0,0 +1,64 @@
/*
* Copyright (c) 2014 SUSE LINUX Products GmbH
*
* Derived from zynq-zed.dts:
*
* Copyright (C) 2011 Xilinx
* Copyright (C) 2012 National Instruments Corp.
* Copyright (C) 2013 Xilinx
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "zynq-7000.dtsi"
/ {
model = "Adapteva Parallella Board";
compatible = "adapteva,parallella", "xlnx,zynq-7000";
memory {
device_type = "memory";
reg = <0 0x40000000>;
};
chosen {
bootargs = "console=ttyPS0,115200 earlyprintk root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";
linux,stdout-path = "/amba/serial@e0001000";
};
};
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>;
#address-cells = <1>;
#size-cells = <0>;
ethernet_phy: ethernet-phy@0 {
/* Marvell 88E1318 */
compatible = "ethernet-phy-id0141.0e90",
"ethernet-phy-ieee802.3-c22";
reg = <0>;
marvell,reg-init = <0x3 0x10 0xff00 0x1e>,
<0x3 0x11 0xfff0 0xa>;
};
};
&i2c0 {
status = "okay";
};
&sdhci1 {
status = "okay";
};
&uart1 {
status = "okay";
};