i.MX fixes for 5.12:
- Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by independent PHY reset. - Add missing `dma-coherent` property for LayerScape device trees to fix a kernel BUG report. - Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25 with fw_devlink=on. - Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board to fix the broken I2C GPIO recovery support. - Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval device tree to fix UBI filesystem mount failure. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmBTFQ0UHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM65oAgAqbLEBsKnoqYugcTaqa35XyC4JJn9 3Un19VTPMpGzb2A4S8spjBKcqQ12lH2usMwSsDCOXdUMQk5JkyR/qeEDbUrQ/IW7 jZczTPeZv2L67AJc6A7ifJfgpNlM+SU1D1bWqU9xsIDyh0k6NtYX2OXN+LlR5s+E JR5nwH8idxYoUH1V/LlF2A0MO8TEXDxi34biDzEkSTZOI/Ovv6c4IcdddQvHWDnH 5fBGPzL/Vjk4PgsPdpt4pe38yP9bBZrpOAgAvp2zynr8jJoZMdiDegliUgmK4BvY /LbitI1y792hs+R6WsOP6//DX1cKY5r7hrWWRoLGqa6e3yhJ/geIiPyxdQ== =ElXH -----END PGP SIGNATURE----- Merge tag 'imx-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.12: - Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by independent PHY reset. - Add missing `dma-coherent` property for LayerScape device trees to fix a kernel BUG report. - Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25 with fw_devlink=on. - Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board to fix the broken I2C GPIO recovery support. - Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval device tree to fix UBI filesystem mount failure. * tag 'imx-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6ull: fix ubi filesystem mount failed ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independently arm64: dts: imx8mp-phyboard-pollux-rdk: Add missing pinctrl entry arm64: dts: ls1012a: mark crypto engine dma coherent arm64: dts: ls1043a: mark crypto engine dma coherent arm64: dts: ls1046a: mark crypto engine dma coherent ARM: imx: avic: Convert to using IRQCHIP_DECLARE Link: https://lore.kernel.org/r/20210318090145.GA22955@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>rM2-mainline
commit
67335b8d28
|
@ -210,9 +210,6 @@
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||||||
micrel,led-mode = <1>;
|
micrel,led-mode = <1>;
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||||||
clocks = <&clks IMX6UL_CLK_ENET_REF>;
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clocks = <&clks IMX6UL_CLK_ENET_REF>;
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||||||
clock-names = "rmii-ref";
|
clock-names = "rmii-ref";
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||||||
reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>;
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||||||
reset-assert-us = <10000>;
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||||||
reset-deassert-us = <100>;
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||||||
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||||||
};
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};
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||||||
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||||||
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@ -222,9 +219,6 @@
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||||||
micrel,led-mode = <1>;
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micrel,led-mode = <1>;
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||||||
clocks = <&clks IMX6UL_CLK_ENET2_REF>;
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clocks = <&clks IMX6UL_CLK_ENET2_REF>;
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||||||
clock-names = "rmii-ref";
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clock-names = "rmii-ref";
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reset-gpios = <&gpio_spi 2 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <100>;
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||||||
};
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};
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};
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};
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};
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};
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@ -243,6 +237,22 @@
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status = "okay";
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status = "okay";
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};
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};
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&gpio_spi {
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eth0-phy-hog {
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gpio-hog;
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gpios = <1 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "eth0-phy";
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};
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eth1-phy-hog {
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gpio-hog;
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gpios = <2 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "eth1-phy";
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};
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};
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&i2c1 {
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&i2c1 {
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clock-frequency = <100000>;
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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@ -14,5 +14,6 @@
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};
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};
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&gpmi {
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&gpmi {
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fsl,use-minimum-ecc;
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status = "okay";
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status = "okay";
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};
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};
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@ -7,6 +7,7 @@
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_address.h>
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@ -162,7 +163,7 @@ static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
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* interrupts. It registers the interrupt enable and disable functions
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* interrupts. It registers the interrupt enable and disable functions
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* to the kernel for each interrupt source.
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* to the kernel for each interrupt source.
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*/
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*/
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void __init mxc_init_irq(void __iomem *irqbase)
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static void __init mxc_init_irq(void __iomem *irqbase)
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{
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{
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struct device_node *np;
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struct device_node *np;
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int irq_base;
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int irq_base;
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@ -220,3 +221,16 @@ void __init mxc_init_irq(void __iomem *irqbase)
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|
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printk(KERN_INFO "MXC IRQ initialized\n");
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printk(KERN_INFO "MXC IRQ initialized\n");
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}
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}
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static int __init imx_avic_init(struct device_node *node,
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struct device_node *parent)
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{
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void __iomem *avic_base;
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|
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|
avic_base = of_iomap(node, 0);
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BUG_ON(!avic_base);
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|
mxc_init_irq(avic_base);
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|
return 0;
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|
}
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IRQCHIP_DECLARE(imx_avic, "fsl,avic", imx_avic_init);
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|
|
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@ -22,7 +22,6 @@ void mx35_map_io(void);
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void imx21_init_early(void);
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void imx21_init_early(void);
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void imx31_init_early(void);
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void imx31_init_early(void);
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void imx35_init_early(void);
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void imx35_init_early(void);
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void mxc_init_irq(void __iomem *);
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void mx31_init_irq(void);
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void mx31_init_irq(void);
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void mx35_init_irq(void);
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void mx35_init_irq(void);
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void mxc_set_cpu_type(unsigned int type);
|
void mxc_set_cpu_type(unsigned int type);
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|
|
|
@ -17,16 +17,6 @@ static void __init imx1_init_early(void)
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||||||
mxc_set_cpu_type(MXC_CPU_MX1);
|
mxc_set_cpu_type(MXC_CPU_MX1);
|
||||||
}
|
}
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|
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static void __init imx1_init_irq(void)
|
|
||||||
{
|
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void __iomem *avic_addr;
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|
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avic_addr = ioremap(MX1_AVIC_ADDR, SZ_4K);
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WARN_ON(!avic_addr);
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mxc_init_irq(avic_addr);
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}
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|
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static const char * const imx1_dt_board_compat[] __initconst = {
|
static const char * const imx1_dt_board_compat[] __initconst = {
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"fsl,imx1",
|
"fsl,imx1",
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||||||
NULL
|
NULL
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||||||
|
@ -34,7 +24,6 @@ static const char * const imx1_dt_board_compat[] __initconst = {
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||||||
|
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DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
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DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
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.init_early = imx1_init_early,
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.init_early = imx1_init_early,
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.init_irq = imx1_init_irq,
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.dt_compat = imx1_dt_board_compat,
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.dt_compat = imx1_dt_board_compat,
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.restart = mxc_restart,
|
.restart = mxc_restart,
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MACHINE_END
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MACHINE_END
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||||||
|
|
|
@ -22,17 +22,6 @@ static void __init imx25_dt_init(void)
|
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imx_aips_allow_unprivileged_access("fsl,imx25-aips");
|
imx_aips_allow_unprivileged_access("fsl,imx25-aips");
|
||||||
}
|
}
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||||||
|
|
||||||
static void __init mx25_init_irq(void)
|
|
||||||
{
|
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||||||
struct device_node *np;
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|
||||||
void __iomem *avic_base;
|
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||||||
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||||||
np = of_find_compatible_node(NULL, NULL, "fsl,avic");
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avic_base = of_iomap(np, 0);
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BUG_ON(!avic_base);
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mxc_init_irq(avic_base);
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}
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||||||
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||||||
static const char * const imx25_dt_board_compat[] __initconst = {
|
static const char * const imx25_dt_board_compat[] __initconst = {
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"fsl,imx25",
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"fsl,imx25",
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||||||
NULL
|
NULL
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||||||
|
@ -42,6 +31,5 @@ DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
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||||||
.init_early = imx25_init_early,
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.init_early = imx25_init_early,
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.init_machine = imx25_dt_init,
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.init_machine = imx25_dt_init,
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.init_late = imx25_pm_init,
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.init_late = imx25_pm_init,
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.init_irq = mx25_init_irq,
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.dt_compat = imx25_dt_board_compat,
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.dt_compat = imx25_dt_board_compat,
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MACHINE_END
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MACHINE_END
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|
|
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@ -56,17 +56,6 @@ static void __init imx27_init_early(void)
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mxc_set_cpu_type(MXC_CPU_MX27);
|
mxc_set_cpu_type(MXC_CPU_MX27);
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}
|
}
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|
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static void __init mx27_init_irq(void)
|
|
||||||
{
|
|
||||||
void __iomem *avic_base;
|
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||||||
struct device_node *np;
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||||||
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||||||
np = of_find_compatible_node(NULL, NULL, "fsl,avic");
|
|
||||||
avic_base = of_iomap(np, 0);
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BUG_ON(!avic_base);
|
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mxc_init_irq(avic_base);
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||||||
}
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||||||
|
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||||||
static const char * const imx27_dt_board_compat[] __initconst = {
|
static const char * const imx27_dt_board_compat[] __initconst = {
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||||||
"fsl,imx27",
|
"fsl,imx27",
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||||||
NULL
|
NULL
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||||||
|
@ -75,7 +64,6 @@ static const char * const imx27_dt_board_compat[] __initconst = {
|
||||||
DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
|
DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
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||||||
.map_io = mx27_map_io,
|
.map_io = mx27_map_io,
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||||||
.init_early = imx27_init_early,
|
.init_early = imx27_init_early,
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.init_irq = mx27_init_irq,
|
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.init_late = imx27_pm_init,
|
.init_late = imx27_pm_init,
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.dt_compat = imx27_dt_board_compat,
|
.dt_compat = imx27_dt_board_compat,
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MACHINE_END
|
MACHINE_END
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||||||
|
|
|
@ -14,6 +14,5 @@ static const char * const imx31_dt_board_compat[] __initconst = {
|
||||||
DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
|
DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
|
||||||
.map_io = mx31_map_io,
|
.map_io = mx31_map_io,
|
||||||
.init_early = imx31_init_early,
|
.init_early = imx31_init_early,
|
||||||
.init_irq = mx31_init_irq,
|
|
||||||
.dt_compat = imx31_dt_board_compat,
|
.dt_compat = imx31_dt_board_compat,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -27,6 +27,5 @@ DT_MACHINE_START(IMX35_DT, "Freescale i.MX35 (Device Tree Support)")
|
||||||
.l2c_aux_mask = ~0,
|
.l2c_aux_mask = ~0,
|
||||||
.map_io = mx35_map_io,
|
.map_io = mx35_map_io,
|
||||||
.init_early = imx35_init_early,
|
.init_early = imx35_init_early,
|
||||||
.init_irq = mx35_init_irq,
|
|
||||||
.dt_compat = imx35_dt_board_compat,
|
.dt_compat = imx35_dt_board_compat,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -109,18 +109,6 @@ void __init imx31_init_early(void)
|
||||||
mx3_ccm_base = of_iomap(np, 0);
|
mx3_ccm_base = of_iomap(np, 0);
|
||||||
BUG_ON(!mx3_ccm_base);
|
BUG_ON(!mx3_ccm_base);
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init mx31_init_irq(void)
|
|
||||||
{
|
|
||||||
void __iomem *avic_base;
|
|
||||||
struct device_node *np;
|
|
||||||
|
|
||||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx31-avic");
|
|
||||||
avic_base = of_iomap(np, 0);
|
|
||||||
BUG_ON(!avic_base);
|
|
||||||
|
|
||||||
mxc_init_irq(avic_base);
|
|
||||||
}
|
|
||||||
#endif /* ifdef CONFIG_SOC_IMX31 */
|
#endif /* ifdef CONFIG_SOC_IMX31 */
|
||||||
|
|
||||||
#ifdef CONFIG_SOC_IMX35
|
#ifdef CONFIG_SOC_IMX35
|
||||||
|
@ -158,16 +146,4 @@ void __init imx35_init_early(void)
|
||||||
mx3_ccm_base = of_iomap(np, 0);
|
mx3_ccm_base = of_iomap(np, 0);
|
||||||
BUG_ON(!mx3_ccm_base);
|
BUG_ON(!mx3_ccm_base);
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init mx35_init_irq(void)
|
|
||||||
{
|
|
||||||
void __iomem *avic_base;
|
|
||||||
struct device_node *np;
|
|
||||||
|
|
||||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx35-avic");
|
|
||||||
avic_base = of_iomap(np, 0);
|
|
||||||
BUG_ON(!avic_base);
|
|
||||||
|
|
||||||
mxc_init_irq(avic_base);
|
|
||||||
}
|
|
||||||
#endif /* ifdef CONFIG_SOC_IMX35 */
|
#endif /* ifdef CONFIG_SOC_IMX35 */
|
||||||
|
|
|
@ -198,6 +198,7 @@
|
||||||
ranges = <0x0 0x00 0x1700000 0x100000>;
|
ranges = <0x0 0x00 0x1700000 0x100000>;
|
||||||
reg = <0x00 0x1700000 0x0 0x100000>;
|
reg = <0x00 0x1700000 0x0 0x100000>;
|
||||||
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dma-coherent;
|
||||||
|
|
||||||
sec_jr0: jr@10000 {
|
sec_jr0: jr@10000 {
|
||||||
compatible = "fsl,sec-v5.4-job-ring",
|
compatible = "fsl,sec-v5.4-job-ring",
|
||||||
|
|
|
@ -348,6 +348,7 @@
|
||||||
ranges = <0x0 0x00 0x1700000 0x100000>;
|
ranges = <0x0 0x00 0x1700000 0x100000>;
|
||||||
reg = <0x00 0x1700000 0x0 0x100000>;
|
reg = <0x00 0x1700000 0x0 0x100000>;
|
||||||
interrupts = <0 75 0x4>;
|
interrupts = <0 75 0x4>;
|
||||||
|
dma-coherent;
|
||||||
|
|
||||||
sec_jr0: jr@10000 {
|
sec_jr0: jr@10000 {
|
||||||
compatible = "fsl,sec-v5.4-job-ring",
|
compatible = "fsl,sec-v5.4-job-ring",
|
||||||
|
|
|
@ -354,6 +354,7 @@
|
||||||
ranges = <0x0 0x00 0x1700000 0x100000>;
|
ranges = <0x0 0x00 0x1700000 0x100000>;
|
||||||
reg = <0x00 0x1700000 0x0 0x100000>;
|
reg = <0x00 0x1700000 0x0 0x100000>;
|
||||||
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dma-coherent;
|
||||||
|
|
||||||
sec_jr0: jr@10000 {
|
sec_jr0: jr@10000 {
|
||||||
compatible = "fsl,sec-v5.4-job-ring",
|
compatible = "fsl,sec-v5.4-job-ring",
|
||||||
|
|
|
@ -35,7 +35,7 @@
|
||||||
|
|
||||||
&i2c2 {
|
&i2c2 {
|
||||||
clock-frequency = <400000>;
|
clock-frequency = <400000>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default", "gpio";
|
||||||
pinctrl-0 = <&pinctrl_i2c2>;
|
pinctrl-0 = <&pinctrl_i2c2>;
|
||||||
pinctrl-1 = <&pinctrl_i2c2_gpio>;
|
pinctrl-1 = <&pinctrl_i2c2_gpio>;
|
||||||
sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||||
|
|
|
@ -67,7 +67,7 @@
|
||||||
|
|
||||||
&i2c1 {
|
&i2c1 {
|
||||||
clock-frequency = <400000>;
|
clock-frequency = <400000>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default", "gpio";
|
||||||
pinctrl-0 = <&pinctrl_i2c1>;
|
pinctrl-0 = <&pinctrl_i2c1>;
|
||||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||||
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||||
|
|
Loading…
Reference in New Issue