[PADLOCK] Move fast path work into aes_set_key and upper layer
Most of the work done aes_padlock can be done in aes_set_key. This means that we only have to do it once when the key changes rather than every time we perform an encryption or decryption. This patch also sets cra_alignmask to let the upper layer ensure that the buffers fed to us are aligned correctly. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>hifive-unleashed-5.1
Herbert Xu
David S. Miller
parent
9547737799
commit
6789b2dc45
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@ -49,6 +49,7 @@
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#include <linux/errno.h>
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#include <linux/crypto.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <asm/byteorder.h>
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#include "padlock.h"
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@ -59,8 +60,12 @@
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#define AES_EXTENDED_KEY_SIZE_B (AES_EXTENDED_KEY_SIZE * sizeof(uint32_t))
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struct aes_ctx {
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uint32_t e_data[AES_EXTENDED_KEY_SIZE+4];
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uint32_t d_data[AES_EXTENDED_KEY_SIZE+4];
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uint32_t e_data[AES_EXTENDED_KEY_SIZE];
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uint32_t d_data[AES_EXTENDED_KEY_SIZE];
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struct {
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struct cword encrypt;
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struct cword decrypt;
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} cword;
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uint32_t *E;
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uint32_t *D;
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int key_length;
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@ -280,10 +285,15 @@ aes_hw_extkey_available(uint8_t key_len)
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return 0;
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}
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static inline struct aes_ctx *aes_ctx(void *ctx)
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{
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return (struct aes_ctx *)ALIGN((unsigned long)ctx, PADLOCK_ALIGNMENT);
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}
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static int
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aes_set_key(void *ctx_arg, const uint8_t *in_key, unsigned int key_len, uint32_t *flags)
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{
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struct aes_ctx *ctx = ctx_arg;
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struct aes_ctx *ctx = aes_ctx(ctx_arg);
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uint32_t i, t, u, v, w;
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uint32_t P[AES_EXTENDED_KEY_SIZE];
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uint32_t rounds;
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@ -295,25 +305,36 @@ aes_set_key(void *ctx_arg, const uint8_t *in_key, unsigned int key_len, uint32_t
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ctx->key_length = key_len;
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/*
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* If the hardware is capable of generating the extended key
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* itself we must supply the plain key for both encryption
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* and decryption.
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*/
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ctx->E = ctx->e_data;
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ctx->D = ctx->d_data;
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/* Ensure 16-Bytes alignmentation of keys for VIA PadLock. */
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if ((int)(ctx->e_data) & 0x0F)
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ctx->E += 4 - (((int)(ctx->e_data) & 0x0F) / sizeof (ctx->e_data[0]));
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if ((int)(ctx->d_data) & 0x0F)
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ctx->D += 4 - (((int)(ctx->d_data) & 0x0F) / sizeof (ctx->d_data[0]));
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ctx->D = ctx->e_data;
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E_KEY[0] = uint32_t_in (in_key);
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E_KEY[1] = uint32_t_in (in_key + 4);
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E_KEY[2] = uint32_t_in (in_key + 8);
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E_KEY[3] = uint32_t_in (in_key + 12);
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/* Prepare control words. */
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memset(&ctx->cword, 0, sizeof(ctx->cword));
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ctx->cword.decrypt.encdec = 1;
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ctx->cword.encrypt.rounds = 10 + (key_len - 16) / 4;
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ctx->cword.decrypt.rounds = ctx->cword.encrypt.rounds;
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ctx->cword.encrypt.ksize = (key_len - 16) / 8;
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ctx->cword.decrypt.ksize = ctx->cword.encrypt.ksize;
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/* Don't generate extended keys if the hardware can do it. */
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if (aes_hw_extkey_available(key_len))
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return 0;
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ctx->D = ctx->d_data;
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ctx->cword.encrypt.keygen = 1;
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ctx->cword.decrypt.keygen = 1;
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switch (key_len) {
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case 16:
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t = E_KEY[3];
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@ -370,9 +391,8 @@ aes_set_key(void *ctx_arg, const uint8_t *in_key, unsigned int key_len, uint32_t
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/* ====== Encryption/decryption routines ====== */
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/* This is the real call to PadLock. */
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static inline void
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padlock_xcrypt_ecb(uint8_t *input, uint8_t *output, uint8_t *key,
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void *control_word, uint32_t count)
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static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
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void *control_word, u32 count)
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{
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asm volatile ("pushfl; popfl"); /* enforce key reload. */
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asm volatile (".byte 0xf3,0x0f,0xa7,0xc8" /* rep xcryptecb */
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@ -380,67 +400,27 @@ padlock_xcrypt_ecb(uint8_t *input, uint8_t *output, uint8_t *key,
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: "d"(control_word), "b"(key), "c"(count));
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}
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static void
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aes_padlock(void *ctx_arg, uint8_t *out_arg, const uint8_t *in_arg, int encdec)
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{
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/* Don't blindly modify this structure - the items must
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fit on 16-Bytes boundaries! */
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struct padlock_xcrypt_data {
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uint8_t buf[AES_BLOCK_SIZE];
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union cword cword;
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};
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struct aes_ctx *ctx = ctx_arg;
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char bigbuf[sizeof(struct padlock_xcrypt_data) + 16];
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struct padlock_xcrypt_data *data;
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void *key;
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/* Place 'data' at the first 16-Bytes aligned address in 'bigbuf'. */
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if (((long)bigbuf) & 0x0F)
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data = (void*)(bigbuf + 16 - ((long)bigbuf & 0x0F));
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else
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data = (void*)bigbuf;
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/* Prepare Control word. */
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memset (data, 0, sizeof(struct padlock_xcrypt_data));
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data->cword.b.encdec = !encdec; /* in the rest of cryptoapi ENC=1/DEC=0 */
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data->cword.b.rounds = 10 + (ctx->key_length - 16) / 4;
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data->cword.b.ksize = (ctx->key_length - 16) / 8;
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/* Is the hardware capable to generate the extended key? */
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if (!aes_hw_extkey_available(ctx->key_length))
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data->cword.b.keygen = 1;
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/* ctx->E starts with a plain key - if the hardware is capable
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to generate the extended key itself we must supply
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the plain key for both Encryption and Decryption. */
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if (encdec == CRYPTO_DIR_ENCRYPT || data->cword.b.keygen == 0)
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key = ctx->E;
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else
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key = ctx->D;
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memcpy(data->buf, in_arg, AES_BLOCK_SIZE);
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padlock_xcrypt_ecb(data->buf, data->buf, key, &data->cword, 1);
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memcpy(out_arg, data->buf, AES_BLOCK_SIZE);
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}
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static void
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aes_encrypt(void *ctx_arg, uint8_t *out, const uint8_t *in)
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{
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aes_padlock(ctx_arg, out, in, CRYPTO_DIR_ENCRYPT);
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struct aes_ctx *ctx = aes_ctx(ctx_arg);
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padlock_xcrypt_ecb(in, out, ctx->E, &ctx->cword.encrypt, 1);
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}
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static void
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aes_decrypt(void *ctx_arg, uint8_t *out, const uint8_t *in)
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{
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aes_padlock(ctx_arg, out, in, CRYPTO_DIR_DECRYPT);
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struct aes_ctx *ctx = aes_ctx(ctx_arg);
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padlock_xcrypt_ecb(in, out, ctx->D, &ctx->cword.decrypt, 1);
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}
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static struct crypto_alg aes_alg = {
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.cra_name = "aes",
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.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct aes_ctx),
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.cra_ctxsize = sizeof(struct aes_ctx) +
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PADLOCK_ALIGNMENT,
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.cra_alignmask = PADLOCK_ALIGNMENT - 1,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(aes_alg.cra_list),
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.cra_u = {
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@ -13,18 +13,18 @@
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#ifndef _CRYPTO_PADLOCK_H
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#define _CRYPTO_PADLOCK_H
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#define PADLOCK_ALIGNMENT 16
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/* Control word. */
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union cword {
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uint32_t cword[4];
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struct {
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int rounds:4;
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int algo:3;
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int keygen:1;
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int interm:1;
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int encdec:1;
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int ksize:2;
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} b;
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};
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struct cword {
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int __attribute__ ((__packed__))
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rounds:4,
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algo:3,
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keygen:1,
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interm:1,
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encdec:1,
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ksize:2;
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} __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));
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#define PFX "padlock: "
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