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drm/radeon/kms: fix thermal sensor reading on juniper 

Uses a different method than other evergreen asics.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
hifive-unleashed-5.1
Alex Deucher 2011-05-25 18:45:37 -04:00 committed by Dave Airlie
parent 457558eda1
commit 67b3f823ec
2 changed files with 38 additions and 14 deletions
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44
drivers/gpu/drm/radeon/evergreen.c
View File

@ -88,21 +88,39 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
/* get temperature in millidegrees */
int evergreen_get_temp(struct radeon_device *rdev)
{
u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >>
ASIC_T_SHIFT;
u32 actual_temp = 0;
u32 temp, toffset, actual_temp = 0;
if (temp & 0x400)
actual_temp = -256;
else if (temp & 0x200)
actual_temp = 255;
else if (temp & 0x100) {
actual_temp = temp & 0x1ff;
actual_temp |= ~0x1ff;
} else
actual_temp = temp & 0xff;
if (rdev->family == CHIP_JUNIPER) {
toffset = (RREG32(CG_THERMAL_CTRL) & TOFFSET_MASK) >>
TOFFSET_SHIFT;
temp = (RREG32(CG_TS0_STATUS) & TS0_ADC_DOUT_MASK) >>
TS0_ADC_DOUT_SHIFT;
return (actual_temp * 1000) / 2;
if (toffset & 0x100)
actual_temp = temp / 2 - (0x200 - toffset);
else
actual_temp = temp / 2 + toffset;
actual_temp = actual_temp * 1000;
} else {
temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >>
ASIC_T_SHIFT;
if (temp & 0x400)
actual_temp = -256;
else if (temp & 0x200)
actual_temp = 255;
else if (temp & 0x100) {
actual_temp = temp & 0x1ff;
actual_temp |= ~0x1ff;
} else
actual_temp = temp & 0xff;
actual_temp = (actual_temp * 1000) / 2;
}
return actual_temp;
}
int sumo_get_temp(struct radeon_device *rdev)

8
drivers/gpu/drm/radeon/evergreend.h
View File

@ -168,10 +168,16 @@
#define SE_DB_BUSY (1 << 30)
#define SE_CB_BUSY (1 << 31)
/* evergreen */
#define CG_THERMAL_CTRL 0x72c
#define TOFFSET_MASK 0x00003FE0
#define TOFFSET_SHIFT 5
#define CG_MULT_THERMAL_STATUS 0x740
#define ASIC_T(x) ((x) << 16)
#define ASIC_T_MASK 0x7FF0000
#define ASIC_T_MASK 0x07FF0000
#define ASIC_T_SHIFT 16
#define CG_TS0_STATUS 0x760
#define TS0_ADC_DOUT_MASK 0x000003FF
#define TS0_ADC_DOUT_SHIFT 0
/* APU */
#define CG_THERMAL_STATUS 0x678