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clk: si5351: Fix clkout rate computation. 

Rate was incorrectly computed because we read from wrong divider register.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: stable@kernel.org
hifive-unleashed-5.1
Marek Belisko 2013-05-03 07:53:22 +02:00 committed by Mike Turquette
parent 056f3d58db
commit 67e1e2268e
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/clk-si5351.c
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@ -932,7 +932,7 @@ static unsigned long si5351_clkout_recalc_rate(struct clk_hw *hw,
unsigned char reg;
unsigned char rdiv;
if (hwdata->num > 5)
if (hwdata->num <= 5)
reg = si5351_msynth_params_address(hwdata->num) + 2;
else
reg = SI5351_CLK6_7_OUTPUT_DIVIDER;