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drm/i915/dp: Tweak auxch clock divider for PCH 

Matches the advice in the Sandybridge documentation.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
hifive-unleashed-5.1
Adam Jackson 2011-07-26 15:39:44 -04:00 committed by Daniel Vetter
parent 1f182b27d5
commit 6919132e7a
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/intel_dp.c
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@ -378,7 +378,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
else
aux_clock_divider = 225; /* eDP input clock at 450Mhz */
} else if (HAS_PCH_SPLIT(dev))
aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */
aux_clock_divider = 63; /* IRL input clock fixed at 125Mhz */
else
aux_clock_divider = intel_hrawclk(dev) / 2;