MIPS: Use enums to make asm/pgtable-bits.h readable
asm/pgtable-bits.h has grown to become an unreadable mess of #ifdef directives defining bits conditionally upon other bits all at the preprocessing stage, for no good reason. Instead of having quite so many #ifdef's, simply use enums to provide sequential numbering for bit shifts, without having to keep track manually of what the last bit defined was. Masks are defined separately, after the shifts, which allows for most of their definitions to be reused for all systems rather than duplicated. This patch is not intended to make any behavioural change to the code - all bits should be used in the same way they were before this patch. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13115/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>hifive-unleashed-5.1
Paul Burton
Ralf Baechle
parent
253f0d4a5f
commit
694977006a
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@ -35,36 +35,25 @@
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#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
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/*
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* The following bits are implemented by the TLB hardware
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* Page table bit offsets used for 64 bit physical addressing on MIPS32,
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* for example with Alchemy, Netlogic XLP/XLR or XPA.
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*/
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#define _PAGE_NO_EXEC_SHIFT 0
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#define _PAGE_NO_EXEC (1 << _PAGE_NO_EXEC_SHIFT)
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#define _PAGE_NO_READ_SHIFT (_PAGE_NO_EXEC_SHIFT + 1)
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#define _PAGE_NO_READ (1 << _PAGE_NO_READ_SHIFT)
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#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
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#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
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#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
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#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
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#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1)
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#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT)
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#define _CACHE_SHIFT (_PAGE_DIRTY_SHIFT + 1)
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#define _CACHE_MASK (7 << _CACHE_SHIFT)
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enum pgtable_bits {
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/* Used by TLB hardware (placed in EntryLo*) */
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_PAGE_NO_EXEC_SHIFT,
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_PAGE_NO_READ_SHIFT,
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_PAGE_GLOBAL_SHIFT,
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_PAGE_VALID_SHIFT,
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_PAGE_DIRTY_SHIFT,
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_CACHE_SHIFT,
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/*
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* The following bits are implemented in software
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*/
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#define _PAGE_PRESENT_SHIFT (24)
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#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
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#define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1)
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#define _PAGE_READ (1 << _PAGE_READ_SHIFT)
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#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
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#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
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#define _PAGE_ACCESSED_SHIFT (_PAGE_WRITE_SHIFT + 1)
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#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT)
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#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1)
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#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
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#define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3)
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/* Used only by software (masked out before writing EntryLo*) */
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_PAGE_PRESENT_SHIFT = 24,
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_PAGE_READ_SHIFT,
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_PAGE_WRITE_SHIFT,
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_PAGE_ACCESSED_SHIFT,
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_PAGE_MODIFIED_SHIFT,
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};
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/*
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* Bits for extended EntryLo0/EntryLo1 registers
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@ -73,102 +62,86 @@
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#elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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/*
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* The following bits are implemented in software
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*/
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#define _PAGE_PRESENT_SHIFT (0)
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#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
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#define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1)
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#define _PAGE_READ (1 << _PAGE_READ_SHIFT)
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#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
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#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
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#define _PAGE_ACCESSED_SHIFT (_PAGE_WRITE_SHIFT + 1)
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#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT)
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#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1)
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#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
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/* Page table bits used for r3k systems */
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enum pgtable_bits {
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/* Used only by software (writes to EntryLo ignored) */
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_PAGE_PRESENT_SHIFT,
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_PAGE_READ_SHIFT,
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_PAGE_WRITE_SHIFT,
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_PAGE_ACCESSED_SHIFT,
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_PAGE_MODIFIED_SHIFT,
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/*
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* The following bits are implemented by the TLB hardware
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*/
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#define _PAGE_GLOBAL_SHIFT (_PAGE_MODIFIED_SHIFT + 4)
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#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
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#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
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#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
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#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1)
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#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT)
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#define _CACHE_UNCACHED_SHIFT (_PAGE_DIRTY_SHIFT + 1)
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#define _CACHE_UNCACHED (1 << _CACHE_UNCACHED_SHIFT)
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#define _CACHE_MASK _CACHE_UNCACHED
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#define _PFN_SHIFT PAGE_SHIFT
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/* Used by TLB hardware (placed in EntryLo) */
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_PAGE_GLOBAL_SHIFT = 8,
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_PAGE_VALID_SHIFT,
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_PAGE_DIRTY_SHIFT,
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_CACHE_UNCACHED_SHIFT,
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};
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#else
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/*
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* Below are the "Normal" R4K cases
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*/
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/*
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* The following bits are implemented in software
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*/
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#define _PAGE_PRESENT_SHIFT 0
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#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
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/* R2 or later cores check for RI/XI support to determine _PAGE_READ */
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#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
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#define _PAGE_WRITE_SHIFT (_PAGE_PRESENT_SHIFT + 1)
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#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
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#else
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#define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1)
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#define _PAGE_READ (1 << _PAGE_READ_SHIFT)
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#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
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#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
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/* Page table bits used for r4k systems */
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enum pgtable_bits {
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/* Used only by software (masked out before writing EntryLo*) */
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_PAGE_PRESENT_SHIFT,
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#if !defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_CPU_MIPSR6)
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_PAGE_READ_SHIFT,
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#endif
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#define _PAGE_ACCESSED_SHIFT (_PAGE_WRITE_SHIFT + 1)
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#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT)
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#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1)
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#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
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_PAGE_WRITE_SHIFT,
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_PAGE_ACCESSED_SHIFT,
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_PAGE_MODIFIED_SHIFT,
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#if defined(CONFIG_64BIT) && defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
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/* Huge TLB page */
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#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
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#define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
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#endif /* CONFIG_64BIT && CONFIG_MIPS_HUGE_TLB_SUPPORT */
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_PAGE_HUGE_SHIFT,
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#endif
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/* Used by TLB hardware (placed in EntryLo*) */
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#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
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/* XI - page cannot be executed */
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#ifdef _PAGE_HUGE_SHIFT
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#define _PAGE_NO_EXEC_SHIFT (_PAGE_HUGE_SHIFT + 1)
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#else
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#define _PAGE_NO_EXEC_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
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_PAGE_NO_EXEC_SHIFT,
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_PAGE_NO_READ_SHIFT,
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_PAGE_READ_SHIFT = _PAGE_NO_READ_SHIFT,
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#endif
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#define _PAGE_NO_EXEC (cpu_has_rixi ? (1 << _PAGE_NO_EXEC_SHIFT) : 0)
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/* RI - page cannot be read */
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#define _PAGE_READ_SHIFT (_PAGE_NO_EXEC_SHIFT + 1)
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#define _PAGE_READ (cpu_has_rixi ? 0 : (1 << _PAGE_READ_SHIFT))
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#define _PAGE_NO_READ_SHIFT _PAGE_READ_SHIFT
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#define _PAGE_NO_READ (cpu_has_rixi ? (1 << _PAGE_READ_SHIFT) : 0)
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#endif /* defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) */
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#if defined(_PAGE_NO_READ_SHIFT)
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#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
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#elif defined(_PAGE_HUGE_SHIFT)
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#define _PAGE_GLOBAL_SHIFT (_PAGE_HUGE_SHIFT + 1)
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#else
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#define _PAGE_GLOBAL_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
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#endif
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#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
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#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
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#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
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#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1)
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#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT)
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#define _CACHE_SHIFT (_PAGE_DIRTY_SHIFT + 1)
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#define _CACHE_MASK (7 << _CACHE_SHIFT)
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#define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3)
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_PAGE_GLOBAL_SHIFT,
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_PAGE_VALID_SHIFT,
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_PAGE_DIRTY_SHIFT,
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_CACHE_SHIFT,
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};
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#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT && defined(CONFIG_CPU_MIPS32) */
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/* Used only by software */
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#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
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#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
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# define _PAGE_READ (cpu_has_rixi ? 0 : (1 << _PAGE_READ_SHIFT))
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#else
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# define _PAGE_READ (1 << _PAGE_READ_SHIFT)
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#endif
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#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
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#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT)
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#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
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#if defined(CONFIG_64BIT) && defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
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# define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
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#endif
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/* Used by TLB hardware (placed in EntryLo*) */
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#if (defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32))
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# define _PAGE_NO_EXEC (1 << _PAGE_NO_EXEC_SHIFT)
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# define _PAGE_NO_READ (1 << _PAGE_NO_READ_SHIFT)
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#elif defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
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# define _PAGE_NO_EXEC (cpu_has_rixi ? (1 << _PAGE_NO_EXEC_SHIFT) : 0)
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# define _PAGE_NO_READ (cpu_has_rixi ? (1 << _PAGE_NO_READ_SHIFT) : 0)
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#endif
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#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
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#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
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#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT)
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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# define _CACHE_UNCACHED (1 << _CACHE_UNCACHED_SHIFT)
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# define _CACHE_MASK _CACHE_UNCACHED
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# define _PFN_SHIFT PAGE_SHIFT
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#else
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# define _CACHE_MASK (7 << _CACHE_SHIFT)
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# define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3)
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#endif
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#ifndef _PAGE_NO_EXEC
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#define _PAGE_NO_EXEC 0
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#endif
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