drm/i915/hdmi: Enable pipe pixel replication for SD interlaced modes
Enable 2x pixel replication for modes the mode flag DBLCLK to double horizontal timings and pixel clock across TMDS. Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -864,10 +864,15 @@ static enum drm_mode_status
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intel_hdmi_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector),
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true))
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int clock = mode->clock;
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if (mode->flags & DRM_MODE_FLAG_DBLCLK)
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clock *= 2;
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if (clock > hdmi_portclock_limit(intel_attached_hdmi(connector),
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true))
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return MODE_CLOCK_HIGH;
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if (mode->clock < 20000)
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if (clock < 20000)
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return MODE_CLOCK_LOW;
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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@ -921,6 +926,10 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
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intel_hdmi->color_range = 0;
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}
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if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) {
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pipe_config->pixel_multiplier = 2;
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}
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if (intel_hdmi->color_range)
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pipe_config->limited_color_range = true;
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