[media] drx-j: Misspelled comment corrected
Fix several typos inside the driver's comments. Signed-off-by: Cheolhyun Park <pch851130@gmail.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Cheolhyun Park
Mauro Carvalho Chehab
parent
5380baaf15
commit
69bb7ab687
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@ -210,7 +210,7 @@ DEFINES
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/**
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* \def DRXJ_DEF_I2C_ADDR
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* \brief Default I2C addres of a demodulator instance.
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* \brief Default I2C address of a demodulator instance.
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*/
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#define DRXJ_DEF_I2C_ADDR (0x52)
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@ -336,7 +336,7 @@ DEFINES
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* MICROCODE RELATED DEFINES
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*/
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/* Magic word for checking correct Endianess of microcode data */
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/* Magic word for checking correct Endianness of microcode data */
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#define DRX_UCODE_MAGIC_WORD ((((u16)'H')<<8)+((u16)'L'))
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/* CRC flag in ucode header, flags field. */
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@ -847,9 +847,9 @@ static struct drx_common_attr drxj_default_comm_attr_g = {
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static clockrate is selected */
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DRX_MPEG_STR_WIDTH_1 /* MPEG Start width in clock cycles */
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},
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/* Initilisations below can be ommited, they require no user input and
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/* Initilisations below can be omitted, they require no user input and
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are initialy 0, NULL or false. The compiler will initialize them to these
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values when ommited. */
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values when omitted. */
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false, /* is_opened */
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/* SCAN */
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@ -1175,7 +1175,7 @@ static u32 log1_times100(u32 x)
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Now x has binary point between bit[scale] and bit[scale-1]
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and 1.0 <= x < 2.0 */
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/* correction for divison: log(x) = log(x/y)+log(y) */
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/* correction for division: log(x) = log(x/y)+log(y) */
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y = k * ((((u32) 1) << scale) * 200);
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/* remove integer part */
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@ -1653,7 +1653,7 @@ static int drxdap_fasi_write_block(struct i2c_device_addr *dev_addr,
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sequense will be visible: (1) write address {i2c addr,
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4 bytes chip address} (2) write data {i2c addr, 4 bytes data }
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(3) write address (4) write data etc...
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Addres must be rewriten because HI is reset after data transport and
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Address must be rewriten because HI is reset after data transport and
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expects an address.
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*/
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todo = (block_size < datasize ? block_size : datasize);
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@ -2971,7 +2971,7 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
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} /* ext_attr->standard */
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}
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if (cfg_data->enable_parallel == true) { /* MPEG data output is paralel -> clear ipr_mode[0] */
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if (cfg_data->enable_parallel == true) { /* MPEG data output is parallel -> clear ipr_mode[0] */
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fec_oc_reg_ipr_mode &= (~(FEC_OC_IPR_MODE_SERIAL__M));
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} else { /* MPEG data output is serial -> set ipr_mode[0] */
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fec_oc_reg_ipr_mode |= FEC_OC_IPR_MODE_SERIAL__M;
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@ -3157,7 +3157,7 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
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pr_err("error %d\n", rc);
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goto rw_error;
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}
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if (cfg_data->enable_parallel == true) { /* MPEG data output is paralel -> set MD1 to MD7 to output mode */
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if (cfg_data->enable_parallel == true) { /* MPEG data output is parallel -> set MD1 to MD7 to output mode */
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sio_pdr_md_cfg =
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MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH <<
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SIO_PDR_MD0_CFG_DRIVE__B | 0x03 <<
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@ -4320,7 +4320,7 @@ static int adc_synchronization(struct drx_demod_instance *demod)
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}
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if (count == 1) {
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/* Try sampling on a diffrent edge */
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/* Try sampling on a different edge */
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u16 clk_neg = 0;
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rc = drxj_dap_read_reg16(dev_addr, IQM_AF_CLKNEG__A, &clk_neg, 0);
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@ -6461,7 +6461,7 @@ set_qam_measurement(struct drx_demod_instance *demod,
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enum drx_modulation constellation, u32 symbol_rate)
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{
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struct i2c_device_addr *dev_addr = NULL; /* device address for I2C writes */
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struct drxj_data *ext_attr = NULL; /* Global data container for DRXJ specif data */
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struct drxj_data *ext_attr = NULL; /* Global data container for DRXJ specific data */
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int rc;
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u32 fec_bits_desired = 0; /* BER accounting period */
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u16 fec_rs_plen = 0; /* defines RS BER measurement period */
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@ -8864,7 +8864,7 @@ qam64auto(struct drx_demod_instance *demod,
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u32 timeout_ofs = 0;
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u16 data = 0;
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/* external attributes for storing aquired channel constellation */
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/* external attributes for storing acquired channel constellation */
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*lock_status = DRX_NOT_LOCKED;
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start_time = jiffies_to_msecs(jiffies);
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lck_state = NO_LOCK;
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@ -9011,7 +9011,7 @@ qam256auto(struct drx_demod_instance *demod,
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u32 d_locked_time = 0;
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u32 timeout_ofs = DRXJ_QAM_DEMOD_LOCK_EXT_WAITTIME;
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/* external attributes for storing aquired channel constellation */
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/* external attributes for storing acquired channel constellation */
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*lock_status = DRX_NOT_LOCKED;
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start_time = jiffies_to_msecs(jiffies);
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lck_state = NO_LOCK;
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@ -9087,7 +9087,7 @@ set_qam_channel(struct drx_demod_instance *demod,
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enum drx_lock_status lock_status = DRX_NOT_LOCKED;
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bool auto_flag = false;
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/* external attributes for storing aquired channel constellation */
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/* external attributes for storing acquired channel constellation */
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ext_attr = (struct drxj_data *) demod->my_ext_attr;
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/* set QAM channel constellation */
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@ -9431,7 +9431,7 @@ rw_error:
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/**
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* \fn int ctrl_get_qam_sig_quality()
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* \brief Retreive QAM signal quality from device.
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* \brief Retrieve QAM signal quality from device.
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* \param devmod Pointer to demodulator instance.
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* \param sig_quality Pointer to signal quality data.
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* \return int.
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@ -10647,7 +10647,7 @@ rw_error:
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/**
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* \fn int ctrl_sig_quality()
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* \brief Retreive signal quality form device.
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* \brief Retrieve signal quality form device.
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* \param devmod Pointer to demodulator instance.
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* \param sig_quality Pointer to signal quality data.
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* \return int.
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@ -10763,7 +10763,7 @@ rw_error:
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/**
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* \fn int ctrl_lock_status()
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* \brief Retreive lock status .
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* \brief Retrieve lock status .
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* \param dev_addr Pointer to demodulator device address.
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* \param lock_stat Pointer to lock status structure.
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* \return int.
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@ -10815,7 +10815,7 @@ ctrl_lock_status(struct drx_demod_instance *demod, enum drx_lock_status *lock_st
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return -EIO;
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}
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/* define the SCU command paramters and execute the command */
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/* define the SCU command parameters and execute the command */
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cmd_scu.parameter_len = 0;
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cmd_scu.result_len = 2;
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cmd_scu.parameter = NULL;
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@ -11489,7 +11489,7 @@ static int drxj_open(struct drx_demod_instance *demod)
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}
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/* Stamp driver version number in SCU data RAM in BCD code
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Done to enable field application engineers to retreive drxdriver version
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Done to enable field application engineers to retrieve drxdriver version
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via I2C from SCU RAM
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*/
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driver_version = (VERSION_MAJOR / 100) % 10;
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@ -11892,7 +11892,7 @@ release:
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return rc;
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}
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/* caller is expeced to check if lna is supported before enabling */
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/* caller is expected to check if lna is supported before enabling */
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static int drxj_set_lna_state(struct drx_demod_instance *demod, bool state)
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{
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struct drxuio_cfg uio_cfg;
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