add FPGA manager core
API to support programming FPGA's. The following functions are exported as GPL: * fpga_mgr_buf_load Load fpga from image in buffer * fpga_mgr_firmware_load Request firmware and load it to the FPGA. * fpga_mgr_register * fpga_mgr_unregister FPGA device drivers can be added by calling fpga_mgr_register() to register a set of fpga_manager_ops to do device specific stuff. * of_fpga_mgr_get * fpga_mgr_put Get/put a reference to a fpga manager. The following sysfs files are created: * /sys/class/fpga_manager/<fpga>/name Name of low level driver. * /sys/class/fpga_manager/<fpga>/state State of fpga manager Signed-off-by: Alan Tull <atull@opensource.altera.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>hifive-unleashed-5.1
Alan Tull
Greg Kroah-Hartman
parent
afb79e993a
commit
6a8c3be7ec
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@ -192,4 +192,6 @@ source "drivers/hwtracing/stm/Kconfig"
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source "drivers/hwtracing/intel_th/Kconfig"
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source "drivers/fpga/Kconfig"
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endmenu
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@ -169,3 +169,4 @@ obj-y += hwtracing/intel_th/
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obj-$(CONFIG_STM) += hwtracing/stm/
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obj-$(CONFIG_ANDROID) += android/
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obj-$(CONFIG_NVMEM) += nvmem/
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obj-$(CONFIG_FPGA) += fpga/
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@ -0,0 +1,14 @@
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#
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# FPGA framework configuration
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#
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menu "FPGA Configuration Support"
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config FPGA
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tristate "FPGA Configuration Framework"
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help
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Say Y here if you want support for configuring FPGAs from the
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kernel. The FPGA framework adds a FPGA manager class and FPGA
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manager drivers.
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endmenu
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@ -0,0 +1,8 @@
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#
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# Makefile for the fpga framework and fpga manager drivers.
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#
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# Core FPGA Manager Framework
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obj-$(CONFIG_FPGA) += fpga-mgr.o
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# FPGA Manager Drivers
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@ -0,0 +1,382 @@
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/*
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* FPGA Manager Core
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*
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* Copyright (C) 2013-2015 Altera Corporation
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*
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* With code from the mailing list:
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* Copyright (C) 2013 Xilinx, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/firmware.h>
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#include <linux/fpga/fpga-mgr.h>
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#include <linux/idr.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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static DEFINE_IDA(fpga_mgr_ida);
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static struct class *fpga_mgr_class;
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/**
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* fpga_mgr_buf_load - load fpga from image in buffer
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* @mgr: fpga manager
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* @flags: flags setting fpga confuration modes
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* @buf: buffer contain fpga image
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* @count: byte count of buf
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*
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* Step the low level fpga manager through the device-specific steps of getting
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* an FPGA ready to be configured, writing the image to it, then doing whatever
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* post-configuration steps necessary.
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf,
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size_t count)
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{
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struct device *dev = &mgr->dev;
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int ret;
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if (!mgr)
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return -ENODEV;
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/*
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* Call the low level driver's write_init function. This will do the
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* device-specific things to get the FPGA into the state where it is
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* ready to receive an FPGA image.
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*/
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mgr->state = FPGA_MGR_STATE_WRITE_INIT;
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ret = mgr->mops->write_init(mgr, flags, buf, count);
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if (ret) {
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dev_err(dev, "Error preparing FPGA for writing\n");
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mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
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return ret;
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}
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/*
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* Write the FPGA image to the FPGA.
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*/
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mgr->state = FPGA_MGR_STATE_WRITE;
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ret = mgr->mops->write(mgr, buf, count);
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if (ret) {
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dev_err(dev, "Error while writing image data to FPGA\n");
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mgr->state = FPGA_MGR_STATE_WRITE_ERR;
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return ret;
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}
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/*
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* After all the FPGA image has been written, do the device specific
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* steps to finish and set the FPGA into operating mode.
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*/
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mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
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ret = mgr->mops->write_complete(mgr, flags);
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if (ret) {
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dev_err(dev, "Error after writing image data to FPGA\n");
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mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
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return ret;
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}
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mgr->state = FPGA_MGR_STATE_OPERATING;
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return 0;
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
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/**
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* fpga_mgr_firmware_load - request firmware and load to fpga
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* @mgr: fpga manager
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* @flags: flags setting fpga confuration modes
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* @image_name: name of image file on the firmware search path
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*
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* Request an FPGA image using the firmware class, then write out to the FPGA.
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* Update the state before each step to provide info on what step failed if
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* there is a failure.
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
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const char *image_name)
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{
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struct device *dev = &mgr->dev;
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const struct firmware *fw;
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int ret;
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if (!mgr)
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return -ENODEV;
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dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
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mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
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ret = request_firmware(&fw, image_name, dev);
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if (ret) {
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mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
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dev_err(dev, "Error requesting firmware %s\n", image_name);
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return ret;
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}
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ret = fpga_mgr_buf_load(mgr, flags, fw->data, fw->size);
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if (ret)
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return ret;
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release_firmware(fw);
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return 0;
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load);
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static const char * const state_str[] = {
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[FPGA_MGR_STATE_UNKNOWN] = "unknown",
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[FPGA_MGR_STATE_POWER_OFF] = "power off",
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[FPGA_MGR_STATE_POWER_UP] = "power up",
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[FPGA_MGR_STATE_RESET] = "reset",
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/* requesting FPGA image from firmware */
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[FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
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[FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
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/* Preparing FPGA to receive image */
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[FPGA_MGR_STATE_WRITE_INIT] = "write init",
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[FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
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/* Writing image to FPGA */
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[FPGA_MGR_STATE_WRITE] = "write",
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[FPGA_MGR_STATE_WRITE_ERR] = "write error",
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/* Finishing configuration after image has been written */
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[FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
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[FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
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/* FPGA reports to be in normal operating mode */
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[FPGA_MGR_STATE_OPERATING] = "operating",
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};
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static ssize_t name_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct fpga_manager *mgr = to_fpga_manager(dev);
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return sprintf(buf, "%s\n", mgr->name);
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}
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static ssize_t state_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct fpga_manager *mgr = to_fpga_manager(dev);
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return sprintf(buf, "%s\n", state_str[mgr->state]);
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}
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static DEVICE_ATTR_RO(name);
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static DEVICE_ATTR_RO(state);
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static struct attribute *fpga_mgr_attrs[] = {
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&dev_attr_name.attr,
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&dev_attr_state.attr,
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NULL,
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};
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ATTRIBUTE_GROUPS(fpga_mgr);
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static int fpga_mgr_of_node_match(struct device *dev, const void *data)
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{
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return dev->of_node == data;
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}
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/**
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* of_fpga_mgr_get - get an exclusive reference to a fpga mgr
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* @node: device node
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*
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* Given a device node, get an exclusive reference to a fpga mgr.
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*
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* Return: fpga manager struct or IS_ERR() condition containing error code.
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*/
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struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
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{
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struct fpga_manager *mgr;
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struct device *dev;
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if (!node)
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return ERR_PTR(-EINVAL);
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dev = class_find_device(fpga_mgr_class, NULL, node,
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fpga_mgr_of_node_match);
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if (!dev)
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return ERR_PTR(-ENODEV);
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mgr = to_fpga_manager(dev);
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put_device(dev);
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if (!mgr)
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return ERR_PTR(-ENODEV);
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/* Get exclusive use of fpga manager */
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if (!mutex_trylock(&mgr->ref_mutex))
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return ERR_PTR(-EBUSY);
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if (!try_module_get(THIS_MODULE)) {
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mutex_unlock(&mgr->ref_mutex);
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return ERR_PTR(-ENODEV);
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}
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return mgr;
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}
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EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
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/**
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* fpga_mgr_put - release a reference to a fpga manager
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* @mgr: fpga manager structure
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*/
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void fpga_mgr_put(struct fpga_manager *mgr)
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{
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if (mgr) {
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module_put(THIS_MODULE);
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mutex_unlock(&mgr->ref_mutex);
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}
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_put);
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/**
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* fpga_mgr_register - register a low level fpga manager driver
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* @dev: fpga manager device from pdev
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* @name: fpga manager name
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* @mops: pointer to structure of fpga manager ops
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* @priv: fpga manager private data
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int fpga_mgr_register(struct device *dev, const char *name,
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const struct fpga_manager_ops *mops,
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void *priv)
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{
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struct fpga_manager *mgr;
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const char *dt_label;
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int id, ret;
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if (!mops || !mops->write_init || !mops->write ||
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!mops->write_complete || !mops->state) {
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dev_err(dev, "Attempt to register without fpga_manager_ops\n");
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return -EINVAL;
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}
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if (!name || !strlen(name)) {
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dev_err(dev, "Attempt to register with no name!\n");
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return -EINVAL;
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}
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mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
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if (!mgr)
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return -ENOMEM;
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id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
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if (id < 0) {
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ret = id;
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goto error_kfree;
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}
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mutex_init(&mgr->ref_mutex);
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mgr->name = name;
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mgr->mops = mops;
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mgr->priv = priv;
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/*
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* Initialize framework state by requesting low level driver read state
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* from device. FPGA may be in reset mode or may have been programmed
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* by bootloader or EEPROM.
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*/
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mgr->state = mgr->mops->state(mgr);
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device_initialize(&mgr->dev);
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mgr->dev.class = fpga_mgr_class;
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mgr->dev.parent = dev;
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mgr->dev.of_node = dev->of_node;
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mgr->dev.id = id;
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dev_set_drvdata(dev, mgr);
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dt_label = of_get_property(mgr->dev.of_node, "label", NULL);
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if (dt_label)
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ret = dev_set_name(&mgr->dev, "%s", dt_label);
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else
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ret = dev_set_name(&mgr->dev, "fpga%d", id);
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ret = device_add(&mgr->dev);
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if (ret)
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goto error_device;
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dev_info(&mgr->dev, "%s registered\n", mgr->name);
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return 0;
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error_device:
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ida_simple_remove(&fpga_mgr_ida, id);
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error_kfree:
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kfree(mgr);
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return ret;
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_register);
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/**
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* fpga_mgr_unregister - unregister a low level fpga manager driver
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* @dev: fpga manager device from pdev
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*/
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void fpga_mgr_unregister(struct device *dev)
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{
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struct fpga_manager *mgr = dev_get_drvdata(dev);
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dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
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/*
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* If the low level driver provides a method for putting fpga into
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* a desired state upon unregister, do it.
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*/
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if (mgr->mops->fpga_remove)
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mgr->mops->fpga_remove(mgr);
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device_unregister(&mgr->dev);
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
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static void fpga_mgr_dev_release(struct device *dev)
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{
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struct fpga_manager *mgr = to_fpga_manager(dev);
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ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
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kfree(mgr);
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}
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static int __init fpga_mgr_class_init(void)
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{
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pr_info("FPGA manager framework\n");
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fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
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if (IS_ERR(fpga_mgr_class))
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return PTR_ERR(fpga_mgr_class);
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fpga_mgr_class->dev_groups = fpga_mgr_groups;
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fpga_mgr_class->dev_release = fpga_mgr_dev_release;
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return 0;
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}
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static void __exit fpga_mgr_class_exit(void)
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{
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class_destroy(fpga_mgr_class);
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ida_destroy(&fpga_mgr_ida);
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}
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|
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MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
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MODULE_DESCRIPTION("FPGA manager framework");
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MODULE_LICENSE("GPL v2");
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subsys_initcall(fpga_mgr_class_init);
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module_exit(fpga_mgr_class_exit);
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|
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@ -0,0 +1,127 @@
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/*
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* FPGA Framework
|
||||
*
|
||||
* Copyright (C) 2013-2015 Altera Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include <linux/mutex.h>
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#include <linux/platform_device.h>
|
||||
|
||||
#ifndef _LINUX_FPGA_MGR_H
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#define _LINUX_FPGA_MGR_H
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|
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struct fpga_manager;
|
||||
|
||||
/**
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||||
* enum fpga_mgr_states - fpga framework states
|
||||
* @FPGA_MGR_STATE_UNKNOWN: can't determine state
|
||||
* @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
|
||||
* @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
|
||||
* @FPGA_MGR_STATE_RESET: FPGA in reset state
|
||||
* @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress
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* @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed
|
||||
* @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming
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||||
* @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage
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* @FPGA_MGR_STATE_WRITE: writing image to FPGA
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* @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA
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* @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps
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||||
* @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE
|
||||
* @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating
|
||||
*/
|
||||
enum fpga_mgr_states {
|
||||
/* default FPGA states */
|
||||
FPGA_MGR_STATE_UNKNOWN,
|
||||
FPGA_MGR_STATE_POWER_OFF,
|
||||
FPGA_MGR_STATE_POWER_UP,
|
||||
FPGA_MGR_STATE_RESET,
|
||||
|
||||
/* getting an image for loading */
|
||||
FPGA_MGR_STATE_FIRMWARE_REQ,
|
||||
FPGA_MGR_STATE_FIRMWARE_REQ_ERR,
|
||||
|
||||
/* write sequence: init, write, complete */
|
||||
FPGA_MGR_STATE_WRITE_INIT,
|
||||
FPGA_MGR_STATE_WRITE_INIT_ERR,
|
||||
FPGA_MGR_STATE_WRITE,
|
||||
FPGA_MGR_STATE_WRITE_ERR,
|
||||
FPGA_MGR_STATE_WRITE_COMPLETE,
|
||||
FPGA_MGR_STATE_WRITE_COMPLETE_ERR,
|
||||
|
||||
/* fpga is programmed and operating */
|
||||
FPGA_MGR_STATE_OPERATING,
|
||||
};
|
||||
|
||||
/*
|
||||
* FPGA Manager flags
|
||||
* FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
|
||||
*/
|
||||
#define FPGA_MGR_PARTIAL_RECONFIG BIT(0)
|
||||
|
||||
/**
|
||||
* struct fpga_manager_ops - ops for low level fpga manager drivers
|
||||
* @state: returns an enum value of the FPGA's state
|
||||
* @write_init: prepare the FPGA to receive confuration data
|
||||
* @write: write count bytes of configuration data to the FPGA
|
||||
* @write_complete: set FPGA to operating state after writing is done
|
||||
* @fpga_remove: optional: Set FPGA into a specific state during driver remove
|
||||
*
|
||||
* fpga_manager_ops are the low level functions implemented by a specific
|
||||
* fpga manager driver. The optional ones are tested for NULL before being
|
||||
* called, so leaving them out is fine.
|
||||
*/
|
||||
struct fpga_manager_ops {
|
||||
enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
|
||||
int (*write_init)(struct fpga_manager *mgr, u32 flags,
|
||||
const char *buf, size_t count);
|
||||
int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
|
||||
int (*write_complete)(struct fpga_manager *mgr, u32 flags);
|
||||
void (*fpga_remove)(struct fpga_manager *mgr);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct fpga_manager - fpga manager structure
|
||||
* @name: name of low level fpga manager
|
||||
* @dev: fpga manager device
|
||||
* @ref_mutex: only allows one reference to fpga manager
|
||||
* @state: state of fpga manager
|
||||
* @mops: pointer to struct of fpga manager ops
|
||||
* @priv: low level driver private date
|
||||
*/
|
||||
struct fpga_manager {
|
||||
const char *name;
|
||||
struct device dev;
|
||||
struct mutex ref_mutex;
|
||||
enum fpga_mgr_states state;
|
||||
const struct fpga_manager_ops *mops;
|
||||
void *priv;
|
||||
};
|
||||
|
||||
#define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
|
||||
|
||||
int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags,
|
||||
const char *buf, size_t count);
|
||||
|
||||
int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
|
||||
const char *image_name);
|
||||
|
||||
struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
|
||||
|
||||
void fpga_mgr_put(struct fpga_manager *mgr);
|
||||
|
||||
int fpga_mgr_register(struct device *dev, const char *name,
|
||||
const struct fpga_manager_ops *mops, void *priv);
|
||||
|
||||
void fpga_mgr_unregister(struct device *dev);
|
||||
|
||||
#endif /*_LINUX_FPGA_MGR_H */
|
||||
Loading…
Reference in New Issue