drm: rcar-du: Support up to 4 CRTCs
The Gen3 R8A7795 DU has 4 CRTCs, support them all. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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@ -571,7 +571,7 @@ static irqreturn_t rcar_du_crtc_irq(int irq, void *arg)
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int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index)
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int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index)
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{
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{
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static const unsigned int mmio_offsets[] = {
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static const unsigned int mmio_offsets[] = {
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DU0_REG_OFFSET, DU1_REG_OFFSET, DU2_REG_OFFSET
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DU0_REG_OFFSET, DU1_REG_OFFSET, DU2_REG_OFFSET, DU3_REG_OFFSET
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};
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};
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struct rcar_du_device *rcdu = rgrp->dev;
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struct rcar_du_device *rcdu = rgrp->dev;
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@ -67,7 +67,7 @@ struct rcar_du_device_info {
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unsigned int num_lvds;
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unsigned int num_lvds;
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};
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};
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#define RCAR_DU_MAX_CRTCS 3
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#define RCAR_DU_MAX_CRTCS 4
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#define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)
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#define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)
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#define RCAR_DU_MAX_LVDS 2
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#define RCAR_DU_MAX_LVDS 2
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#define RCAR_DU_MAX_VSPS 4
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#define RCAR_DU_MAX_VSPS 4
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@ -16,6 +16,7 @@
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#define DU0_REG_OFFSET 0x00000
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#define DU0_REG_OFFSET 0x00000
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#define DU1_REG_OFFSET 0x30000
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#define DU1_REG_OFFSET 0x30000
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#define DU2_REG_OFFSET 0x40000
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#define DU2_REG_OFFSET 0x40000
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#define DU3_REG_OFFSET 0x70000
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/* -----------------------------------------------------------------------------
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/* -----------------------------------------------------------------------------
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* Display Control Registers
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* Display Control Registers
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