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drm/i915: s/mdelay/msleep/ 

Burning cpu cycles isn't awesome, so use sleeps instead.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
hifive-unleashed-5.1
Daniel Vetter 2015-07-07 09:10:40 +02:00
parent 3fec3d2f0a
commit 6adfb1ef10
2 changed files with 4 additions and 4 deletions
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2
drivers/gpu/drm/i915/intel_display.c
View File

@ -1026,7 +1026,7 @@ static bool pipe_dsl_stopped(struct drm_device *dev, enum pipe pipe)
line_mask = DSL_LINEMASK_GEN3;
line1 = I915_READ(reg) & line_mask;
mdelay(5);
msleep(5);
line2 = I915_READ(reg) & line_mask;
return line1 == line2;

6
drivers/gpu/drm/i915/intel_pm.c
View File

@ -4255,7 +4255,7 @@ static void ironlake_enable_drps(struct drm_device *dev)
if (wait_for_atomic((I915_READ(MEMSWCTL) & MEMCTL_CMD_STS) == 0, 10))
DRM_ERROR("stuck trying to change perf mode\n");
mdelay(1);
msleep(1);
ironlake_set_drps(dev, fstart);
@ -4286,10 +4286,10 @@ static void ironlake_disable_drps(struct drm_device *dev)
/* Go back to the starting frequency */
ironlake_set_drps(dev, dev_priv->ips.fstart);
mdelay(1);
msleep(1);
rgvswctl |= MEMCTL_CMD_STS;
I915_WRITE(MEMSWCTL, rgvswctl);
mdelay(1);
msleep(1);
spin_unlock_irq(&mchdev_lock);
}